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Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Digital Logic Review: Part II ECE511: Digital System & Microprocessor

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Page 1: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Digital Logic Review: Part II

ECE511: Digital System & Microprocessor

Page 2: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

What we will learn in this session:

Negative number representation: 2’s Complement method.

Minimizing Boolean expressions:K-mapBoolean algebra.

Comparison between Active High, and Active Low signals.

Page 3: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

2’s Complement Representation

Page 4: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

2’s Complement

Used by M68k to represent negative numbers. Advantages:

Simple representation, conversion method. Can perform arithmetic operations directly. Can use existing circuits.

MSB regarded as sign bit. If 0, then positive number. If 1, then negative number.

Max value for 8-bits -128 to 127

Page 5: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

2’s Complement

+34 (decimal)

00100010

-54 (decimal)

11001010

Sign bit Value

Sign bit Value

Page 6: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Converting to 2’s Complement

Converting 10 to -10:

10 (decimal) = 00001010 (binary)

1. Start with positive number

2. Invert all the bits

00001010(invert) 11110101

3. Add 1 to inverted result

11110101+ 1

11110110 2’s Complement (-10)

Page 7: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Converting 2’s Complement Back

Converting -5 to 5:

-5 (decimal) = 11111011 (binary)

1. The 2’s complement representation:

2. Invert all the bits

11111011(invert) 00000100

3. Add 1 to inverted result

00000100+ 1

00000101 Positive value (+5)

Page 8: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Max Value +127

0 1 1 1 1 1 1 1

Sign bitValue

-127 = 10000001

Page 9: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Min Value -128

1 0 0 0 0 0 0 0

Sign bitValue

+128 = ???

Page 10: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

What about zero?0 0 0 0 0 0 0 0

Sign bitValue

1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0

invert

+1

1 carried out, not counted.

Page 11: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Calculating the Maximum Range

Calculated using the following formula:

-(2n-1)< x < +(2n-1-1)

Where n is number of bits.

Page 12: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example: Calculating 2’s Complement Range What is the range for 32-bit in 2’s

complement representation?

n = 32

-(232-1+1) < x < 232-1

-2,147,483,649 < x < 2,147,483,648

Page 13: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Active High vs. Active Low

Page 14: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Active High and Active Low

Some signals are active lows.They are active when they are low.Marked with bar:

BRBERRWR /

Page 15: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Active High and Active Low

5V

0V

5V

0V

A

Active High5 V is ACTIVE0 V is INACTIVE

Active Low5 V is INACTIVE0 V is ACTIVE

TRUE

FALSE TRUE

FALSE

A

Page 16: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Why are active low signals preferred in control? More noise immunity:

All electronic circuits affected by noise.Less likely to false trigger.Not affected by voltage surge.

Page 17: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Noise Immunity

RESETExample:

Resets system when active (pulled high).

RESET

+

0V 0V

=

0V

5V 5V5V

False Triggering, system reset accidentally.

Signal Noise New Signal

Page 18: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Noise Immunity

RESETExample:

Resets system when active (pulled low).

RESET

+

0V 0V

=

0V

5V 5V5V

No effect, since RESET is active low.

Signal Noise New Signal

Page 19: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Noise Immunity

WR /Example:

Reads from memory when low, writes to memory when high.

WR /

+

0V 0V

=

0V

5V 5V5V

False Triggering, memory contents will be lost.

Signal Noise New Signal

Page 20: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Noise Immunity

WR /Example:

Reads from memory when high, writes to memory when low.

WR /

+

0V 0V

=

0V

5V 5V5V

No data lost even when false triggering occurred.

Signal Noise New Signal

Page 21: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Logic Minimization

Page 22: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Importance of Minimization In electronics, we want:

Functionality – desired objective. Minimal circuit area – wafers, board space. Minimal cost – more IC, more $$$. Maximum reliability – more components, more fail.

Logic minimization + good design achieves all this.

2 popular methods: Boolan Algebra. Karnaugh Map.

Page 23: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Boolean Algebra

Page 24: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Boolean Algebra

Named after George Boole. Based on set theory and algebra. Application to electronics – C. Shannon. Application to computers: J. V. Atanasoff. Important in computer emergence.

Page 25: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Boolean Identities

Set of fundamental rules:Defines Boolean behaviors.Mathematics and Set Theory.Used for minimization.

No set guideline for minimization:When to use what.Depends on luck, experience.Better to use K-Map.

Page 26: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Boolean Identities

Identity Law Dominance Law Idempotent Law Inverse Law Commutative Law

Associative Law Distributive Law Absorption Law De Morgan Law Double Complement

Law

*You don’t have to memorize all these, you just have to know about them. Just use K-Map for minimization.

Page 27: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Identity Law + Dominance Law

1x = x 0 + x = x

0x = 0 1 + x = 1

Page 28: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Idempotent Law + Inverse Law

xx = x x + x = x

xx = 0 x + x = x

Page 29: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Commutative Law + Associative Law

xy = yx x + y = y + x

(xy)z = x(yz) (x + y) + z = x + (y + z)

Page 30: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Distributive Law

x + yz = (x + y) (x + z)

x(y + z) = xy + xz

Page 31: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Absorption Law

x (x + y) = x x + xy = x

Page 32: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Double Complement Law

x = x

Page 33: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

De Morgan’s Law

A . B = A + B A + B = A . B

A . B

A . B

A + B

. = + A + B

A + B

A . B

+ = .

Page 34: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

De Morgan’s Law

A . B = A + B A + B = A . B

A . B

A + B

A . B . = +

A + B

A . B

A + B + = .

Page 35: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example 1

Z = ABC + ABC + ABC

Z = ABC + B(AC + AC)

Z = ABC + BC(A + A)

Z = ABC + BC

Distributive Law

Distributive Law

Inverse Law

Minimize: Z = ABC + ABC + ABC

Page 36: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

What if…

Z = ABC + ABC + ABC

Z = A(BC + BC) + ABC

Distributive Law

Minimize: Z = ABC + ABC + ABC

* Can never get the answer!

Stuck here…

Page 37: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Karnaugh Map

Page 38: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Karnaugh Maps

To simplify Boolean expressions. Invented by Maurice Karnaugh. Simpler than Boolean Algebra. Principles:

Group together common factors.Delete unwanted variables.

Works best for two to four variables.

Page 39: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Table Layout – 2 Variables

1

0

0 1

B

A

Page 40: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Table Layout – 3 Variables

110100 10

C

AB

1

0

Page 41: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Table Layout – 4 Variables

110100 10

CD

AB

11

01

00

10

Page 42: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

How to Construct the K-Map

1. Analyze function, create Truth Table (TT).

2. Draw K-Map based on no. of variables.3. Fill the K-Map with values from TT.4. Group 1’s together.5. Extract simplified expression.

Page 43: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules110100 10

CD

AB

01 0

10

11

00 1 1

0

1

0

0

0

0

0

0

0

0

1

1

1

×

2. You can go right-left or up-down, but you cannot go diagonal.

1. You must not miss any 1’s.

Page 44: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

3. You can only have 1, 2, 4, 8, …, 2n elements in a group.

110100 10

CD

AB

01 0

10

11

00 1 1

0

0

1

0

0

0

0

0

0

0

0

1

110100 10

CD

AB

01 0

10

11

00 1 1

0

1

1

0

1

1

0

1

1

1

0

0

1

Page 45: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

110100 10

CD

AB

01 0

10

11

00 1 1

0

0

1

1

1

1

0

0

0

0

1

0

1

×

4. Try to cover all 1’s using the minimum number of groups..

110100 10

CD

AB

01 0

10

11

00 1 1

0

0

1

1

1

1

0

0

0

0

1

0

1

2 groups

6 groups

Page 46: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

110100 10

CD

AB

01 0

10

11

00 1 1

0

0

1

0

1

0

0

0

0

1

0

1

0

√5. Overlapping groups are allowed.

110100 10

CD

AB

01 0

10

11

00 0 0

0

1

0

1

0

1

0

0

0

0

1

0

0

Page 47: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

6. Wrap-around is allowed.

110100 10

CD

AB

01 0

10

11

00 1 0

0

1

0

0

1

0

0

0

1

0

0

0

0

110100 10

CD

AB

01 0

10

11

00 1 0

1

1

0

0

1

0

0

1

1

0

0

0

0

√ √Corner wrap Side wrap

Page 48: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

110100 10

CD

AB

01 0

10

11

00 1 0

0

1

1

0

1

1

0

0

1

0

0

0

0

√Top-down wrap

Page 49: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Rules

6. Don’t cares (X) can be grouped with 1’s if they help.

110100 10

CD

AB

01 0

10

11

00 0 X

0

X

0

0

0

0

0

0

0

1

X

1

1

110100 10

CD

AB

01 0

10

11

00 0 X

0

X

0

0

0

0

0

1

0

1

X

1

1

√Don’t cares can help make the group larger(1 group).

Not selecting don’t cares (2 groups) ×

Page 50: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Extracting the Results

110100 10

CD

AB

01 0

10

11

00 1 1

0

0

1

1

1

1

0

0

0

0

1

0

1

110100 10

00

10

11

1101

CD

CD

AB

AB*A and D cancel out, onlyB and C are left.

*All AB cancel out, onlyC and D are left.

BCDCY Answer:

Page 51: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example

Minimize this logic equation:

ACCABBACBAZ

Page 52: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Solution

ACCABBACBAZ

A B C Z

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

Page 53: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Solution

110100 10

C

AB

1

0 111 0

110 1

Values of Z (from TT)

Page 54: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Solution

110100 10

C

AB

1

0 111 0

110 1

Page 55: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Solution

110100 10

C

AB

1

0 111 0

110 1

ACBCAZ

Page 56: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example 1Minimize: Z = ABC + ABC + ABC

AB

110100 10

1

0 0 11

00 10

0

C

Z = ABC + BC

A B C Z0 0 0 00 0 1 00 1 0 10 1 1 01 0 0 01 0 1 11 1 0 11 1 1 0

Truth Table:

Page 57: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example 2Minimize: Z = ABCD + ABCD + ABCD + ABCD

B C D Z0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 01 1 0 01 1 1 0

A00000000

B C D Z0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 11 1 0 01 1 1 0

A11111111

Truth Table:

Page 58: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Example 2

110100 10

CD

AB

01 0

10

11

00 0 0

1

0

0

0

0

0

1

0

1

0

0

1

0

Z = ACD + ABCD + ABCD

Page 59: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Conclusion

Page 60: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

Conclusion

Active low signals are active when they are low.

2’s Complement represents negative numbers in µP.

Boolean Logic and K-Map minimize equations.K-Map simpler, less errors.Both should have same answers.

Page 61: Digital Logic Review: Part II ECE511: Digital System & Microprocessor

The End

Please read:http://computerscience.jbpub.com/ecoa/2e/Null03.pdf

http://en.wikipedia.org/wiki/Two's_complement

http://en.wikipedia.org/wiki/Active_low.

http://www.ee.surrey.ac.uk/Projects/Labview/minimisation/karnaugh.html