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Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

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Page 1: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Digital Logic Problems (II)

Prof. Sin-Min Lee

Department of Mathematics and Computer Science

Page 2: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 3: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 4: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 5: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 6: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 7: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 8: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 9: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 10: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Multiplexers

• A combinational circuit that selects info from one of many input lines and directs it to the output line.

• The selection of the input line is controlled by input variables called selection inputs.

• They are commonly abbreviated as “MUX”.

Page 11: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Implementing Boolean functions with multiplexers

• Any Boolean function of n variables can be implemented with 2n-1-to-1 multiplexer. The procedure for implementing a Boolean function with a multiplexer is

• 1.Express the function in its sum of minterms form.

• 2. Order the sequence of variables chosen for the minterms. Suppose the sequence is , where A is the leftmost variable, and are the remaining n-1 variables.

Page 12: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

• 3.Connect the n-1 variables to the selection lines of the 2n-1-to-1 multiplexer, with B connected to the highest order selection line, and so on.

• 4. Construct the implementation table: List all the minterms in two rows. • The first row consists of minterms 0 to 2n-1 -1 (in all of

which A is complemented).

• The second row consists of minterms 2n-1 to 2n-1 (in all of which A is uncomplemented). .

Page 13: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

• 5. Circle all the minterms of the function and inspect each column in the implementation table separately • If the two minterms in a column are not circled, apply 0

to the corresponding multiplexer input. • If the two minterms are circled, apply 1 to the

corresponding multiplexer input. • If the bottom minterm is circled, and the top is not

circled, apply A to the corresponding multiplexer input. • If the top minterm is circled but not the bottom, apply

A*

Page 14: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 15: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

• Multiplexers and decoders are used when many lines of information are being gated and passed from one part of a circuit to another.

• Multiplexing is when multiple data signals share a common propagation path. Time multiplexing is when different signals travel along the same wire but at different times. These devices have data and address lines, and usually include an enable/ disable input. When the device is disabled the output is locked into some particular state and is not effected by the inputs.

Page 16: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 17: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 18: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Consider the function of 3 variables:

1. Input variables B and C are applied to the selection lines s1 and s0,

respectively. 2. Construct the implementation table, and circle all the minterms of the function in the implementation table

3. Apply 0, 1, A, and A*   to the inputs I0

through I3.

Page 19: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Multiplexers (continued)• S0 and S1 are the selection inputs.

• D0, D1, D2, D3 are the input lines.

Page 20: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Multiplexers (continued)• MUX blocks can be combined in parallel with common

selection and enable inputs to perform selection on multiple bit quantities.

Page 21: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Combinational circuit implementation using MUX

• We can use Multiplexers to express Boolean functions also.

• Expressing Boolean functions as MUXs is more efficient than as decoders.

• First n-1 variables of the function used as selection inputs; last variable used as data inputs.

• If last variable is called Z, then each data input has to be Z, Z’, 0, or 1.

Page 22: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 23: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 24: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 25: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 26: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Karnaugh Map Method of Multiplexer Implementation

Consider the function:

A is taken to be the data variable and B,C to be the select variables.

Page 27: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Example of MUX combo circuit • F(X,Y,Z) = m(1,2,6,7)

Page 28: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science
Page 29: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science

Implement g(w,x,y)=wx+xy+wy using a 4-1 multiplexer.

Page 30: Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science