Digital Design and Computer Architecture, 2nd Editionbbm231/files/Part_3.pdf · 2020. 10. 26. · Chapter 2 Digital Design and Computer Architecture, 2ndEdition Part 3 David

Chapter 2 <1>

Digital Design and Computer Architecture, 2nd Edition

Part 3

David Money Harris and Sarah L. Harris

2

Boolean Algebra 1/2• A set of elements B

– There exist at least two elements x, y Î B s. t. x ¹ y • Binary operators: + and ·

closure w.r.t. both + and ·x, y Î B, (x+y) Î B , (x ·y) Î B

additive identity ?0 : x + 0 = 0 + x = x

multiplicative identity ?1 : x ·1 = 1 ·x = x

commutative w.r.t. both + and ·associative w.r.t. both + and ·

• Distributive law:is · distributive over + ?

yes : x ·(y+z) = (x ·y)+(x ·z)is + distributive over · ?

yes : x+(y ·z) = (x+y) ·(x+z)We do not have the second one in ordinary algebra

3

Boolean Algebra 2/2• Complement– " x Î B, there exist an element x’ Î B '

a. x + x’ = 1 (multiplicative identity) andb. x · x’ = 0 (additive identity)

– Not available in ordinary algebra • No inverses in Boolean Algebra!• Differences between ordinary and Boolean algebra– Ordinary algebra deals with real numbers (infinite)– Boolean algebra deals with elements of set B (finite)– Complement– Distributive law– Do not substitute laws from one to another where they

are not applicable

4

Two-Valued Boolean Algebra • Check the axioms– Two distinct elements, 0 ¹ 1– Closure, associative, commutative, identity elements– Complement

x + x ’ = 1 and x · x ’ = 0– Distributive law

x y z

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

y×z x+(y·z) x + y x + z (x + y) · (x + z)

5

Two-Valued Boolean Algebra • Two-valued Boolean algebra is actually equivalent to

the binary logic that we defined heuristically beforeOperations:

Ø · à ANDØ + à ORØ Complement à NOT

• Binary logic is the application of Boolean algebra to gate-type circuits– Two-valued Boolean algebra is developed in a formal

mathematical manner– This formalism is necessary to develop theorems and

properties of Boolean algebra

6

Duality Principle• An important principle– every algebraic expression deducible from the axioms of

Boolean algebra remains valid if the operators and identity elements are interchanged together

• Example:§ x + x = x§ x + x = (x+x) · 1 (identity element)

= (x+x)(x+x’) (complement)= x+(x · x’) (+ over ·)= x (complement)

§ duality principlex + x = x è x · x = x

7

Duality Principle & Theorems• Theorem a:

§ x + 1 = 1 hmmm?§ x + 1 = 1 · (x + 1)

= (x + x’)(x + 1)= x + x’ · 1= x + x’= 1

• Theorem b: (using duality) § x . 0 = 0

8

Absorption Theorem

x + xy = x hmmmmm?= x.1+xy= x(1+y)= x(1)= x

9

Involution & DeMorgan’s Theorems• Involution Theorem:

§ (x’)’ = x § x + x’ = 1 and x · x’ = 0§ Complement of x’ is x§ Complement is unique

• DeMorgan’s Theorem: a. (x + y)’ = x’ · y’b. From duality ? (x.y)’=x’+y’

10

Truth Tables for DeMorgan’s Theorem(x + y)’ = x’ · y ’

x’ y ’ x’ · y ’ x’ + y’1 11 00 10 0

x y x+y (x+y)’ x · y (x · y)’0 00 11 01 1

11

Operator Precedence(Boolean Operator Priority Order)

1. Parentheses2. NOT3. AND4. OR

PiNA cOlada?

12

Boolean Functions• Consists of – binary variables (normal or complement form)– the constants, 0 and 1– logic operation symbols “+” and “·”

• Example:§ F1(x, y, z) = x + y’ z§ F2(x, y, z) = x’ y’ z + x’ y z + xy’

1

1

1

1

0

0

1

0

0

1

1

1

0

1

00000

111

011

101

001

110

010

100

F2F1zyx

Chapter 2 <13>

• Every element is combinational• Every node is either an input or connects

to exactly one output• The circuit contains no cyclic paths• Example:

Rules of Combinational Composition

Chapter 2 <14>

• Functional specification of outputs in terms of inputs

• Example: S = F(A, B, Cin)Cout = F(A, B, Cin)

A S

S = A Å B Å CinCout = AB + ACin + BCin

BCin

CL Cout

Boolean Equations

Chapter 2 <15>

• Complement: variable with a bar over itA, B, C

• Literal: variable or its complementA, A, B, B, C, C

• Implicant: product of literalsABC, AC, BC

• Minterm: product that includes all input variablesABC, ABC, ABC

• Maxterm: sum that includes all input variables(A+B+C), (A+B+C), (A+B+C)

Some Definitions

Chapter 2 <16>

• Two-level logic: ANDs followed by ORs• Example: Y = ABC + ABC + ABC

BA C

Y

minterm: ABC

minterm: ABC

minterm: ABC

A B C

From Logic to Gates

Chapter 2 <17>

• Inputs on the left (or top)• Outputs on right (or bottom)• Gates flow from left to right• Straight wires are best

Circuit Schematics Rules

Chapter 2 <18>

• Wires always connect at a T junction• A dot where wires cross indicates a

connection between the wires• Wires crossing without a dot make no

connectionwires connectat a T junction

wires connectat a dot

wires crossingwithout a dot do

not connect

Circuit Schematic Rules (cont.)

Chapter 2 <19>

A1 A00 00 11 01 1

Y3 Y2 Y1 Y0A3 A20 00 00 00 0

0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

A0

A1

PRIORITYCiIRCUIT

A2

A3

Y0

Y1

Y2

Y3

• Example: Priority CircuitOutput assertedcorresponding tomost significantTRUE input

Multiple-Output Circuits

Chapter 2 <20>

0

A1 A00 00 11 01 1

0

00

Y3 Y2 Y1 Y00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A0

A1

PRIORITYCiIRCUIT

A2

A3

Y0

Y1

Y2

Y3

• Example: Priority CircuitOutput assertedcorresponding tomost significantTRUE input

Multiple-Output Circuits

Chapter 2 <21>

A1 A00 00 11 01 1

0000

Y3 Y2 Y1 Y00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A3A2A1A0Y3Y2

Y1

Y0

Priority Circuit Hardware

Chapter 2 <22>

A1 A00 00 11 01 1

0000

Y3 Y2 Y1 Y00000

0011

0100

A3 A20 00 00 00 0

0 0 0 1 0 00 10 11 01 10 0

0 10 10 11 0

0 11 01 01 10 00 1

1 01 01 11 1

1 01 11 11 1

0001

1110

0000

0000

1 0 0 01111

0000

0000

0000

1 0 0 01 0 0 0

A1 A00 00 11 XX X

0000

Y3 Y2 Y1 Y00001

0010

0100

A3 A20 00 00 00 1

X X 1 0 0 01 X

Don’t Cares

Chapter 2 <23>

• Contention: circuit tries to drive output to 1 and 0– Actual value somewhere in between– Could be 0, 1, or in forbidden zone– Might change with voltage, temperature, time, noise– Often causes excessive power dissipation

• Warnings: – Contention usually indicates a bug.

– X is used for “don’t care” and contention - look at the context to tell them apart

A = 1Y = X

B = 0

Contention: X

Chapter 2 <24>

• Floating, high impedance, open, high Z• Floating output might be 0, 1, or

somewhere in between– A voltmeter won’t indicate whether a node is floating

Tristate Buffer

E A Y0 0 Z0 1 Z1 0 01 1 1

A

E

Y

Floating: Z

Chapter 2 <25>

• Floating nodes are used in tristatebusses– Many different drivers– Exactly one is active at

once

en1

to busfrom bus

en2

to busfrom bus

en3

to busfrom bus

en4

to busfrom bus

sha

red

bu

sprocessor

video

Ethernet

memory

Tristate Busses

26

Logic Circuit Diagram of F1F1(x, y, z) = x + y’ z

27

Logic Circuit Diagram of F1F1(x, y, z) = x + y’ z

x

y

zy’

y’z

x + y’ z

Gate Implementation of F1 = x + y’ z

28

Logic Circuit Diagram of F2F2 = x’ y’ z + x’ y z + xy’

29

Logic Circuit Diagram of F2F2 = x’ y’ z + x’ y z + xy’

x

y

z

Algebraic manipulationF2 = x’ y’ z + x’ y z + xy’

= x’z(y’+y) + xy’

F2

30

Alternative Implementations of F2F2 = x’ z + xy’

31

Alternative Implementations of F2F2 = x’ z + xy’x

y

zF2

32

Alternative Implementations of F2F2 = x’ z + xy’x

y

zF2

F2 = x’ y’ z + x’ y z + xy’

F2

x

y

z

Example

Example

Example

Example

37

OTHER LOGIC OPERATORS - 1• AND, OR, NOT are logic operators

– Boolean functions with two variables– These are three of the 16 possible two-variable Boolean functions

x y F0 F1 F2 F3 F4 F5 F6 F7

0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 1 1 1 11 0 0 0 1 1 0 0 1 11 1 0 1 0 1 0 1 0 1

x y F8 F9 F10 F11 F12 F13 F14 F15

0 0 1 1 1 1 1 1 1 10 1 0 0 0 0 1 1 1 11 0 0 0 1 1 0 0 1 11 1 0 1 0 1 0 1 0 1

38

OTHER LOGIC OPERATORS - 2• Some of the Boolean functions with two variables

§ Constant functions: F0 = 0 and F15 = 1§ AND function: F1 = xy§ OR function: F7 = x + y § XOR function: • F6 = x’ y + xy’ = x Å y (x or y, but not both)

§ XNOR (Equivalence) function:• F9 = xy + x’ y’ = (x Å y)’ (x equals y)

§ NOR function:• F8 = (x + y)’ = (x ¯ y) (Not-OR)

§ NAND function:• F14 = (x y)’ = (x y) (Not-AND)

Chapter 2 <39>

More Two-Input Logic Gates

Chapter 2 <40>

More Two-Input Logic Gates

Chapter 2 <41>

• Y = AB + AB

Simplifying Boolean EquationsExample 1:

Chapter 2 <42>

• Y = AB + AB= B(A + A)= B(1)= B

Simplifying Boolean EquationsExample 1:

Chapter 2 <43>

• Y = A(AB + ABC)Example 2:

Simplifying Boolean Equations

Chapter 2 <44>

• Y = A(AB + ABC)= A(AB(1 + C))= A(AB(1))= A(AB)= (AA)B= AB

Example 2:

Simplifying Boolean Equations

Chapter 2 <45>

• Y = AB = A + B

• Y = A + B = A B

AB Y

AB Y

AB Y

AB Y

DeMorgan’s Theorem

Chapter 2 <46>

• Backward:– Body changes– Adds bubbles to inputs

• Forward:– Body changes– Adds bubble to output

AB Y A

B Y

AB YA

B Y

Bubble Pushing

Chapter 2 <47>

AB

YCD

• What is the Boolean expression for this circuit?

Bubble Pushing

Chapter 2 <48>

AB

YCD

• What is the Boolean expression for this circuit?

Y = AB + CD

Bubble Pushing

Chapter 2 <49>

AB

C

DY

• Begin at output, then work toward inputs• Push bubbles on final output back • Draw gates in a form so bubbles cancel

Bubble Pushing Rules

Chapter 2 <50>

AB

C YD

Bubble Pushing Example

Chapter 2 <51>

AB

C YD

no outputbubble


Chapter 2 <52>

bubble oninput and outputA

B

C

DY

AB

C YD

no outputbubble


Chapter 2 <53>

AB

C

DY

bubble oninput and outputA

B

C

DY

AB

C YD

Y = ABC + D

no outputbubble

no bubble oninput and output


54

Complement of a Function• F’ is complement of F– We can obtain F’, by interchanging of 0’s and 1’s in

the truth table

0

0

1

1

0

1

0

0

F

1

0

1

0

1

0

1

0

z

11

11

01

01

10

10

00

00

F’yx

F =

F’ =

55

Generalizing DeMorgan’s Theorem

• We can also utilize DeMorgan’s Theorem§ (x + y)’ = x’ y’§ (A + B + C)’

= (A+B)’C’= A’B’C’

• We can generalize DeMorgan’s Theorem§ (x1 + x2 + … + xN )’ = x1’ · x2’ · … · xN’

§ (x1 · x2 · … · xN )’ = x1’ + x2’ + … + xN’

56

Example: Complement of a Function• Example:

§ F1 = x’yz’ + x’y’z§ F1’ = (x’yz’ + x’y’z)’

= (x’yz’)’(x’y’z)’= (x + y’ + z)(x + y + z’)

§ F2 = x(y’z’ + yz)§ F2’ = (x(y’z’ + yz))’

= x’+(y’z’ + yz)’= x’ + (y + z) (y’ + z’)

• Easy Way to Complement: take the dual of the function and complement each literal

57

Universal Gates• NAND and NOR gates are universal• We know any Boolean function can be written in

terms of three logic operations:– AND, OR, NOT

• In return, NAND gate can implement these three logic gates by itself– So can NOR gate

00

10

01

11

0

1

1

1

11

01

10

00

(x’ y’ )’y ’x’(xy)’yx

58

NAND Gatex

xy

x

y

59

NOR Gatex

xy

x

y

60

Designs with NAND gatesExample 1/2

• A function:F1 = x’ y + xy’

x

y

61

Example 2/2F2 = x’ y’ + xy’

x

y

62

Multiple Input Gates• AND and OR operations:– They are both commutative and associative – No problem with extending the number of inputs

• NAND and NOR operations:– they are both commutative but not associative– Extending the number of inputs is not obvious

• Example: NAND gates§ ((xy)’z)’ ¹ (x(yz)’)’

§ ((xy)’z)’ = xy + z’§ (x(yz)’)’ = x’ + yz

63

Nonassociativity of NOR operation

z

64

Multiple Input Universal Gates• To overcome this difficulty, we define multiple-

input NAND and NOR gates in slightly different manner

Three input NAND gate: (x y z)’xy

z(x y z)’

(x + y + z)’xy

zThree input NOR gate:(x + y + z)’

65

Multiple Input Universal Gates(x + y + z)’

xyz

3-input NOR gate

xyz

(xyz)’

3-input NAND gate

ABC

DE

F =

Cascaded NAND gates

Chapter 2 <66>

• Multi-input XOR: Odd parity

Multiple-Input Logic Gates

67

XOR and XNOR Gates• XOR and XNOR operations are both commutative

and associative.• No problem manufacturing multiple input XOR

and XNOR gates• However, they are more costly from hardware

point of view.• Therefore, we usually have 2-input XOR and XNOR

gatesxy

z

x Å y Å z

68

3-input XOR Gates

Chapter 2 <69>

Y = F(A, B) =

• All equations can be written in SOP form• Each row has a minterm• A minterm is a product (AND) of literals• Each minterm is TRUE for that row (and only that row)• Form function by ORing minterms where the output is TRUE • Thus, a sum (OR) of products (AND terms)

Sum-of-Products (SOP) Form

A B Y0 00 11 01 1

0101

minterm

A BA BA B

A B

mintermnamem0m1m2m3

Chapter 2 <70>

Y = F(A, B) =



A B Y0 00 11 01 1

0101

minterm

A BA BA B

A B

mintermnamem0m1m2m3

Chapter 2 <71>

Y = F(A, B) = AB + AB = Σ(1, 3)



A B Y0 00 11 01 1

0101

minterm

A BA BA B

A B

mintermnamem0m1m2m3

Chapter 2 <72>

A + BA B Y0 00 11 01 1

0101

maxterm

A + BA + BA + B

maxtermnameM0M1M2M3

Y = F(A, B) = (A + B)(A + B) = Π(0, 2)

• All Boolean equations can be written in POS form• Each row has a maxterm• A maxterm is a sum (OR) of literals• Each maxterm is FALSE for that row (and only that row)• Form function by ANDing the maxterms for which the

output is FALSE• Thus, a product (AND) of sums (OR terms)

Product-of-Sums (POS) Form

Chapter 2 <73>

• You are going to the cafeteria for lunch– You won’t eat lunch (E) – If it’s not open (O) or– If they only serve corndogs (C)

• Write a truth table for determining if you will eat lunch (E).

O C E0 00 11 01 1

Boolean Equations Example

Chapter 2 <74>

• You are going to the cafeteria for lunch– You won’t eat lunch (E) – If it’s not open (O) or– If they only serve corndogs (C)

• Write a truth table for determining if you will eat lunch (E).

O C E0 00 11 01 1

0010

Boolean Equations Example

Chapter 2 <75>

• SOP – sum-of-products

• POS – product-of-sums

O C E0 00 11 01 1

mintermO CO CO CO C

O + CO C Y0 00 11 01 1

maxterm

O + CO + CO + C

SOP & POS Form

Chapter 2 <76>

• SOP – sum-of-products

• POS – product-of-sums

O + CO C E0 00 11 01 1

0010

maxterm

O + CO + CO + C

O C E0 00 11 01 1

0010

minterm

O CO CO C

O C

Y = (O + C)(O + C)(O + C)= Π(0, 1, 3)

Y = OC= Σ(2)

SOP & POS Form

77

Min- & Maxterms with n = 3

x y zMinterms Maxterms

term designation term designation0 0 0 x’y’z’ m0 x + y + z M0

0 0 1 x’y’z m1 x + y + z’ M1

0 1 0 x’yz’ m2 x + y’ + z M2

0 1 1 x’yz m3 x + y’ + z’ M3

1 0 0 xy’z’ m4 x’ + y + z M4

1 0 1 xy’z m5 x’ + y + z’ M5

1 1 0 xyz’ m6 x’ + y’ + z M6

1 1 1 xyz m7 x’ + y’ + z’ M7

Formal Expression with Minterms

M7=x’+y’+z’

M6=x’+y’+z

M5=x’+y+z’

M4=x’+y+z

M3=x+y’+z’

M2=x+y’+z

M1=x+y+z’

F(1,1,1)

F(1,1,0)

F(1,0,1)

F(1,0,0)

F(0,1,1)

F(0,1,0)

F(0,0,1)

F(0,0,0)M0=x+y+z

m7=xyz111

m6=xyz’110

m5=xy’z101

m4=xy’z’100

m3=x’yz011

m2=x’yz’010

m1=x’y’z001

m0=x’y’z’000

FMimixyz

F(x, y, z) = F(0,0,0)m0 + F(0,0,1)m1 + F(0,1,0)m2 + F(0,1,1)m3 +F(1,0,0)m4 + F(1,0,1)m5 + F(1,1,0)m6 + F(1,1,1)m7

78

Formal Expression with Maxterms

M7=x’+y’+z’

M6=x’+y’+z

M5=x’+y+z’

M4=x’+y+z

M3=x+y’+z’

M2=x+y’+z

M1=x+y+z’

F(1,1,1)

F(1,1,0)

F(1,0,1)

F(1,0,0)

F(0,1,1)

F(0,1,0)

F(0,0,1)

F(0,0,0)M0=x+y+z

m7=xyz111

m6=xyz’110

m5=xy’z101

m4=xy’z’100

m3=x’yz011

m2=x’yz’010

m1=x’y’z001

m0=x’y’z’000

FMimixyz

F(x, y, z) = (F(0,0,0)+M0) (F(0,0,1)+M1) (F(0,1,0)+M2) (F(0,1,0)+M3)(F(1,0,0)+M4) (F(1,0,1)+M5) (F(1,1,0)+M6) (F(1,1,1)+M7)

79

80

Example

M7=x’+y’+z’

M6=x’+y’+z

M5=x’+y+z’

M4=x’+y+z

M3=x+y’+z’

M2=x+y’+z

M1=x+y+z’

0

1

0

0

0

1

1

0M0=x+y+z

m7=xyz111

m6=xyz’110

m5=xy’z101

m4=xy’z’100

m3=x’yz011

m2=x’yz’010

m1=x’y’z001

m0=x’y’z’000

FMimixyz

F(x, y, z) = ? in mintersF(x, y, z) = ? in maxterms

81

Example

M7=x’+y’+z’

M6=x’+y’+z

M5=x’+y+z’

M4=x’+y+z

M3=x+y’+z’

M2=x+y’+z

M1=x+y+z’

0

1

0

0

0

1

1

0M0=x+y+z

m7=xyz111

m6=xyz’110

m5=xy’z101

m4=xy’z’100

m3=x’yz011

m2=x’yz’010

m1=x’y’z001

m0=x’y’z’000

FMimixyz

F(x, y, z) = x’y’z + x’yz’ + xyz’ F(x, y, z) = (x+y+z)(x+y’+z’)(x’+y+z)(x’+y+z’)(x’+y’+z’)

82

Boolean Functions in Canonical Form

• F1(x, y, z) =• F2(x, y, z) =

x y z F1 F2

0 0 0 0 10 0 1 1 00 1 0 0 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1

83

Important Properties• Any Boolean function can be expressed

§ as a sum of minterms§ as a product of maxterms

• Example:§ F’ = S (0, 2, 3, 5, 6)

=§ How do we find the complement of F’?§ F =

84



• Example:§ F’ = S (0, 2, 3, 5, 6)

= x’y’z’ + x’yz’ + x’yz + xy’z + xyz’§ How do we find the complement of F’?§ F =

85



• Example:§ F’ = S (0, 2, 3, 5, 6)

= x’y’z’ + x’yz’ + x’yz + xy’z + xyz’§ How do we find the complement of F’?§ F = (x + y + z)(x + y’ + z)(x + y’ + z’)(x’ + y + z’)(x’ + y’ + z)

= =

86

Canonical Form• If a Boolean function is expressed as a sum of

minterms or product of maxterms, the function is said to be in canonical form.

• Example: F = x + y’z à canonical form?§ No § But we can put it in canonical form.

§ F = x + y’z = S (7, 6, 5, 4, 1)• Alternative way:– Obtain the truth table first and then the canonical term.

87

Example: Product of Maxterms• F = xy + x’z• Use the distributive law of + over ·• F = xy + x’z

= xy(z+z’) + x’z(y+y’)= xyz + xyz’ + x’yz + x’y’z= S (7,6,3,1)

88

Example: Product of Maxterms• F = xy + x’z• Use the distributive law of + over ·• F = xy + x’z

= xy(z+z’) + x’z(y+y’)= xyz + xyz’ + x’yz + x’y’z= S (7,6,3,1)

= P (4, 5, 0, 2)

89

Conversion Between Canonical Forms

• Fact: – The complement of a function (given in sum of

minterms) can be expressed as a sum of mintermsmissing from the original function

• Example:§ F(x, y, z) = S (1, 4, 5, 6, 7)§ F’(x, y, z) =§ Now take the complement of F’ and make use of

DeMorgan’s theorem§ (F’ )’ = =§ F = M0 · M2 · M3 = P (0, 2, 3)

90

General Rule for Conversion• Important relation:

§ mj’ = Mj

§ Mj’ = mj

• The rule:– Interchange symbols P and S, and– list those terms missing from the original form

• Example: F = xy + x’z

F = S(1, 3, 6, 7) è F = P(?, ?, ?, ?)

91

Standard Forms• Fact:– Canonical forms are very seldom the ones with the

least number of literals• Alternative representation:– Standard form• a term may contain any number of literals

– Two types1. the sum of products2. the product of sums

– Examples: • F1 = y’ + xy + x’yz’• F2 = x(y’ + z)(x’ + y + z’)

92

Example: Standard Forms• F1 = y’ + xy + x’yz’• F2 = x(y’ + z)(x’ + y + z’)

93

Example: Standard Forms• F1 = y’ + xy + x’yz’• F2 = x(y’ + z)(x’ + y + z’)

‘

94

Nonstandard Forms• Example:§ F3 = AB(C+D) + C(D + E)§ This hybrid form yields three-level implementation

– The standard form: F3 = ABC + ABD + CD + CE

D

A

F3

B

C

C

ED

ABC

F3

ABD

DC

CE

95

Complexity of Digital Circuits

• Directly related to the complexity of the algebraic expression we use to build the circuit.

• Truth table– may lead to different implementations– Question: which one to use?

Gate-Level Minimization

• Finding an optimal gate-level implementation of Boolean functions.– So far: ad hoc.• Difficult to perform manually

• Need a more systematic (algorithmic) way– Can use computer-based logic synthesis tool• Exp: espresso logic minimization software

– Karnough Map (K-map) can be used for manual design of digital circuits.

The Map Method• The truth table representation of a function is unique.• But, not the algebraic expression– Several versions of an algebraic expression exist.– Difficult to minimize algebraic functions manually.

• The map method is a simple proceure to minimize Boolean functions.– Pictorial form of a truth table.– Called Karnough Map or K-Map.• Boolean expressions can be minimized by combining terms• This way, K-maps minimize equations graphically

98

Two-Variable K-Map• Two variables: x and y

à 4 minterms:• m0 = x’y’ à 00• m1 = x’y à 01• m2 = xy’ à 10• m3 = xy à 11

• Four squares (cells) for four minterms

• Figure (b) shows the relationship between the squares and the variables xand y.

yx 0 1

0 m0 m1

1 m2 m3

yx 0 1

0 x’y’ x’y1 xy’ xy

99

Example: Two-Variable K-Map

ØF = m0 + m1 + m2 = x’y’ + x’y + xy’ØF = …ØF = …ØF = …

yx 0 1

0 1 11 1 0

Remember the Shortcuts

Øx + x = x ↔ x · x = x

Øx + 1 = 1 ↔ x · 0 = 0

Øx + xy = x ↔ x · (x+y) = x [Absorption]

Ø(x + y)’ = x’ · y’ ↔ (x.y)’=x’+y’ [DeMorgan]

101

Example: Two-Variable K-Map

ØF = m0 + m1 + m2 = x’y’ + x’y + xy’ØF = …ØF = …ØF = …ØF = x’ + y’

• We can do the same optimization by combining adjacent cells.

yx 0 1

0 1 11 1 0

102

Example: Two-Variable K-MapStrategy: 1. Cover as many adjacent 1 cells as possible by the orders of two in circles in each

direction– e.g., 1x1, 1x2, 2x1, 2x2, 1x4, 4x1, 2x4, 4x2, 4x4, ...– Every 1 must be circled at least once.– Each circle must be as large as possible– Adjacency is established either vertically or horizontally (not diagonally: cells

touching each other by corners only are not adjacent ) 2. Express each circle as a product of literals by only including the literals that are

the same (all true or all complement) in the circle3. Form the final expression by OR(+)ing the circle expressions

yx 0 1

0 1 11 1 0

Chapter 2 <103>

• Complement: variable with a bar over itA, B, C

• Literal: variable or its complementA, A, B, B, C, C

• Implicant: product of literalsABC, AC, BC

• Prime implicant: implicant corresponding to the largest circle in a K-map

K-Map Definitions

104

Example: Two-Variable K-MapStrategy: 1. Cover as many adjacent 1 cells as possible by the orders of two in circles in each

direction– e.g., 1x1, 1x2, 2x1, 2x2, 1x4, 4x1, 2x4, 4x2, 4x4, ...– Every 1 must be circled at least once.– Each circle must be as large as possible– Adjacency is established either vertically or horizontally (not diagonally: cells

touching each other by corners only are not adjacent ) 2. Express each circle as a product of literals by only including the literals that are

the same (all true or all complement) in the circle3. Form the final expression by OR(+)ing the circle expressions

yx 0 1

0 1 11 1 0

Two-Variable K-Map (Cont.)• May only be useful to represent 16 Boolean

functions.


functions.– Exp: If m1=m2=m3=1 then

m1+m2+m3=x’y+xy’+xy=x+y (OR function)


functions.– Exp: If only m3=1 then

m1=xy (AND function)


functions.– Exp: If only m3=1 then

m1=xy (AND function)

Three-Variable Map• There are 8 minterms for 3 variables.• So, there are 8 squares.

Three-Variable Map• Minterms are arranged not in a binary sequence, but in a

sequence similar to the Gray code.• Adjacent squares: they differ by only one variable, which is

complement (primed) in one square and true (not primed) in the other§ m2 « m6 , m3 « m7 § m2 « m0 , m6 « m4

Three-Variable Map (Cont.)• For instance, the square for square m5

corresponds to row 1 and column 01: 101• Another look to m5 is m5=xy’z.• When variables are 0, they are primed (ex: x’).

Otherwise not primed (x).

Three-Variable Map (Cont.)• Two adjacent squares differ by one variable (one primed, the

other is not).– So, they can be minimized– Ex: m5+m7=xy’z+xyz=xz(y’+y)=xz

• try to cover as many adjacent squares as possible by the orders of two.– 1,2,4,8… squares that has the logical value1.

Chapter 2 <113>

C 00 01

0

1

Y

11 10AB

1

0

0

0

0

0

0

1

B C0 00 11 01 1

A0000

0 00 11 01 1

1111

11000000

Y

Example

Chapter 2 <114>

C 00 01

0

1

Y

11 10AB

1

0

0

0

0

0

0

1

B C0 00 11 01 1

A0000

0 00 11 01 1

1111

11000000

Y

Example

Chapter 2 <115>

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

1 0

B C Y0 0 00 1 01 01 1 1

Truth Table

C 00 01

0

1

Y

11 10ABA

0000

0 0 00 1 01 0 01 1 1

1111

0

1

1

1

0

0

0

K-Map

Example

Chapter 2 <116>

C 00 01

0

1

Y

11 10AB

ABC

ABC

ABC

ABC

ABC

ABC

ABC

ABC

1 0

B C Y0 0 00 1 01 01 1 1

Truth Table

C 00 01

0

1

Y

11 10ABA

0000

0 0 00 1 01 0 01 1 1

1111

0

1

1

1

0

0

0

K-Map

Y = AB + BC

Example

Adjacent squares• Squares on opposite edges are adjacent. These adjacent squares

don’t touch each other.>> Circles may wrap around the edges– m0 is adjacent to m2 and m4 is adjacent to m6.– m0+m2=x’y’z’+x’yz’=x’z’(y’+y)=x’z’– m4+m6=xy’z’+xyz’=xz’(y’+y)=xz’

118

In 3-Variable Karnaugh Maps

• 1 alone square represents one minterm with 3 literals

• 2 adjacent squares represent a term with 2 literals

• 4 adjacent squares represent a term with 1 literal

• 8 adjacent squares produce a function that is always equal to 1.

119

Example: Three-Variable K-Map• F1(x, y, z) = S (2, 3, 4, 5)

1

0

10110100yz

x

• F1(x, y, z) =

• F2(x, y, z) = S (3, 4, 6, 7)

yzx 00 01 11 10

0

1

• F2(x, y, z) =

120

Example: Three-Variable K-Map• F1(x, y, z) = S (2, 3, 4, 5)

11

11

00

00

1

0

10110100yz

x

• F1(x, y, z) =

• F2(x, y, z) = S (3, 4, 6, 7)

yzx 00 01 11 10

0 0 0 1 01 1 0 1 1

• F2(x, y, z) =

121

• F1(x, y, z) = S (2, 3, 4, 5)

11

11

00

00

1

0

10110100yz

x

• F1(x, y, z) = xy’ + x’y• F2(x, y, z) = S (3, 4, 6, 7)

yzx 00 01 11 10

0 0 0 1 01 1 0 1 1

• F2(x, y, z) = xz’ + yz

Example: Three-Variable K-Map

122

Example• F1(x, y, z) = S (0, 2, 4, 5, 6)

z

1

0

10110100yz

x

y

x

F1(x, y, z) =

123

Example

111

1

0

001

• F1(x, y, z) = S (0, 2, 4, 5, 6)

z

1

0

10110100yz

x

y

x

F1(x, y, z) =

124

Example

111

1

0

001

• F1(x, y, z) = S (0, 2, 4, 5, 6)

z

1

0

10110100yz

x

y

x

F1(x, y, z) =

Example • F=A’C+A’B+AB’C+BC– Express F as a sum of minterms.• F(A,B,C)=Σ(1,2,3,5,7)

– Find the minimal sum-of-products expression• F=C+A’B

126

Finding Sum of Minterms• If a function is not expressed in sum of minterms

form, it is possible to get it using K-map– Example: F(x, y, z) = x’z + x’y + xy’z + yz

1

0

10110100yz

x

127

Finding Sum of Minterms• If a function is not expressed in sum of minterms

form, it is possible to get it using K-map– Example: F(x, y, z) = x’z + x’y + xy’z + yz

1

0

10110100yz

x

F(x, y, z) = x’y’z + x’yz + x’yz’ + xy’z + xyz

128

Four-Variable K-Map• Four variables: x, y, z, t

>> 8 literals>> 16 minterms

ztxy 00 01 11 1000 m0 m1 m3 m201 m4 m5 m7 m611 m12 m13 m15 m1410 m8 m9 m11 m10

z

t

xy

Four-Variable Map

130

Example: Four-Variable K-MapF(x,y,z,t) = S (0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)

10

11

01

00

10110100zt

xy

F(x,y,z,t) =

131


00

0

0

0

11

111

111

111

10

11

01

00

10110100zt

xy

F(x,y,z,t) =

132


00

0

0

0

11

111

111

111

10

11

01

00

10110100zt

xy

F(x,y,z,t) =

133

Example: Four-Variable K-Map• F(x,y,z,t) = x’y’z’ + y’zt’ + x’yzt’ + xy’z’

10

11

01

00

10110100zt

xy

• F(x,y,z,t) =

134


10

11

01

1011

0000

1000

101100

10110100zt

xy

• F(x,y,z,t) =

135


10

11

01

1011

0000

1000

101100

10110100zt

xy

• F(x,y,z,t) =

Chapter 2 <136>

01 11

01

11

10

00

00

10AB

CD

Y

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

Example

Chapter 2 <137>

01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

Example

Chapter 2 <138>

01 11

1

0

0

1

0

0

1

101

1

1

1

1

0

0

0

1

11

10

00

00

10AB

CD

Y

Y = AC + ABD + ABC + BD

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110111

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

100000

Example

139

Prime Implicants

• Prime Implicant: is a product term obtained by combining maximum possible number of adjacent cells in the map

• If a minterm can be covered by only one prime implicant, that prime implicant is said to be an Essential Prime Implicant.– A single 1 on the map represents a prime implicant if it is

not adjacent to any other 1s.– Two adjacent 1s form a prime implicant, provided that

they are not within a group of four adjacent 1s. – So on

140

Example: Prime Implicants• F(x,y,z,t) = S (0, 2, 3, 5, 7, 8, 9, 10, 11, 13, 15)

ztxy 00 01 11 1000

01

11

10

141


ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1

142


ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1

F(x,y,z,t) = y’t’ + yt + xy’ + zt• Which ones are the essential prime implicants?

143


ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1

• Why are these the essential prime implicants?

144


ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1

• y’t’ – essential since m0 is covered only in it• yt - essential since m5 is covered only in it• They together cover m0, m2, m8, m10, m5, m7, m13, m15


145

Example: Prime Implicants

• m3, m9, m11 are not yet covered. • How do we cover them?• There is actually more than one way.

ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1


146

Example: Prime Implicants

• Both y’z and zt covers m3 and m11.• m9 can be covered in two different prime implicants: xt or xy’

• m3, m11 à zt or y’z• m9 à xy’ or xt

ztxy 00 01 11 1000 1 0 1 101 0 1 1 011 0 1 1 010 1 1 1 1

12

3

4

147

Example: Prime Implicants• F(x, y, z, t) = yt + y’t’ + zt + xt or• F(x, y, z, t) = yt + y’t’ + zt + xy’ or• F(x, y, z, t) = yt + y’t’ + y’z + xt or• F(x, y, z, t) = yt + y’t’ + y’z + xy’• Therefore, what to do

1. Find out all the essential prime implicants2. Then find the other prime implicants that cover the

minterms that are not covered by the essential prime implicants. There are more than one way to choose those.

3. Simplified expression is the logical sum of the essential implicants plus the other implicants

148

Five-Variable Map• Downside:– Karnaugh maps with more than four variables are not

simple to use anymore.– 5 variables à 32 squares, 6 variables à 64 squares– Somewhat more practical way for F(x, y, z, t, w) :

twyz 00 01 11 1000 m0 m1 m3 m201 m4 m5 m7 m611 m12 m13 m15 m1410 m8 m9 m11 m10

twyz 00 01 11 1000 m16 m17 m19 m1801 m20 m21 m23 m2211 m28 m29 m31 m3010 m24 m25 m27 m26

x = 0 x = 1

149

Many-Variable Maps• Adjacency:– Each square in the x = 0 map is adjacent to the

corresponding square in the x = 1 map.– For example, m4 à m20 and m15 à m31

• 6-variables: Use four 4-variable maps to obtain 64 squares required for six variable optimization

• Alternatively: Can use computer programs– Quine-McCluskey method– Espresso method

Five-Variable Map

• Not simple, is not usually used. 5 variables, 32 squares.

151

Example: Five-Variable Map

F(x, y, z, t, w) = S (0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31)

twyz 00 01 11 1000

01

11

10

twyz 00 01 11 1000

01

11

10

x = 0 x = 1

• F(x,y,z,t,w) =

152


F(x, y, z, t, w) = S (0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31)

twyz 00 01 11 1000 1 101 1 111 110 1

twyz 00 01 11 1000

01 1 111 1 110 1

x = 0 x = 1

• F(x,y,z,t,w) =

153


F(x, y, z, t, w) = S (0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31)

twyz 00 01 11 1000 1 101 1 111 110 1

twyz 00 01 11 1000

01 1 111 1 110 1

x = 0 x = 1

• F(x,y,z,t,w) =

Example • An alternative look would be:

155

Product of Sums Simplification• So far simplified expressions from Karnaugh maps are in sum

of products form.

• Simplified product of sums can also be derived from Karnaugh maps.

• Method:– A square with 1 actually represents a “minterm”– Similarly an empty square (a square with 0) represents a

“maxterm”.– Treat the 0s in the same manner as we treat 1s – Combine them as we did for sum-of-products

• We obtain F’ (complement of the function)• Take the complement of F’ : ((F’)’) to obtain F

156

Example: Product of Sums• F(x, y, z, t) = S (0, 1, 2, 5, 8, 9, 10)– Simplify this function in

a. sum of productsb. product of sums

ztxy 00 01 11 1000 1 1 101 111

10 1 1 1

F(x, y, z, t) =

157



ztxy 00 01 11 1000 1 1 101 111

10 1 1 1

F(x, y, z, t) =

158



ztxy 00 01 11 1000 1 1 101 111

10 1 1 1

F(x,y,z,t) = y’t’ + y’z’ + x’z’t

159

Example: Product of Sums1. Find F’(x,y,z,t) in Sum of Products form by

grouping 0’s2. Apply DeMorgan’s theorem to F’ (use dual

theorem) to find F in Product of Sums formzt

xy 00 01 11 1000 1 1 0 101 0 1 0 011 0 0 0 010 1 1 0 1

160

Example: Product of Sums

ztxy 00 01 11 1000 1 1 0 101 0 1 0 011 0 0 0 010 1 1 0 1

1. Find F’(x,y,z,t) in Sum of Products form by grouping 0’s

2. Apply DeMorgan’s theorem to F’ (use dual theorem) to find F in Product of Sums form

161


ztxy 00 01 11 1000 1 1 0 101 0 1 0 011 0 0 0 010 1 1 0 1

F’ = yt’ + zt + xy



162


ztxy 00 01 11 1000 1 1 0 101 0 1 0 011 0 0 0 010 1 1 0 1

F(x,y,z,t) = (y’+t)(z’+t’)(x’+y’)



163


z’

y’t’y’z’x’

F

t

y’tx’y’z’

F

t’

F(x,y,z,t) = y’t’ + y’z’ + x’z’t: sum of products implementation

F = (y’ + t)(x’ + y’)(z’ + t’): product of sums implementation

164

Product of Maxterms• If the function is originally expressed in the

product of maxterms canonical form, the procedure is also valid

• Example: – F(x, y, z) = P (0, 2, 5, 7)

1

0

10110100yz

x

F(x, y, z) =

165



• Example: – F(x, y, z) = P (0, 2, 5, 7)

1

0

10110100yz

x

F(x, y, z) =

0 0

0 0

166



• Example: – F(x, y, z) = P (0, 2, 5, 7)

1

0

10110100yz

x

F(x, y, z) =

0 0

0 0

F(x, y, z) = x’z + xz’

167

Product of Sums• To enter a function F, expressed in product of sums,

in the map1. take its complement, F’2. Find the squares corresponding to the terms in F’,3. Fill these square with 0’s and others with 1’s.

• Example: – F(x, y, z, t) = (x’ + y’ + z’)(y + t)– F’(x, y, z, t) = zt

xy 00 01 11 1000

01

11

10

168

Product of Sums• To enter a function F, expressed in product of sums,

in the map1. take its complement, F’2. Find the squares corresponding to the terms in F’,3. Fill these square with 0’s and others with 1’s.

• Example: – F(x, y, z, t) = (x’ + y’ + z’)(y + t)– F’(x, y, z, t) = zt

xy 00 01 11 1000 0 001

11 0 010 0 0

169

Don’t Care Conditions

• Some functions are not defined for certain input combinations– Such function are referred as incompletely

specified functions– therefore, the corresponding output values do

not have to be defined– This may significantly reduce the circuit

complexity– Example: Four bit binary codes has six unused

combinations.

170

Unspecified Minterms• For unspecified minterms, we do not care what value

the function produces.• Unspecified minterms of a function are called don’t

care conditions.• We use “X” symbol to represent them in a Karnaugh

map.• Useful for further simplification• The Xs in the map can be taken as 0 or 1 to realize the

best simplification. >> A “don't care” (X) is circled (i.e., taken as 1) only if it helps to minimize the equation

171

Example: Don’t Care Conditions

• F(x, y, z, t) = S(1, 3, 7, 11, 15) – function• d(x, y, z, t) = S(0, 2, 5) – don’t care conditions

ztxy 00 01 11 1000 X 1 1 X01 0 X 1 011 0 0 1 010 0 0 1 0

F =

F1 = or

F2 =

172

• F(x, y, z, t) = S(1, 3, 7, 11, 15) – function• d(x, y, z, t) = S(0, 2, 5) – don’t care conditions

ztxy 00 01 11 1000 X 1 1 X01 0 X 1 011 0 0 1 010 0 0 1 0

F =

F1 = or

F2 =

Example: Don’t Care Conditions

173

Example: Don’t Care Conditions• F1 = zt + x’y’ = S(0, 1, 2, 3, 7, 11, 15) • F2 = zt + x’t = S(1, 3, 5, 7, 11, 15) • The two functions are algebraically unequal– But as far as the function F with d is concerned: both

functions are acceptable• Look at the simplified product of sums expression

for the same function F.zt

xy 00 01 11 1000 X 1 1 X01 0 X 1 011 0 0 1 010 0 0 1 0

F’ =F =

174

Example: Don’t Care Conditions• F1 = zt + x’y’ = S(0, 1, 2, 3, 7, 11, 15) • F2 = zt + x’t = S(1, 3, 5, 7, 11, 15) • The two functions are algebraically unequal– But as far as the function F with d is concerned: both

functions are acceptable• Look at the simplified product of sums expression

for the same function F.zt

xy 00 01 11 1000 X 1 1 X01 0 X 1 011 0 0 1 010 0 0 1 0

F’ =F =

Chapter 2 <175>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

01

11

10

00

00

10AB

CD

Y

K-Maps with Don’t Cares

Chapter 2 <176>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y


Chapter 2 <177>

0

C D0 00 11 01 1

B0000

0 00 11 01 1

1111

1

110X11

YA00000000

0 00 11 01 1

0000

0 00 11 01 1

1111

11111111

11

XXXXXX

01 11

1

0

0

X

X

X

1

101

1

1

1

1

X

X

X

X

11

10

00

00

10AB

CD

Y

Y = A + BD + C


183

NAND and NOR Gates • NAND and NOR gates are easier to fabricate

VDD

A

B

C = (AB)’

CMOS 2-input AND gates requires 6 CMOS transistors

CMOS 3-input NAND gates requires 6 CMOS transistors

184

Design with NAND or NOR Gates• It is beneficial to derive conversion rules from

Boolean functions given in terms of AND, OR, an NOT gates into equivalent NAND or NOR implementations

x (x x)’ = x’ è NOT

[ (x y)’ ]’ = x y è ANDxy

(x’ y’ )’ = x + y è OR

x

y

185

New Notation

• Implementing a Boolean function with NAND gates is easy if it is in sum of products form.

• Example: F(x, y, z, t) = xy + zt

xyz

(xyz)’

AND-invert

x’ + y’ + z’xyz

Invert-OR

xy

zt

xy

zt

F(x, y, z, t) = xy + zt

F(x, y, z, t) = ((xy)’)’ + ((zt)’)’

=

ALWAYS USE THIS INTERMEDIATE

FORM WITH BUBBLES TO AVOID

CONFUSION

186

The Conversion Method

• Example: F(x, y, z) = S(1, 3, 4, 5, 7)

xy

zt

yzx 00 01 11 10

0 1 11 1 1 1

F = z + xy’

F = (z’)’ + ((xy’)’)’

y

zt

x

[ (xy)’ (zt)’ ] ’((xy)’)’ + ((zt)’)’ = xy + zt =

187

Example: Design with NAND Gates

• Summary1. Simplify the function 2. Draw a NAND gate for each product term3. Draw a NAND gate for the OR gate in the 2nd level, 4. A product term with single literal needs an inverter in

the first level. Assume single, complemented literals are available.

F = z + xy’

x

z’

y’

F

x

z’

y’

F

F = (z’)’ + ((xy’)’)’

188

Multi-Level NAND Gate Designs• The standard form results in two-level

implementations• Non-standard forms may raise a difficulty• Example: F = x(zt + y) + yz’

4-level implementation

zt

x

yF

yz’

Example: Multilevel NAND…

F

F = x(zt + y) + yz’

zt

F

y’

xyz’

zty’

xyz’

MUST COMPENSATE FOR EVERY NON-COUPLED BUBBLE

190

Design with Multi-Level NAND Gates

Rules1. Convert all AND gates to NAND gates2. Convert all OR gates to NAND gates3. Insert an inverter (one-input NAND gate) at

the output if the final operation is AND4. Check the bubbles in the diagram. For every

bubble along a path from input to output there must be another bubble. If not so, complement the input literal

191

Another (Harder) Example• Example: F = (xy’ + xy)(z + t’) – (three-level implementation)

x

z

y’

yx

F

t’

192

Example: Multi-Level NAND Gates

G = [ (xy’ + xy)(z’ + t) ]’

F = (xy’ + xy)(z + t’)

F = (xy’ + xy)(z + t’)

x

z’

y’

yx

t

F = (xy’ + xy)(z + t’)

x

z’

y’

yx

t

193

Design with NOR Gates• NOR is the dual operation of NAND.– All rules and procedure we used in the design with

NAND gates apply here in a similar way.– Function is implemented easily if it is in product of

sums form.(x + x)’ = x’ è NOT

[ (x+ y)’ ]’ = x + y è OR

(x’ + y’ )’ = x · y è AND

x

xy

x

y

=

195

Example: Design with NOR Gates• F = (x+y) (z+t) w

F = (x + y) (z + t) w

zt

xy

F

w

zt

xy

w’

Example: Design with NOR Gates• F = (xy’ + zt) (z + t’)

zt

xy’

F

zt’

F = [((x’ + y)’ + (z’ + t’)’)’ + (z + t’)’]’= ((x’ + y)’ + (z’ + t’)’)(z + t’)= (xy’ + zt) (z + t’)

z’t’

x’y

zt’

Harder Example• Example: F = x(zt + y) + yz’zt

x

yF

yz’

F

z’t’

y

x’

z

y’

198

Exclusive-OR Function• The symbol: Å

Øx Å y = xy’ + x’yØ(x Å y)’ = xy + x’y’

• Properties1. x Å 0 = x2. x Å 1 = x’3. x Å x = 04. x Å x’ = 15. x Å y’ = x’ Å y = (x Å y)’ : XNOR

• Commutative & AssociativeØx Å y = y Å x Ø(x Å y) Å z = x Å (y Å z)

199

Exclusive-OR Function• XOR gate is not universal– Only a limited number of Boolean functions can be

expressed in terms of XOR gates• XOR operation has very important applications in

arithmetic and error-detection circuits.• Odd Function

(x Å y) Å z = (xy’ + x’y) Å z = (xy’ + x’y) z’ + (xy’ + x’y)’ z= xy’z’ + x’yz’ + (xy + x’y’) z= xy’z’ + x’yz’ + xyz + x’y’z= S (4, 2, 7, 1) yz

x 00 01 11 100 0 1 0 11 1 0 1 0

XOR Implementations

201

Odd Function• If an odd number of variables are equal to 1, then

the function is equal to 1.• Therefore, multivariable XOR operation is

referred as the Odd function.

yzx 00 01 11 10

0 0 1 0 11 1 0 1 0

Odd function

yzx 00 01 11 10

0 1 0 1 01 0 1 0 1

Even function

Odd Function

• n variable XOR function is odd function defined as– The logical sum of the 2n/2 minterms whose

binary numerical values have an odd number of 1’s. If n=3, 4 minterms have odd number of 1’s.

203

Odd & Even Functions

• (x Å y Å z)’ = ((x Å y) Å z)’

xy

z

x Å y Å z Odd function

xy

z

(x Å y Å z)’

Parity Generation

• A parity bit is an extra bit included with a binary message– e.g., odd parity: If number of 1’s is odd, parity bit

is 1; else 0.

• The circuit that generates the parity bit in the transmitter is called parity generator.

• Parity bit can be generated using XOR function.

3-Bit Parity Generator

Parity Checker

• Bits are transmitted to the destination with parity.

• The circuit that checks the parity in the receiver is called a parity checker.

• Parity checker can be implmeneted with XOR gates.

3-Bit Parity Checker

208

Adder Circuit for Integers

• Addition of two 2-bit numbers§ Z = X + Y§ X = (x1 x0) and Y = (y1 y0)§ Z = (z2 z1 z0)

• Bitwise addition1. z0 = x0 Å y0 (sum)

c1 = x0 y0 (carry)2. z1 = x1 Å y1Å c1

c2 = x1 y1 + x1 c1 + y1 c1

3. z2 = c2

209

FA

Adder Circuit

c2= z2

x0y0

z0

c1

x1

z1

y1

z0 = x0 Å y0

c1 = x0 y0

z1 = x1 Å y1 Å c1

c2 = x1 y1 + x1 c1 + y1 c1z2 = c2

Comparator Circuit

• F( X>Y ) X = (x1 x0) and Y = (y1 y0)

210

y1 y0x1 x0 00 01 11 10

00011110

• F( X>Y ) X = (x1 x0) and Y = (y1 y0)

211

y1 y0x1 x0 00 01 11 10

00 0 0 0 001 1 0 0 011 1 1 0 110 1 1 0 0

F(x1, x0, y1, y0) = x1y1‘ + x1x0y0‘ + x0y0‘y1‘

Comparator Circuit

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Digital Design and Computer Architecture, 2nd Editionbbm231/files/Part_3.pdf · 2020. 10. 26. · Chapter 2 Digital Design and Computer Architecture, 2ndEdition Part 3 David