3626 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 10, OCTOBER 2011

DIBL-Induced Program Disturb Characteristics in32-nm NAND Flash Memory Array

Myounggon Kang, Student Member, IEEE, Wookghee Hahn, Il Han Park, Juyoung Park, Youngsun Song,Hocheol Lee, Changgyu Eun, Sanghyun Ju, Kihwan Choi, Youngho Lim, Seunghyun Jang,

Seongjae Cho, Member, IEEE, Byung-Gook Park, Member, IEEE, and Hyungcheol Shin, Senior Member, IEEE

Abstract—In this brief, we have investigated the program dis-turb characteristics caused by drain-induced barrier lowering(DIBL) in a 32-nm NAND Flash memory device. It was found thatthe VTH shift of the (N+ 2)th erased state cell is larger than thatof the (N+ 1)th erased state cell if it is assumed that the channelof the N th cell is cut off. It is revealed that the cut off is causedby a cell-to-cell coupling effect that is becoming more severe in thedevelopment of high-density Flash memory arrays.

Index Terms—Cell-to-cell interference, drain-induced barrierlowering (DIBL), gate-induced drain leakage (GIDL), hot-carrierinjection (HCI), NAND string.

I. INTRODUCTION

IN ORDER TO MEET incessantly increasing market de-mands on high-density Flash memory devices, various ef-

forts for scaling down devices and realizing multilevel cell(MLC) NAND Flash technologies have been made in many as-pects. However, the aggressive device shrinkage has given riseto reliability issues such as program disturbance and cell-to-cellinterference, which make it more difficult to develop new Flashmemory products in time to market. In a program operation ofa NAND Flash memory array, the cells on a selected wordline(WL) are either programmed or program inhibited dependingon operating schemes. To inhibit a cell properly, the channelpotential of the cell should be high enough to reduce electricalfield across the tunnel oxide to avoid Fowler–Nordheim tun-neling. The conventional inhibition technique is self-boostingby which the channel potential is spontaneously raised when ahigh program voltage is applied to the selected WL [1]. Under atypical program bias condition, the channel potential is mainly

Manuscript received October 14, 2010; revised May 27, 2011 and June 26,2011; accepted June 22, 2011. Date of publication August 1, 2011; date of cur-rent version September 21, 2011. This work was supported by Samsung Elec-tronics Corporation. The review of this brief was arranged by Editor R. Huang.

M. Kang is with the Interuniversity Semiconductor Research Center andthe School of Electrical Engineering and Computer Science, Seoul NationalUniversity, Seoul 151-742, Korea, and also with the Flash Design Team,Memory Division, Device Solutions Business, Samsung Electronics Company,Ltd., Hwasung 445-701, Korea (e-mail: kang77@snu.ac.kr).

W. Hahn, I. H. Park, J. Park, Y. Song, H. Lee, C. Eun, S. Ju, K. Choi, andY. Lim are with the Flash Design Team, Memory Division, Device SolutionsBusiness, Samsung Electronics Company, Ltd., Hwasung 445-701, Korea.

S. Jang and H. Shin are with the Interuniversity Semiconductor ResearchCenter and the School of Electrical Engineering and Computer Science, SeoulNational University, Seoul 151-742, Korea.

S. Cho and B.-G. Park are with the Department of Electrical Engineering,Stanford University, Stanford, CA 94305 USA.

Color versions of one or more of the figures in this brief are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2011.2161313

determined by two factors, i.e., pass-voltage Vpass level andstring pattern, deciding a set of bias levels and the programstates of unselected WLs, respectively. However, as the NAND

Flash memory device is scaled down, the initial potentials ofself-boosted channels are not reaching as high values as thosefor long-channel devices during a program operation due tothe leakage current generated by gate-induced drain leakage(GIDL) and drain-induced barrier lowering (DIBL) [2], [3]. Asthe NAND Flash memory device is shrunken, the DIBL-inducedprogram disturb becomes a more serious issue.

In this brief, we characterized and modeled the programdisturb by DIBL using experiments in the array of 32-nm NAND

Flash memory devices [4]. Also, new phenomena resulted fromDIBL were described and analyzed in detail. The programdisturb by DIBL could be larger compared with that by GIDLdepending on the Vpass and bitline (BL) voltage VBL levelsand the string pattern. The measurement results prove that theexcessively boosted channel potential due to local self-boostingshould be controlled in the operation of the short-channel MLCNAND Flash memory devices.

II. EXPERIMENTAL RESULTS AND NEW PHENOMENA

It has been known that the cells near the ground select line(GSL) such as WL0 and WL1 in Fig. 1(a) undergo more severeprogram disturbance compared with other cells in the string [5].Under the conditions, hot carriers (both electrons and holes) aregenerated at the drain side of the GSL transistor by GIDL.

The electrons get higher energies during the drifts by a lateralelectric field and are finally injected into the floating gate (FG)of cells of which gate bias is high enough to attract them,as shown in Fig. 1(a). Also, hot-carrier injection (HCI) mighthappen at the cells in the middle of a string depending on biasconditions during a program operation, as shown in Fig. 1(b)[6], [7]. If the selected cell is programmed to have higher VTH,state P3 (VTH = +5.0 V), i.e., an HCI effect by GIDL in themiddle cell of a string, becomes more prominent. Fig. 1(c)schematically shows the DIBL current in an inhibited NAND

string. If the cell size is scaled down to 32 nm and the selectedcell is programmed to have VTH = +1.0 V (state P1), the hot-carrier program disturb is mainly caused by the DIBL currentrather than by the GIDL current due to the larger channelpotential difference. Also, by a local self-boosting method inthe MLC NAND Flash operation, the boosted channel potentialon the drain side of the channel cutoff cell goes higher than8.0 V in an inhibited string. Fig. 2(a) shows the bias condition

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KANG et al.: DIBL-INDUCED PROGRAM DISTURB CHARACTERISTICS IN FLASH MEMORY 3627

Fig. 1. Current components in string operations. GIDL current in an inhibitNAND string (a) on the GSL side, (b) with a middle cell in state P3 (VTH =+5.0 V), and (c) with a middle cell in state P1 (VTH = +1.0 V).

and the measurement pattern for a program-inhibited NAND

string to investigate the DIBL effect. In an actual program oper-ation, it is not possible to physically probe the boosted channelpotential and read the BL current. The bias condition forthe DIBL measurement accurately emulated for the program-inhibited NAND string. Strings consisted of 64 cells with poly-Si FGs, and two dummy WLs were fabricated at the 32-nmtechnology node [4]. Before the actual measurements, all thecells were erased to have VTH = −3 V. Then, a selected cell ineach array was programmed to be in state P1 (VTH = +1 V),which was followed by VTH monitoring of the unselected cells.Regarding the unselected cells, the increment of VTH fromthe initial VTH value of −3 V corresponds to the amount ofHCI induced by DIBL at the pattern and bias conditions inFig. 2(a). To investigate the program disturb, we measured thepunchthrough voltage BVDSS curve regarding the EP1 (eraseand program to P1 state to have VTH = 1 V) pattern of whichcharacteristics are substantially affected by the punchthroughbetween source and drain junctions, as shown in Fig. 2(b) [2].When VBL = 8.0 V was applied to the drain of cell WL31,the VTH values of all the cells, i.e., WL32, WL33, and WL34,were shifted from the initial value of −3 V after the BVDSS

measurement. Fig. 2(c) shows the unwanted VTH shifts of thecells in the erase states. It is noticeable that the VTH shift of cellWL33 is larger than that of cell WL32. The inset in Fig. 2(c) ismagnifying the VTH shifts of WL32 and WL33 in comparisonwith a previous research result [2].

III. SIMULATION RESULTS AND DISCUSSION

As the NAND Flash memory cell is scaled down, the cell-to-cell interference caused by capacitive coupling becomes one ofthe most serious issues in achieving high-density Flash memorydevices [8]–[12]. Parasitic capacitances due to the couplingbetween FGs or between the FG and the control gate, as shown

Fig. 2. Measurement results. (a) Bias conditions and measurement pattern fora program-inhibited NAND string. (b) BVDSS curve of a P1 pattern on WL31.(c) VTH shifts from initially erased states after BVDSS measurements.

Fig. 3. Electrical coupling among cells. (a) Parasitic capacitance amongcells. (b) Schematic view of coupling effects in a MLC NAND Flash string.(c) Simulated electron tunneling rates to the FGs by cells.

in Fig. 3(a), cannot be neglected any more in the 32-nm NAND

Flash memory devices of current technology. Fig. 3(b) showsa schematic for illustrating the coupling effects in Fig. 2(c)for a string. The electric field is formed by the potentialdifference along the channel, which raises the probability ofimpact ionization. The electrons that were generated by thisionization and injected into the FGs and the lucky electrons

3628 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 10, OCTOBER 2011

Fig. 4. TCAD simulation results. (a) DIBL currents as a function of VBL withdifferent Vpass values. (b) ID–VG curve of the WL31 cell. The points in theindicated region trace the current level corresponding to the each Vpass from4 to 9 V. Program disturbances along the string with (c) varying Vpass and(d) VBL values.

[13] are located above the tunnel oxide. The DIBL-inducedprogram disturb by the HCI program mechanism for MLCNAND Flash memory devices is resulted from the electronsinjected in a diagonally upward direction by the combinationof a vertical electric field due to Vpass and a lateral field. Due toa coupling in a WL direction, the vertical electric field for thecell WL32 is smaller than that of cell WL33 since the appliedbias on cell WL31 is 0 V. For this reason, the VTH shift ofcell WL32 is smaller than that of cell WL33. Fig. 3(c) showsthe rates of electron tunneling from channel to FGs simulatedby technology computer-aided design (TCAD). The electrontunneling rate in cell WL33 is higher than that in cell WL32,which supports the experimental result shown in Fig. 2(c).Although the coupling ratios in cells WL32 and WL33 inferredby TCAD results can be relatively low compared with thosefrom measurement results due to the absence of a few realisticmodels and parameters, the experimental results are stronglysupported by the simulations in explaining the difference inWL32 and WL33.

In order to confirm the leakage-current dependence on Vpass

under the DIBL condition, the BVDSS curves were obtained atdifferent Vpass values. Fig. 4(a) shows the DIBL current as afunction of VBL with variation on Vpass. Higher Vpass increasedthe DIBL current. The undesirable VTH shift of a neighboringcell (victim cell) induced by that of a cell to be operated(aggressor), i.e., cell-to-cell interference, was significant. Achange in Vpass by 1 V on the aggressor resulted in a VTH shiftof 0.1 V at the victim cell in a WL direction, which originatedfrom the capacitive coupling between those two cells. Theincrements in IBL by adjusting Vpass by 1 V step are matchedwith those in ID by the change in the gate voltage of cell WL31by 0.1 V, as shown in Fig. 4(b). The points in the indicatedregion trace the current level for the Vpass values from 4 to9 V. Fig. 4(c) shows disturbance characteristics of the cells with

various Vpass levels at VBL = 3.0 V. As Vpass was lowered, thecell VTH shift was also decreased due to reduction of the DIBLcurrent. Fig. 4(d) depicts the disturbance characteristics of cellsalong the string with varying VBL levels. Also, it was shown thatthe VTH shift of cell WL33 was larger than that of cell WL32due to the increased lateral field at various VBL values.

IV. CONCLUSION

An unpredicted phenomenon has been observed, and aDIBL-based modeling has been carried out for the first timein the 32-nm MLC NAND Flash memory array. The actualmeasurement data describe that an excessively boosted channelpotential results in the punchthrough current in the cutoff cell.If the cell in a cutoff state is numbered as the N th cell, the VTH

shift of the (N+ 2)th cell in an erased state was larger thanthat of the (N+ 1)th one in an erased state due to cell-to-cellcoupling effects.

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KANG et al.: DIBL-INDUCED PROGRAM DISTURB CHARACTERISTICS IN FLASH MEMORY 3629

Myounggon Kang (S’10), photograph and biography not available at the timeof publication.

Wookghee Hahn, photograph and biography not available at the time ofpublication.

Il Han Park, photograph and biography not available at the time of publication.

Juyoung Park, photograph and biography not available at the time ofpublication.

Youngsun Song, photograph and biography not available at the time ofpublication.

Hocheol Lee, photograph and biography not available at the time ofpublication.

Changgyu Eun, photograph and biography not available at the time ofpublication.

Sanghyun Ju, photograph and biography not available at the time ofpublication.

Kihwan Choi, photograph and biography not available at the time ofpublication.

Youngho Lim, photograph and biography not available at the time ofpublication.

Seunghyun Jang, photograph and biography not available at the time ofpublication.

Seongjae Cho (S’07–M’10), photograph and biography not available at thetime of publication.

Byung-Gook Park (M’90), photograph and biography not available at the timeof publication.

Hyungcheol Shin (S’92–M’93–SM’00), photograph and biography notavailable at the time of publication.