IC Modeling

Device Modeling of Delay Using PSpice

15OCT2014Bee Technologies IncTsuyoshi Horigome

Equivalent Circuit

R 11 0 0 M E G

R 21 0 0 M E G

D e la y _ O S C

D e la y _ I N

00

1

IN-

OUT+

OUT-

IN+G 1

if (V (D e la y _ I N )<1 & V (D e la y _ O S C )>3 , 1 m , 0 )

G V A L U E

IN-

OUT+

OUT-

IN+

G 2

if (V (D e la y _ I N )>3 & V (D e la y _ O S C )>3 , 1 m , 0 )G V A L U E

C 11 n

I C = 0

IN-

OUT+

OUT-

IN+G 3

if (V (C A L _ 0 1 )>3 . 5 , 1 m , 0 )G V A L U E

IN-

OUT+

OUT-

IN+

G 4

if (V (C A L _ 0 1 )<0 . 0 1 , 1 m , 0 )G V A L U E

R 31 0 0 M E G

0 0

0

0

0

C A L _ 0 1 I N _ D e la y _ P

IN+IN-

OUT+OUT-

E 1if (V (I N _ D e la y _ P , I N _ D e la y _ M )>0 . 0 1 , 5 , 0 )

E V A L U E

IN+IN-

OUT+OUT-

E 2

if (V (D e la y _ O U T)>4 , {L V }, {H V })

E V A L U E

R 4

1 0

C 21 0 p

I C = 0

1

R 51 0 0 M E G

0

0

0

0

R L1 0 0 M E G

0

D e la y _ O U T

V

V

V

I N _ D e la y _ M

PARAMETERS:H V = 2 . 5

L V = 1 . 2 5

V 15 V d c

V 2

TD = 0

TF = 1 nP W = 1 uP E R = 1 0 u

V 1 = 0

TR = 1 n

V 2 = 5

0

0

Delay

Simulation

Input

Output

OSC

Node of CAL_01

Delay Time