DEVICE MODELING AND ADVANCED 2-DTCAD ...summit.sfu.ca/system/files/iritems1/11821/etd6791...MASc. Device modeling and advanced 2d tcad simulation of multifinger photogate APS for enhanced

DEVICE MODELING AND ADVANCED 2-D TCADSIMULATION OF MULTIFINGER PHOTOGATE APS FOR

ENHANCED SENSITVITY

by

Phanindra V.R.H. KalyanamB.E., Anna University (India), 2005

THESIS SUBMITTED IN PARTIAL FULFILLMENT OFTHE REQUIREMENTS FOR THE DEGREE OF

MASTER OF APPLIED SCIENCE

In theSchool of Engineering Science

Faculty of Applied Sciences

© Phanindra Kalyanam, 2011

SIMON FRASER UNIVERSITY

Summer 2011

All rights reserved. However, in accordance with the Copyright Act of Canada,this work may be reproduced, without authorization, under the conditions for FairDealing. Therefore, limited reproduction of this work for the purposes of private

study, research, criticism, review and news reporting is likely to be in accordancewith the law, particularly if cited appropriately.

----_ .. - .

APPROVAL

Name:

Degree:

Title of Thesis:

Examining Committee:

Chair:

Date Defended/Approved:

PHANINDRA V R H KALYANAM

MASc.

Device modeling and advanced 2d tcad simulationof multifinger photogate APS for enhancedsensitivity

Dr. Behraad Bahreyni, PEngAssistant Professor, Engineering Science

Senior SupervisorDr. Ash M Parameswaran, PEng

Professor, Engineering Science

SupervisorDr. Glenn H Chapman, PEngProfessor, Engineering Science

External ExaminerDr. Israel KorenUniversity of Maschusetts at Amherst

ii

Last revision: Spring 09

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iii

ABSTRACT

Multifinger photogate Active Pixel Sensor (APS) design employs a finger-

like photogate pattern for better collection of light entering through the gaps

between gate fingers. This design feature compensates for the significant light

absorption caused by the polysilicon gate of the present day CMOS image

sensors and has been experimentally verified. In order to optimize the multifinger

design, a systematic theoretical analysis is required.

In this study, advanced TCAD device simulations were used to analyse

and predict the performance of multifinger photogate APS fabricated through

CMOS 0.18m technology with a device physics perspective. The formation of

the potential well under the photogate and its spreading in the open spaces

between adjacent gate fingers is observed. Sensitivities of various designs with

reducing gate widths of 0.5µm, 0.25µm and 0.18µm and increasing the number

of gate fingers were estimated to address the trade off between open spacing

between the fingers and the strength of potential well created in the open area.

Pixel response of all the designs were measured over visible spectrum

using optical simulations to predict the optimum design with maximum sensitivity

gain.

Keywords: Polygate; Multifinger photogate; APS; Active pixel sensor; CMOS Image sensor; TCAD; sdevice

iv

DEDICATION

I dedicate this thesis to my parents Padminikumari and Balakrishna for their

unconditional love and support.

v

ACKNOWLEDGEMENTS

I would first like to thank my supervisor, Dr. Glenn H Chapman, who had

been the motivation behind my success and completion of this thesis. His

patience, knowledge and dedication towards research have always been awe-

inspiring. I would also like to express my immense gratitude to my senior

supervisor, Dr. Ash M Parameswaran for introducing me to this wonderful world

of research and innovation. I am deeply indebted to him for his critically important

decisions and timely suggestions given to shape my successful graduate career

at SFU. My special thanks go to Jenny Leung for sharing her experience and

valuable guidance to start this thesis project.

I would like to thank all my lab mates and friends for their support and

cooperation along the way. This graduate experience would not be the same

without you. Especially, I am thankful to Sumanpreet Chhina and Avneet Bajwa

with whom I had the most memorable and happiest moments during my stay at

SFU.

vi

TABLE OF CONTENTS

Approval .......................................................................................................................... ii

Abstract .......................................................................................................................... iii

Dedication ..................................................................................................................... iv

Acknowledgements ......................................................................................................... v

Table of Contents ........................................................................................................... vi

List of Figures................................................................................................................ viii

List of Tables .................................................................................................................. xi

1: Introduction ............................................................................................................... 1

1.1 History of Image sensors. ........................................................................................ 3

1.1.1 Photo gate Vs Photo diode .......................................................................... 6

1.2 Multifinger Photogate Approach .............................................................................. 7

1.3 Research Objectives and Goals .............................................................................. 9

1.4 Organization of the thesis ...................................................................................... 11

2: Theory and background ......................................................................................... 13

2.1 Basics of Semiconductor Photodetectors. ............................................................. 13

2.1.1 Photodiode ................................................................................................ 14 2.1.2 Photogate .................................................................................................. 18

2.2 Active Pixel Sensors ............................................................................................. 20

2.2.1 Photodiode APS ........................................................................................ 20 2.2.2 Photogate APS .......................................................................................... 23

2.3 Sensitivity .............................................................................................................. 27

2.4 Quantum efficiency ............................................................................................... 27

2.5 Drawbacks with the standard photogate APS design ............................................ 30

3: The multifinger photogate APS .............................................................................. 33

3.1 Concept of the multifinger photogate APS ............................................................. 33

3.1.1 Measured multifinger response .................................................................. 36

3.2 Response of the multifinger designs ...................................................................... 37

3.3 Summary of the experimental work conducted on multifinger photogate APS designs. ................................................................................................................ 40

3.4 Questions to be answered with the help of simulations. ........................................ 41

4: Device simulations .................................................................................................. 43

4.1 Setup and procedure ............................................................................................. 43

4.2 Results and Analysis ............................................................................................. 49

4.3 Chapter Summary ................................................................................................. 52

vii

5: Advanced 2-d tcad device simulations to enhance the sensitivity of multifinger photogate aps designs ............................................................................ 54

5.1 Device structure generation and design ................................................................ 55

5.1.1 Doping and Mesh generation ..................................................................... 55 5.1.2 Theoretical models and simulation set-up .................................................. 57

5.2 Simulation results for experimental designs .......................................................... 59

5.3 Simulation results .................................................................................................. 62

5.4 Efficiency Estimation ............................................................................................. 71

5.5 Summary............................................................................................................... 80

6: Simulating Photocarrier generation in multifinger photogate aps designs to achieve enhanced collection efficiency. ............................................................... 82

6.1 Simulation setup.................................................................................................... 82

6.1.1 Device simulation ...................................................................................... 83

6.2 Results .................................................................................................................. 85

6.3 Sensitivity estimation and analysis ........................................................................ 93

6.3.1 Predications ............................................................................................... 98

6.4 Summary............................................................................................................. 103

7: Conclusion ............................................................................................................ 105

7.1 Experimental work ............................................................................................... 105

7.2 Analysis using device simulations ....................................................................... 107

7.3 Multifinger photogate APS pixel response to simulated optical illumination ......... 109

7.4 Future Work ........................................................................................................ 110

References ................................................................................................................. 112

viii

LIST OF FIGURES

Figure 1: Functional block diagram of a typical digital camera. ........................................ 3

Figure 2: CCD showing the illuminated pixel and movement of charge serially from pixel to pixel and finally converted into voltage at the output node. ......... 4

Figure 3: Individual pixel of a CMOS APS array, showing the photosensitive element and the amplifier transistor. ............................................................... 5

Figure 4: Cross sectional view of a photodiode and a photogate on a silicon substrate. ........................................................................................................ 6

Figure 5: Potential well formation for (a) Standard photogate (b) Multifinger photogate ........................................................................................................ 8

Figure 6: Photon absorption and carrier generation in a semiconductor. ....................... 14

Figure 7: Simple PN junction showing variations in the depletion layer for Unbiased and biased conditions.................................................................... 16

Figure 8 : Photodiode .................................................................................................... 18

Figure 9: Electron-Hole pair generation inside the depeltion region of a photogate MOS-capacitor due to incident illumination.................................................... 19

Figure 10: Schematic circuit of a standard photodiode APS .......................................... 21

Figure 11: Timing diagram and operation cycle of a standard photodiode APS ............. 23

Figure 12: Schematic circuit of a 3-T standard photogate APS ...................................... 24

Figure 13 : Charge collection and transfer in the working of a photogate APS (7) ......... 25

Figure 14: Timing cycle for the operation of a standard photogate APS ........................ 26

Figure 15 : Single silicon crystal absorption coefficient vs photon energy[14] ................ 30

Figure 16: Pixel layouts of experimental standard and multifinger designs [7], [10], [15] ........................................................................................................ 34

Figure 17: Sensitivty ratio with respect to standard photogate vs photogate area for multifinger designs. .................................................................................. 38

Figure 18: cross-sectional view of the standard photogate design ................................. 45

Figure 19: cross-sectional view of the 3-finger photogate design................................... 45

Figure 20: Cross sectional view of a 5-finger photogate design ..................................... 45

Figure 21: cross-sectional view of a 7-finger photogate design ..................................... 45

Figure 22: Device simulations showing the potential well formation under the gate for each of the multifinger designs ................................................................. 49

ix

Figure 23: Simulated outputs showing the equipotential surface of 3, 5 and 7 multifinger photogate APS designs ............................................................... 50

Figure 24 : 2-D simulation design of a 3finger photogate APS. ...................................... 56

Figure 25 : Meshed structure of the 3-finger photogate APS design. ............................. 57

Figure 26: Electron densities simulated at 0.9V for 3 finger, 5 finger, 7 finger multifinger designs with 0.72um gate widths and the standard photogate design. ......................................................................................... 59

Figure 27: Simulated results showing electron concentration in 3 finger APS designs with decreasing gate widths. ............................................................ 60

Figure 28: Electron Density at 0.9V for the 5-Finger design with gate width (a) 0.72µm (b) 0.5µm (c) 0.25µm (d) 0.18µm, 7-Finger design with gate width (e) 0.72µm (f) 0.5µm (g) 0.25µm (h) 0.18 µm, 9-Finger design with gate width (i) 0.5µm (j) 0.25µm (k) 0.18µm ............................................ 64

Figure 29: Electron density for the multifinger designs with 11, 13 and 15 fingers

for narrower gate widths of 0.25 m and 0.18 m ......................................... 66

Figure 30:The lateral spreading of the fringefiled from the edge of the gate into the open space between adjacent fingers for varying gate widths ................. 68

Figure 31:The difference of the depletion layer depth from the center to the edge of the gate finger at 0.9V gate Voltage .......................................................... 69

Figure 32: The difference of the depletion layer depth from center of the gate finger to the center of spacing between adjacent gate fingers at 0.9V gate Voltage. ................................................................................................. 70

Figure 33: Depth of the depletion layer into the substrate at the centre of the Poly-gate finger at 0.9V gate voltage ............................................................ 71

Figure 34: Sensitivity ratio of 0.72µm multifinger designs with respect to standard photogate vs. photogate area ........................................................................ 75




Figure 38: Maximum sensitivity Vs Width of the gate. .................................................... 79

Figure 39: Optical generation profile of a standard photogate APS ............................... 83

Figure 40: Illumination spectrum of the simulated white light source. ............................ 84

Figure 41: Photocarrier collection in the multifinger designs with 0.72um polygate width. ............................................................................................................ 87



x


Figure 45: Multifinger photogate sensitivity Vs photogate under light with respect to the standard photogate. ............................................................................ 97

Figure 46: Experimental results for the fabricated CMOS 180nm multifinger APS designs showing sensitvity Vs photogate area. ............................................. 99

Figure 47: Sensitivity of the multifinger pixels in the dark Vs photogate area with respect to the standard photogate. (Note: The data points represent number of polygate fingers on all plots.) ...................................................... 100

xi

LIST OF TABLES

Table 1: Multi-finger photogate APS poly-finger spacing. (7) ......................................... 35

Table 2: Sensitivity ratio for multifinger photgates relative to the standard photogate. ..................................................................................................... 36

Table 3: Change in sensitivity for multifinger photogates relative to standard photogate. ..................................................................................................... 37

Table 4: Open area sensitivity of multifinger photogate designs. ................................... 38

Table 5: Open area collection efficiency of multifinger photogate designs. .................... 39

Table 6: Dimensions of the simulated standard and multifinger designs. ....................... 47

Table 7: Spacing between the adjacent poly gate fingers edges. Bolded values are where the gate fringing fields do not overlap. .......................................... 73

Table 8: Percentage open area in multifinger photogate designs. ................................. 75

Table 9 : Percentage open area in multifinger photogate designs ................................. 94

Table 10: Simulated results of the total number of photocarriers(x 109/cm3), that are captured by space charge layer of each multifinger design pixel for one exposure cycle. (Bolded values indicate, designs with highest number of collected carriers) ......................................................................... 95

1

1: INTRODUCTION

Vision is our most powerful and complicated sense. It provides us with a

remarkable amount of information about our surroundings and enables us to

interact intelligently with the environment, all without direct physical contact.

Vision allows us to learn the positions and identities of objects and the

relationships between them [1]. Since prehistoric times man’s urge to capture a

moment of time, record and reproduce in the form of imagery, leveraged our

sense of vision. The technique of photography basically evolved from painting

and scupture. In the mid 1800s, a chemical process was invented to record an

image on a flat surface and this quickly transformed into an art as well as a mode

of communication [1].

Until the past decade, traditional film photography was the only way to

capture an image. In this technology, the images were captured on a

photosensitive film, developed with a chemical process and then printed on a

media for display. In today’s digital world, with personal computers and internet

being a part of the daily life, an electronic mode of image capture has born; the

digital photography (DP). In DP the images are captured electronically using a

photo sensor and stored in digital format. This technology gave an important

feature that traditional film based photography found it very difficult to offer,

instant review of the captured image and deletion of unwanted images instantly.

These features were expanded further in current day digital cameras which many

2

hobbyists and professionals find it extremely useful. Images in digital media is

directly compatible with the current day computer age and this has contributed to

the tremendous growth of digital photography in the consumer market in the past

few years.

Figure 1 below shows the functional block diagram of a typical digital

camera. A digital imaging system focuses the image of a scene by a lens onto an

electronic photosensitive surface in the form of a two dimensional array. An array

of such pixels act as photosites for capturing the incoming light. The image

sensor then converts the optical information into an electrical signal, which is

subsequently converted into a digital value using an electric circuit called analog

to digital converter (ADC). Digital values from the different colour channels are

then combined to form a full colour image and recorded into buit-in or removable

memory [2].

3

Figure 1: Functional block diagram of a typical digital camera.

1.1 History of Image sensors.

Currently, the image sensors available in the market can be classified into

two main categories. Charge coupled devices (CCD) and the active pixel sensors

or the APS.

Originally conceived by Bell Labs scientists, Williard Boyle and George

Smith as a form of memory, CCDs proved to be much more useful as image

sensors. CCDs have been the dominant solid-state image sensors since their

introduction in the early 1970s. A CCD image sensor typically consists of an

array of MOS capacitors acting as photosensitive pixels (see Figure 2). Applying

voltage to a MOS capacitor creates a potential well. The incident light creates

electrons by photo-carrier generation which are then collected inside the potential

well. The important point is the photocarriers are integrated over the duration of

the exposure to the light by these array of pixels as charge packets at each pixel.

Pixel Array

Lens

Colour Filter Array

Image sensor

A/D converter

Digital signal processing circuitry

Picture Display

Me

mo

ry S

tora

ge

4

After each exposure, by changing the potential on each pixel, the CCD

moves charge packets like water in a bucket brigade sequentially into the output

node, where the signal is amplified and converted into a voltage signal [3].

Figure 2: CCD showing the illuminated pixel and movement of charge serially from pixel to pixel and finally converted into voltage at the output node.

This type of sequential transfer of charge in CCDs from the point of

collection to integration, provided the advantage of having larger image sensor

dimensions and thus better collection of light, while demanded, multiple operating

voltages and higher power consumption. In addition, CCDs require a completely

different fabrication process and thus cannot accommodate other CMOS

compatible signal process circuitry on the same chip.

The Active Pixel Sensor (APS) technology, proposed by Noble in 1968 [4],

Chamberlain in 1969 [5] and Weimer et al in 1969 [6], was invented almost at the

same time as the CCDs.. With the unstable semiconductor lithography processes

available back then, the APS performance was very poor [3]. In the CMOS APS,

charge is integrated on the pixel during an exposure cycle, which is then

converted as the gate voltage of an output transistor. (see Figure 3) [7]. Turning

Photon to electron conversion in an illuminated pixel.

Charge to voltage conversion at the output node.

CCD

5

the clock 30 years forward to the 1990’s and the towering improvements in the

CMOS process technology made the APS comparable in sensitivity to the CCD.

As CMOS compatible devices, these improvements made APS more

attractive for imaging. APS can be made on the same chip with other signal

processing circuitry, making them smaller, faster, and cheaper.

Figure 3: Individual pixel of a CMOS APS array, showing the photosensitive element and the amplifier transistor.

An important advanatage of the APS is random accessibility of pixels, just

as in devices such as DRAM, which offers the advantage of addressing each

pixel individually with separate addressing lines in APS arrays. The submicron

feature size possible in present day CMOS technology offers cost effective pixels

with low dark-current. Increased amount of research since their re-emergence in

the 90s has led the CMOS APS technology overcome its major drawback of low

signal to noise ratio. At the time of writing this thesis, CMOS image sensors are

replacing CCDs in most of the lower consumer electronics such as security

cameras, video game consoles, cell phone cameras etc., while also also

dominating the high end Digital Camera market, making CMOS APS as the

future technology of digital imaging.

Photosensing element

Source follower

To the row select transistor

6

1.1.1 Photo gate Vs Photo diode

Signal charge generation and collection are the primary tasks of a silicon

pixel. The major categories of design in APS pixels are photo gates and

photodiodes and each type has their own advantages and disadvantages.

Figure 4 shows the cross sectional view of the photodiode and the

photogate on a silicon substrate [3].

Figure 4: Cross sectional view of a photodiode and a photogate on a silicon substrate.

In Photo diodes, a (p-n) junction is formed by ion implantation inside the

silicon substrate that can store photo generated electron hole pairs in the

depletion regions around the junction. Photodiodes are complex structures. While

they demonstrate better sensitivity to even shorter blue wavelengths, the trade-

off is their potentially lower sensitivity than the photogates in the red end of the

spectrum. In addition, additional circuitries that constitute the non-photosensitive

regions in the pixel also reduce the photodiodes full-well capacities.

Depletion regions

p-Si

Incident Light

Photodiode Photogate

n-Si

Polysilicon gate

7

Photo gates are MOS capacitors that create voltage induced potential

wells to store the photo-generated electrons. One of the most important

advantages of photogate APS is their large fill factors. High fill factor allows a

picture to make use of more of the incident photons and hold more photo

generated signal (higher full well capacity). In addition, with high conversion gain,

photo gate APS can show better performance than their photodiode

counterparts. However, a significant disadvantage is the polysilicon material used

as a gate material for the photo gate absorbs most of the incident light, especially

in the shorter blue spectrum.

1.2 Multifinger Photogate Approach

The idea explored in this thesis for reducing the absorption of incident light

by the gate material is by designing a gate which has multiple rectangular

openings in the polysilicon gate but designed in such a way that the gate

operation is changed very little (see Figure 5). Thus, the incident light is able to

penetrate the gate through the holes [8] rather than be absorbed by the poly

gate. Another paper demonstrated a similar concept where the photosensitivity of

the detector is enhanced by splitting the photogate of the photogate APS [9].

In 2007, G.H.Chapman and Michelle La Haye, proposed the multifinger

photogate design to enhance the sensitivity of a photogate active pixel sensor

where the continuous gate of the regular device (Figure 5(a)) is replaced with a

gate composed of many poly fingers (Figure 5(b)). In that work, multifinger

designs with 3, 5 and 7 finger designs were fabricated in 0.18 micron CMOS and

tested experimentally along with the standard (traditional) photogate APS . The

8

results showed significant increases in the efficiencies for the 5 and 7 finger

multifinger designs while the 3 finger design actually showed less sensitivity than

the standard photgate design (see Chapter 3 for more details). These results

suggested that when the fingers are close enough, the fringe fields from adjacent

poly gate fingers overlap in the open spaces to form a uniform potential well

throughout the substrate allowing for additional collection of charges in the open

spaces similar to the standard photogate potential well. Figure 5 illustrates the

initial concept of the potential well that could be formed in the standard and the

multifingered photogate detector designs. The reason explained for the low

efficiency of the 3 finger photogate is that the spacing between fingers is too

large for the fringe fields to form the potential well and hence no charge collection

in open area. Further, it was also experimentally shown that the collection

efficiency of open area is much higher than that of the photogate due to the

absence of poly layer [7].

Figure 5: Potential well formation for (a) Standard photogate (b) Multifinger photogate

p-Si p-Si

Potential Well

Polysilicon gate

SiO2

(a)

Polysilicon gate fingers

SiO2 Gate contact Gate contact

Potential Well

(b)

Open space allowing light to pass through

9

Extending the work on multifinger design approach, J. Leung and G H

Chapman in 2009 performed spectrum response analysis of 3 multifinger designs

fabricated in 0.18µm CMOS process. Their results show a significant 66% of the

incident light is absorbed by polysilicon material on the photogate and thus highly

affecting the sensitivity.

Also, the small poly-fingers possible due to the 0.18µm technology,

allowed for enhanced expansion of the electric field under the gate due to the

fringe fields. This suggested that, the depth of the potential well below the open

area depends on the strength of the fringing field indicating that the orientation

and spacing between the polygate fingers directly affects the carrier collection

under the open area [10]. A more detailed explanation of this work will be

provided in Chapter 3 of the thesis.

1.3 Research Objectives and Goals

With the market share of the CMOS image sensors being dominated by

photodiode APS when compared to the photogate APS due to its current design

limitations, multifinger photogate design proves to be an adept solution. While the

experimental multifinger results proved the concept worked, it was not possible to

measure the actual potential well shapes with those devices.

This thesis explores the multifinger APS from a device physics

perspective. The focus of the research is to model and simulate the tradeoffs in

various multifinger designs to increase the sensitivity. With the help of existing

experimental data, the simulated results are used to understand how the

10

multifinger design collects the photocarriers and projected to investigate ways to

increase the sensitivity. Simulations are performed to study the behaviour of

fringe fields and the regulation of the potential well formed inside the substrate,

which is the main contributor of sensitivity of the multifinger APS.

With the minimum feature size of CMOS technology shrinking day by day,

the present and future technologies give us more options in optimizing the

designs to enhance device performance. For example, the spacing between the

poly fingers in the experimental models of [7] and [10] were not limited by

technology but rather by process specifications. In addition, variation in sensitivity

with respect to wavelength is very low for a photo gate when compared to a

photodiode. Opening spaces in the photo gate enable for better collection.

Hence, designs can be optimized for incident illumination wavelengths.

Thus enabling the photo gate APS have an inherent advantage over the

photodiode APS [7].

Finally, with the study of optical carrier generation, accumulation and

charge transfer for different wavelengths of light, the multifinger photogate APS

designs with enhanced sensitivity are proposed.

All the reasons stated above indicate the wide scope available to enhance

the sensitivity of the multifinger photo gate APS design.

This thesis proposes an enhanced sensitivity model for multifinger

photogate APS with help of advanced 2- dimensional TCAD device simulations.

11

1.4 Organization of the thesis

Chapter 2 introduces the basics of image sensors with a focus on the

characteristics of APS explaining different pixel architectures and types of APS

designs. By comparing the operation of the two types of CMOS photodetectors,

namely photodiode and photogate, this chapter addresses the challenges faced

by the photogate APS in terms of quantum efficiency and sensitivity towards

shorter blue wavelengths due to photon absorption by the polygate.

Chapter 3 provides a brief overview of the previous experimental work

conducted on multifinger photogate designs as an approach to improve the

sensitivity of the present day standard APS design which served as the

foundation for this thesis. Then the chapter puts forth questions that demand the

need for device simulations in order to further increase the sensitivity of the

multifinger designs.

In chapter 4, the benefits of device simulations in analyzing and observing

the behaviour of experimentally tested multifinger photogate designs with a

semiconductor physics perspective is introduced.

Chapter 5 covers the modelling, testing of various multifinger designs using

advanced 2 dimensional TCAD device simulations. The observed shape of the

potential well formed is used as a metric to estimate the efficiencies of each

multifinger design.

Chapter 6 is an extension of simulation and testing of the multifinger

photogate APS designs using optical illumination module to observe the optical

12

carrier generation, carrier transfer characteristics. Then, the results are analyzed

to determine the optimum design.

13

2: THEORY AND BACKGROUND

This chapter provides with a brief overview of the physics of photo

detection in semiconductor materials like silicon as well as the operation of

photodiodes and photo gates. Then, the different pixel APS are explored, with a

focus on the photodiode and photogate. The chapter then continues by

discussing the issues affecting the present day photogate APS design (Standard

photogate APS).

2.1 Basics of Semiconductor Photodetectors.

When light hits any object or surface, most commonly, part of the incident

light is reflected while the rest is absorbed. In a semiconductor, an absorbed

photon with energy greater than the band gap-energy Eg of the material excites

electrons from the valence band Ev to the conduction band Ec, generating

electron-hole pairs. This process is called photogeneration. Figure 6 shows an

illustration of the energy band diagram and the carrier excitation due to incident

light energy.

14

Figure 6: Photon absorption and carrier generation in a semiconductor.

2.1.1 Photodiode

A PN junction is formed when a p-type and an n-type semiconductor make

contact. Such a contact results in the difference in energy levels between the two

semiconductors at the junction called the depletion region. When no voltage is

applied to the junction and at thermal equilibrium, the diffusion of mobile holes in

the p-region and the mobile electrons in the n-region leave positively charged

donors at the n-side edge of the junction and negatively charged donors at the p-

side edge of the junction respectively. This separation of charges at the interface

of the junction forms an internal electric field in the depletion region, preventing

any further recombination of mobile carriers. This internal electric field will have a

built-in potential Vbi. Figure 7(a) shows a PN junction and the depletion region at

zero bias voltage applied. A forward bias, applied to the PN junction will

decrease the electric potential (Vbi) (see Figure 7(b)) thus enabling the diffusion

Conduction band e-

h+ Valence band

Eg

hƲ = Eg

15

of mobile carriers resulting in a net forward current flow. When a reverse bias is

applied, the internal electric potential needed to overcome by the holes and

electrons to diffuse through the junction increases and thus, no current will flow

across the diode ideally. This results in an increase of the width of the junction as

shown in Figure 7(c). However, a negligible leakage current is always present in

a practical reverse biased diode.

The maximum reverse bias at which a p-n junction can operate is marked

as the breakdown voltage.

16

(a) unbiased

(b) Forward biased

(c) Reverse biased

Figure 7: Simple PN junction showing variations in the depletion layer for Unbiased and biased conditions

Figure 8 shows the structure of a typical silicon photodiode consisting of a

p-type material above the n-type silicon forming the active photodetector area

and thin layer of insulting material covering the top of the p region. When light is

incident on the photodiode, photons with sufficient energy will stimulate e-h pairs

throughout the material. When an e-h pair is generated inside the depletion

region, the applied reverse bias causes the carriers to drift towards the

corresponding junctions. This creates a drift current called IDrift, while the carriers

n·~pe

eeeeeeeeeeeeDepletion region unbiased

n-ttPe

IIt:J t:J ri=!Vn'

Depletion region in reverse bias -~

1l<+l <+l

p-JYpe-

I

17

generated outside the depletion region move via the diffusion current IDiffuse.

These drift and diffusion of carriers generate a net photocurrent,

Iph = IDiffuse + IDrift (1)

It should be noted that, in a photodiode, the obtained photocurrent is

directly dependent on the movement of the generated e-h pairs. Thus, during

integration of photocarriers, it is required that more number of carriers are

generated within the depletion region to have the fastest response time. If the

carriers are generated outside the depletion region, they need to diffuse through

the junctions resulting in a slow response time. Although photodiodes can be

optimized for faster response time by extending the reverse bias depletion layer,

such that the absorption length of the desired wavelengths can all be

accommodated within the depletion region, dark current and parasitic

capacitances could pose problems to the sensitivity of the device. In particular

the capacitance of a photodiode, which is created by the PN junction, creates a

significant limit in its sensitivity. Dark current is a thermally generated leakage

current due to the applied reverse bias. The dark current depends on the width of

the junction and temperature. Thus, deep junctions operating at hight

temperatures could suffer from a significant amount of dark current generation.

18

Figure 8 : Photodiode

2.1.2 Photogate

An alternative to photodiodes found commonly in the CMOS image

sensors are the photogates. In photogates, the photogenerated carriers are

captured within the potential well created by the applied gate voltage of an

integrated MOS capacitor. Figure 9 below shows the basic structure a photo gate

consisting of a MOS capacitor with a thin layer of poly-silicon as a gate on top of

a transparent insulation layer in the p-type substrate.

n

19

Figure 9: Electron-Hole pair generation inside the depeltion region of a photogate MOS-capacitor due to incident illumination.

A photogate converts the incident optical signals into accumulated

charges. The applied positive gate voltage on a P substrate repels the majority

holes away which leaves as depletion region with ionized acceptors under the

gate. The depth of this potential well depends on the applied gate voltage (VG),

which in turn determines the capacity of the photogate. During signal integration,

the incident photons passing through the polysilicon gate and the oxide, enter the

potential well and, depending on the wavelengths, generate e-h pairs. Here, the

electrons which are negatively charged accumulate under the gate as charges in

the potential well, while the holes are absorbed by the substrate away from the

gate. In this manner, the optically generated carriers are stored as charges in the

photogate potential well. This stored charge as a measure of the incident light

VG

~....,-+-+----_...I

I , , I

I,ra8_8_8J2~8_8_8;

p.type substrateJ

20

energy, is transferred to outside sensor circuitry to create voltage or a current

signal.

Since, the photogate converts optical signals as accumulated charge, it

gains the capability to sense weak signals. The photogate also has much lower

capacitance than the photodiode. Thus, a photogate can have, in principal,

higher sensitivity than the photodiode. However, the optical properties of the gate

material in absorbing the incident light play an important role in determining the

efficiency of the device, which discussed in later sections.

2.2 Active Pixel Sensors

The typical CMOS APS consists of a photodetector integrated along with

some active circuitry such as an output amplifier etc. The following section

explains the design and operation of the standard 3 Transistor (3T) CMOS APS,

that is widely used. Based on the type of photodetector employed, the CMOS

APS are divided into two categories.

2.2.1 Photodiode APS

The 3T CMOS photodiode APS is currently the most widely used design

due to its simplicity. Figure 10 shows the schematic of the device. In this design

the output of the photodiode is integrated on the gate of the amplifier transistor

M2. The photodiode APS operation follows

21

Figure 10: Schematic circuit of a standard photodiode APS

RESET: The operation starts with turning on the reset transistor M1 which

pre charges the photodiode PD and the amplifier transistor M2. A voltage Vx

approximately equal to VDD – Vth develops at the node X reflected by an effective

capacitance Cx. In this mode, the photodiode is reverse biased and any residual

charge from the previous stage is removed. Note that the capacitance Cx is the

junction capacitance voltage of the photodiode CPD, the smaller gate capacitance

CM2 of the amplifying transistor M2 and other parasitic capacitances.

INTEGRATION: The reset is turned off and the photodiode is exposed to light.

The incident photons induce a photocurrent whose charge is integrated

over time such that

intCollected photoQ i t (2)

X

Reset _

Vdd

M2

- I M3Row --JSelect

L-_Output

22

Where Q is the charge collected due to the photocurrent i during an

integration time of t. This charge collected is converted into voltage at the node X

according to,

Collected

X

QV

C (3)

In practice during the reset phase this accumulated charge decreases the

reset voltage at VX decreasing the voltage on the M2’s gate. This conversion of

charge to voltage is called the conversion gain. The photodiode capacitance is

typically ~10 times larger than the other sources. To maximize the conversion

gain, most pixels minimize the CX capacitance; so that the same voltage is

produced for less amount of charge.

READOUT: In a voltage mediated APS device, another transistor is

placed at the output connecting the column line. Thus, the voltage at the node X

is reflected at the output. Here, the amplifier transistor M2 acts as a buffer for the

output. On the other hand, in current mediated APS device, the gate voltage of

the amplifying transistor M2 determines the output current. In an array of CMOS

photodiode APS, the row transistor MRS addresses the readout of the outputs of

an entire row indicated by an RS high. Figure 11 shows the timing diagram of the

above explained operation of the device.

23

Figure 11: Timing diagram and operation cycle of a standard photodiode APS

2.2.2 Photogate APS

Figure 12 shows the architecture of a general CMOS Photogate APS

circuit. Unlike the photodiode the photogate’s charge collected in the photogate’s

potential well cannot directly integrate on M2’s gate, but must be transferred to

the gate. An additional component called the transfer gate differs the operation

of the photogate APS from that of the photodiode APS. In the photogate APS,

the control line TX controls the transfer gate to facilitate the transfer of charge

from the photogate to the floating diffusion FD.

Reset Jl nRow Select 11

PixelI

I

I

I

I

I

I IntegrationI •I

24

Figure 12: Schematic circuit of a 3-T standard photogate APS

As shown in Figure 13, the first stage of photogate pixel operation is the

integration stage. In this stage, the photogate is given a positive voltage, thereby

creating a potential well (PW) under the gate. The sensor is exposed to light and

photo generated carriers are collected under the photogate. Near the end of the

integration cycle, the reset transistor is turned on which pulls gate of amplifying

transistor M2 to up. The resulting voltage VDD – VTH at the FD node creates

another potential well and any residual charge left as the reset output. The

collected charge under the photo gate is then transferred to the FD, by turning

the transfer gate on while switching off the photo gate off. Once the photogate is

switched off, the photogate potential well is reduced while the FD potential

remains low and the carriers flow into the FD as shown in Figure 13. After a

complete charge transfer, the new voltage at M2’s gate is then sensed during the

readout phase. The output of the sensor is the difference between the signal

level output and the reset output. This technique is called correlated double

Reset ••_--

Row ---JSelect

L OUlput

25

sampling (CDS) by which many types of noise patterns are suppressed, such as

reset noise, 1/f noise and FPN caused due to threshold voltage variations. [11].

Figure 13 illustrates the complete working of a photogate active pixel

sensor depicting carrier generation and transfer, followed by the timing diagram

in Figure 14.

Figure 13 : Charge collection and transfer in the working of a photogate APS (7)

-In1ogratlooo (1)

Readout!.)

26

Figure 14: Timing cycle for the operation of a standard photogate APS

The floating diffusion capacitance in the photogate APS is a combination

from the capacitance from FD, the gate capacitance of the amplifier transitor M2

and other parasitic capacitances. CFD performs the same function as the junction

capacitance CX in the photodiode APS and follows a similar relation as shown in

equation 4.

FD Photogate

QV

C C

(4)

However, the floating diffusion capacitance is very small when compared

to the junction capacitance of the photodiode CX itself and hence resulting in

higher conversion gains [12]. This is the potential for greater sensitvity in the

photogate APS.

The above advantages over the photodiode APS place the photogate APS

devices befitting for high-performance scientific imaging and low-light

applications [11].

(2)

Reset~ nPG U U,

I (3)

T' n n, ,I (4)

Row Select n n,

Jl, nPixel,,,,,, (1),: I I:

Integration

27

2.3 Sensitivity

The quality of images produced depends on the sensitivity of an imaging

system. It is a measure of how well the system responds to the input light signal

to produce an output value with a given signal to noise ratio. In an imaging

system, the input signal is typically the reflected light from an object.

A digital camera lens creates an image on to an image sensor array

typically with dimensions ranging from 5mm to 35mm inch in diagonal size. To

obtain high quality images with such small imagers is a challenge. In general, an

image sensor with larger number of pixels will produce a better resolved and

hence potentially a higher quality image.

However, image quality does not only depend on the number of pixels, it

also depends on the imaging optics, image sensor and it’s colour architecture,

the colour image reproduction pipeline and the monitor or printer used to render

the final image [2]. Of all the elements on which the image quality depends,

image sensor is facing greater number of challenges in delivering a better

performance currently. This thesis attempts to enhance the sensitivity of existing

photogate APS designs by focussing on the image sensor design primarily.

2.4 Quantum efficiency

Quantum efficiency (QE) is a parameter used as a measure of the

sensitivity or responsivity of the device to incident radiation. It is defined as the

ratio of the number of electrons or charges that are collected to the number of

photons incident on the device. In general, not every photon that is incident on

28

the device can contribute to the QE due to different possible losses like, loss due

to reflection at the material surfaces and interfaces and absorption losses by the

gate materials. Once, the photons are absorbed in the active region of the device

(eg: Silicon Substrate), the measure of the efficiency of converting the absorbed

photons to electrons is given by the parameter called the internal QE. Internal QE

is a property or characteristic of the material and does not depend on the device

structure.

However, in real life applications, the parameter frequently used for

measuring is the external QE or QE, which is generally a function of wavelength

and temperature.

When light strikes any semiconducting surface with a photon flux ϕo, its

absorption is dependent on the photon energy Eph given in electron volts given

by,

1.24

ph

m

hcE h

(5)

Where h is Planck’s constant, Ʋ is the frequency, 𝜆 is the wavelength and

c is the speed of light. The actual photon flux at a depth x in the substrate is

different from the incoming incident photon flux ϕo and is given by,

( ) x

ox e (6)

29

Where α is the absorption coefficient of the material. Values for α of the

incident radiation can be determined by measuring the absorption intensity I, for

a sample of thickness x with the relation,

( ) x

oI x I e (7)

Where Io as the incident light intensity. Equations (5) and (6) are derived

from the Beer-Lambert law.

From equation 1, we can say that the number of electrons collected in the

depletion region of a photogate is given by,

Number of electrons collected = int.

nQ

q t (8)

While the total number of incident photons is given by,

Number of Photons = .

.

o o

phE h c

(9)

Since, QE is defined as the ratio of the number of collected electrons to

the incident photons, it is represented as,

int

. .

. . .

n

o

Q h cQE

qT (10)

As indicated in the above equation (9) the extrinsic quantum efficiency and

thus the sensitivity of a device are mainly dependent on the wavelength of the

incident illumination [13].

30

2.5 Drawbacks with the standard photogate APS design

While the low capacitance shown in equation 4 suggests higher sensitivity

potential of the photogate, the problem is that the light must first pass through the

gate before being absorbed. Light when it enters a solid absorber like silicon

follows the Bear law where the light intensity I(x) at any depth becomes

(11)

Where Io is the initial light intensity, is the absorption coefficient (cm-1)

and x is the depth. Figure 15 shows the photon absorption coefficient curve

plotted for absorption coefficient of single crystal silicon versus the photon energy

as the photon travels through a block of silicon [10].

1.E+02

1.E+03

1.E+04

1.E+05

1.50 2.00 2.50 3.00

Photon energy (eV)

Ab

sorp

tio

n c

oef

fici

ent

(1/c

m)

Figure 15 : Single silicon crystal absorption coefficient vs photon energy[14]

Now consider that in a silicon crystal, the α for blue wavelength (2.61eV) is

~5E+4cm-1 and red wavelength (1.19eV) is ~5E+3cm-1. The depth1/α is the

distance which the photon intensity drops by a factor of 1/e. Given an initial

( ) exp( )oI X I x

31

intensity of red and blue photons in single crystal silicon, the red photons would

need to travel 10 times longer than the blue photons to be reduced by the same

factor of 1/e. Photogates use polycrystalline silicon, whose optical absorption

characteristics follow the same curve as single crystal silicion, but with about 10

times higher absorption coefficients. Hence the polygate, with a typical thickness

of 0.5 microns, actually absorbs significant amounts of the incoming light. Indeed

in [10] Jenny Leung showed that 66% of the incoming light was absorbed by the

polygate. This significantly reduces the QE of photogates, eliminating their

sensitivity advantage over photodiode APS. Since the absorption coefficient

becomes stronger towards the blue.

Hence, with a standard photogate APS design the absorption in the

polysilicon gate increases and becomes particularly pronounced for wavelengths

below 300nm, which especially degrades the QE resulting in poor sensitivity in

the blue spectrum [15]. Also, for silicon based optical devices, photons with much

shorter than visible wavelengths (i.e. UV range) will be absorbed by the gate and

oxide layers and penetrate little in the substrate. Thus causing all the carriers to

be generated near the surface which is dominated by the surface traps. The

detectable range of silicon base semiconductor is from ~1μm to short enough

that surface and cover glass optical absorption becomes dominate (typically

350nm).

The above explained drawbacks need to be addressed in order to improve

the sensitivity of the present day standard photogate APS design. The next

chapter presents with some previous experimental work conducted to enhance

32

the sensitivity of the standard photogate APS by employing a multifinger

photogate design approach.

33

3: THE MULTIFINGER PHOTOGATE APS

In the preliminary work [7] conducted on the multifinger photogate APS

designs, four experimental models including the standard photo gate APS were

designed in the standard CMOS 0.18µm process [10][14]. This chapter

summarizes the previous experimental work on the multifinger design. To test

these, the pixel response for several wavelengths was the key interest in the

experiments. By observing the pixel response at different wavelengths, the

relative absorption in the designs for the corresponding wavelengths were

estimated.

3.1 Concept of the multifinger photogate APS

In the standard photogate the full photosensitive area of the pixel is

covered by a polysilicon gate (See Figure 16). The idea of the multifinger design,

as noted before, is that when a line, such as a poly gate, is small enough (must

be less than 1µm) the electrical field from a charged gate extends as as fringe

field which covers a much larger area than the line. To create this the multifinger

photogate designs were designed such that, the photogate enclosed detection

area was encircled by a poly gate ring which is divided by 1,3 and 5 polygate

fingers each of width 0.72µm. Figure 16 below shows the all the experimental

models tested.

34

Note: Here, the edges of the guard ring surrounding the photosensitive

area in the experimental multifinger designs were taken into account as 2

additional photogate fingers. The experimental layout designs where the

enclosed detection area is divided by 1, 3 and 5 polyfingers will be considered as

3, 5 and 7 multifinger APS designs. In particular in earlier papers [7][10], the

designs were referred to as the 1, 3 and 5 finger

Figure 16: Pixel layouts of experimental standard and multifinger designs [7], [10], [15]

The spacing between the polyfingers for each multifinger design and the

resulting total open area(%) is as shown in Table 1.

• •-, II •

-•

- II

• • • • ••• " . - ., . • ••• •"" ""-- --* hnJ ~Potential Well

Standard 3·Finger 5.finger 7.finger

35

Table 1: Multi-finger photogate APS poly-finger spacing. (7)

Multi-finger structure Spacing (µm) Open area (%)

Standard NA 0

3 finger 2.54 59.30

5 finger 0.91 42.50

7 finger 0.367 25.80

Figure 16 also shows the pre experimental measurement expectations for

the potential wells. The idea is that the fringe field will extend the potential well

far into the open area. Since the open area will not suffer the optical absorption

in the poly gate, many more photons will enter the substrate there. Hence

potentially it will be more efficient than would be expected from just a potential

well under the finger area. The 3 finger version shows this concept, with extend

wells, but also open areas with no potential well. Eventually when the fingers

become close enough the fringing fields will begin to overlap and the potential

well will extend across all the open areas. However it was expected that there

would be a ripple in the potential well depth in those open area that would reduce

somewhat the device efficiency.

It is important to note here that, the polyfinger width (0.72µm) was not set

by the 0.18µm CMOS technology but was limited by the design rules, which need

a much wider poly in order to prevent Source/Drain implantation. in actual

transistors (this is not important in the poly gate).

Spectral response of CMOS 0.18µm fabricated multifinger photogate APS

pixels was considered an important factor. The fabricated designs were tested by

illuminating the pixels with the four prominent colours of the light spectrum, Red,

36

Yellow, Green and Blue. The exposure was performed with the help of LEDs. In

addition, the exposure time for each individual colour is adjusted such that, the

pixel reached saturation in every case [[15], chapter 7].

3.1.1 Measured multifinger response

Sensitivities were measured and compared to characterize the difference

between the different pixel designs and their response at different wavelengths.

Table 2 shows the sensitivity ratio for multifinger photogates with respect

to the standard photogate design.

Table 2: Sensitivity ratio for multifinger photgates relative to the standard photogate.

Pixel Type % Photogate

area

% Sensitivity ratio

Red Yellow Green Blue

Standard 100.00 100.00 100.00 100.00 100.00

3 finger 40.70 78.92 75.78 77.64 79.64

5 finger 57.50 131.67 131.68 136.61 131.36

7 finger 74.20 147.66 145.69 152.00 151.44

Considering, the sensitivity of the standard photogate design, where the

polysilicon photogate covers the entire photosensitive area to be 100%, the

percentage change in sensitivity for each of the multifinger photogate designs

relative to the standard design is calculated and given in Table 3. Note that the 3

finger designs were about 22% lower in sensitivity than the standard design.

What is interesting is that from Table 1, 59% of the 3finger design was

open area, so this indicates the fringing fields, and higher light reaching the

37

substrate, compensated for the fact that only 39% of the device was covered by

the photogate.

Table 3: Change in sensitivity for multifinger photogates relative to standard photogate.

Pixel Type %

Photogate area

% Change in Sensitivity


Standard N/A N/A N/A N/A N/A

3 finger 40.70 -21.08±2.08 -24.22±2.18 -23.36±2.09 -20.36±2.16

5 finger 57.50 31.67±1.73 31.68±2.01 36.61±1.89 31.36±2.09

7 finger 74.20 47.66±1.61 45.69±1.87 52.00±2.05 51.44±2.27

3.2 Response of the multifinger designs

Now we explore how the sensitivity varies with the open area and the

number of fingers in the multifinger photogate designs. The observations from

the obtained results showed that the multifinger photogate designs showed an

increase in sensitivity than the standard photogate irrespective of the wavelength

of illumination. The sensitivity of the 5 finger and 7 finger increased than that of

the standard photogate by ~33% and 49% respectively. On the other hand, the 3

finger design showed a decrease in sensitivity of ~22% than the standard (see

Figure 17).

38

Figure 17: Sensitivty ratio with respect to standard photogate vs photogate area for multifinger designs.

Assuming the poly-gate covering the entire detection area for a standard

design to be 100%, the observed increase in sensitivity is contributed by the

open area. Table 4 and Table 5 show, the percentage sensitivity and the

collection efficiency of the open area calculated according to the equations (12)

and (13),

% _ % %Sensitvity OpenArea TotalSensitvity PhotogateArea (12)

% _

%

Sensitivity OpenAreaCollectionEfficiency

OpenArea (13)

Table 4: Open area sensitivity of multifinger photogate designs.

Pixel Type % Open area

% Sensitivity


3 finger 59.3 38.22 35.08 36.94 38.95

5 finger 42.5 74.17 74.18 79.11 73.86

7 finger 25.8 73.46 71.49 77.80 77.24

,~

0,.! '00.~.~

I ~00

•00

S·Fln .r

1---1

'00

39

Table 5: Open area collection efficiency of multifinger photogate designs.

Pixel Type % Open area

% Collection efficiency


3 finger 59.3 0.64±0.03 0.59±0.03 0.62±0.03 0.66±0.03

5 finger 42.5 1.75±0.05 1.75±0.06 1.86±0.06 1.74±0.06

7 finger 25.8 2.85±0.09 2.77±0.11 3.02±0.12 2.99±0.13

Summarizing all the above observations, the obtained results from the

experiments clearly demonstrated that,

1. The fringing fields formed due to the polyfinger photogates extend into the

open spaces between the adjacent fingers forming potential well close to

the standard photogate.

2. Despite having the largest open area of 59.3% with respect to the polygate

area, the poorest collection efficiency of ~62% achieved by the 1finger

design suggest that the potential well formed is too weak for the collection

of generated photo carriers.

3. The 5 finger design with an open area of 42.5% of the photogate area,

achieved a significant 170% collection of photoelectrons in the openings

while, the 7 finger design having half the open area of the 3 finger design

achieved the highest ~290% photoelectron collection efficiency.

4. The efficiency of the open area increased as the strength of the fringing

fields between the adjacent gate fingers increased. Most importantly, the

measured values suggest that at least 66% of the incident light is lost due

to the absorption by the poly.

40

5. Spectrum response analysis on the standard photogate showed that the

quantum efficiency for blue colour is 20% less than expected. Thus,

indicating possible absorption inside the poly silicon gate and reflection

between insulator and the poly gate. At the same time, the lack of any

change in the blue response when the standard design is replaced by

multifinger photogate designs suggest that, the insulator layers such as

Silicon Dioxide used as gate oxide layer and the Silicon Nitride (SixNy)

used for insulating the open areas and under the photogate act as

absorbing materials.

6. It is important to note the fabrication process employed in this work was

not tuned to make photo devices. Although the increased sensitivity of the

multifinger photogate designs infer that, the insulator is not as absorptive

as the poly silicon gate, the thickness of the insulator materials and their

optical characteristics will have an impact on the photo response of the

photo gate pixels.

3.3 Summary of the experimental work conducted on multifinger photogate APS designs.

Experimental analysis presented in this chapter shows us proof that a

significant increase in the sensitvity of up to 1.5 times that of the standard can be

achieved by employing the multifinger design.

Results showed that the polysilicon gate material absorbs a significant

~66% of the incident light on the device. This suggests that the sensitivity of the

41

open areas mean that designs should be optimized to maximize the open area

where the fringing field creates the potential well.

The strength of the fringing fields was strong enough in the 5 finger and 7

finger designs to collect the additional photo generated carriers and increasing

the efficiency. Thus unveiling the principle that collection in the open area is

directly proportional to the strength of the fringing fields between adjacent gate

fingers forming the potential well.

However, the two important parameters responsible for the higher

sensitivity of the multifinger design,

“Strength of the potential well formed by fringing fields” and the “Open

area spacing between adjacent gate fingers”, lead into a trade off with each

other. This situation demands the need to explore new ideas in order to optimize

the dimensions of the multifinger photogate designs to obtain the best pixel

design.

3.4 Questions to be answered with the help of simulations.

Through the previous experimental work conducted on the multifinger

photogate APS designs presented in this chapter, we were able to demonstrate

the potential of this approach to solve for the limitations faced by present day

standard photogate APS. However, before proceeding further, some crucial

questions need to be answered as to understand the actual working of the

multifinger design in a device physics perspective.

42

1. What is the actual potential well shape for multifinger photogate APS

designs?

2. How do the fringing fields govern the shape and strength of the

potential well?

3. Can the trade-off between the number of polyfingers and the available

open space be predicted?

4. How does the reduction in an individual polyfinger gate width affect its

corresponding fringe field radius?

5. What are the consequences faced by multifinger designs corresponding

to changes in the size of the polygate fingers in terms of sensitvity?

6. What will be the carrier distribution in multifinger photogate pixels with

response to incident light.

Despite the fact that, experimentation is the most efficient way to obtain

accurate results, an analysis based on prediction demands huge amount of

resources, time and cost. Numerical modelling and simulations on the other hand

provide us with the flexibility to simulate and observe the characteristics of

various modified designs without much wastage of resources.

43

4: DEVICE SIMULATIONS

This chapter focuses on the initial simulation tools that were used to

create the device physics models of multifinger photogate APS designs to study

the formation and behaviour of the potential well inside the substrate.

To give a better understanding of the role played by the potential well and

its shape under the photogate, device simulations inspecting the electrostatic

potential, the equipotential surface and the hole concentrations under normal and

depletion conditions were performed using MicroTec, a 2-dimensional device

simulation tool.

Simulations are used as an extended analysis, to validate the prediction

that the potential well spreads into the open spaces due to the extending fringing

fields from polygate fingers in the multifinger designs. Thus, the potential for

improvement in photo carrier collection using multi-finger photogate structures

which can substantially reduce the absorption of short-wavelength light was

investigated.

4.1 Setup and procedure

To create an initial simulation of the multifinger devices the MicroTec, an

easy to use PC compatible 2d device simulator designed by Siborg systems Inc.,

was used to create a model of the standard and multifingered experimental

designs. The target here was to get a first pass at the potential well and

44

operation of the 3, 5, and 7 finger devices. The MicroTec simulator gives the

distribution of carriers in the substrate under the devices. The various geometries

were simulated in the following way. The cross-sectional view of a standard

photogate structure together with a transfer gate is shown in Figure 18. All the

photogates are modeled assuming a p-type substrate. To operate this type of

photogate, the back gate, which is directly connected to the bulk substrate, is

kept at the lowest voltage, in this case connected to ground. Meanwhile, the

photogate is kept at a higher voltage, usually at VDD. In the present simulation,

the voltage at the photogate is set at 5V initially, while the voltage at the transfer

gate is maintained to be 2.5V.

The movement of carriers with respect to the potential well created by the

photogate can be investigated by altering the voltage on the photogate. Figure

19, Figure 20 and Figure 21 show the cross-sectional views of 3-finger, 5-finger,

and 7-finger experimental designs modeled for simulations respectively.

45

Figure 18: cross-sectional view of the standard photogate design

Figure 19: cross-sectional view of the 3-finger photogate design

Figure 20: Cross sectional view of a 5-finger photogate design

Figure 21: cross-sectional view of a 7-finger photogate design

Transfer Gate

'G'

Photooate

r ~-------------,r------

Bild< Gille

PG2 PG3 Transfer Giltet -L ~--------'r------

Back Gate

PGl PG2 PGJ PG4 PG5 Transfer Gatet -L -L -L -L~--------'r------

Back Gate

c:::J It type substrate

_ n+well

c:::J silicon dioxide

_ polysilicon gate

c:::J p type substrate

_ n+well

c:::J silicon dioxide

_ polysilicon !late

c:::::::J p type substrate

_ n+well

c::::J silicon dioxide

_ polysilicon Odte

'G' 'G' 'G' 'G' '"' 'G' 'G' Transfer Gate

r r r r r r r

~= I' type substrate-n+ well

= <ilklln "in~i"..

r -polysilicon !late

Back Gate

46

Devices are modelled with the substrate doped with a p-type doping

concentration of approximately ~1015 cm-3 as per the 0.18µm CMOS technology.

The voltage applied to the transfer gate is kept at 2.5V while the voltage

applied to the photogate is initially at 5V and then changed to 0V. The 5V applied

to the photogate initially is to create a potential well for trapping the carriers

(electrons in this case) during the photogeneration process. In practice, at the

end of the photogeneration, the photogate voltage is lowered to 0V to inject the

carriers across the transfer gate. In the present study, however, due to the

limitation of the simulation software, the results of 5V and 0V applied to the

photogate are simulated separately. The simulated results of the voltage at the

photogate being 5V and 0V are to be compared. Table 6 below shows the rest of

the parameters and dimensions of the photogate designs used in the simulations.

47

Table 6: Dimensions of the simulated standard and multifinger designs.

Device dimensions

Width (X-axis) 8.86 μm

Height (Y-axis) 0.72 μm

Mesh nodes (X-axis/Y-axis) 120 × 60

Photogate region

Total width (X-axis) 7.24 μm

Standard design (1 gate, 0 spacing)

Gate width 7.24 μm

Spacing width N/A

3 finger design (3 gates, 2 spacings)

Gate width 0.72 μm

Spacing width 2.54 μm


Gate width 0.72 μm



Gate width 0.72 μm


Gate doping type n type

Gate doping concentration 1017 /cm3

Gate oxide thickness 0.02 μm

Work function 4.176 eV

Transfer gate region

Total width (X-axis) 1.62 μm

Gate width (X-axis) 0.18 μm

Gate doping type n type

Gate doping concentration 1017 /cm3

Gate oxide thickness 0.02 μm

n well width (X-axis) 0.72 μm

n well doping concentration 1017 /cm3

Work function 4.176 eV

48

The voltage applied to the transfer gate is kept at 2.5V while the voltage

applied to the photogate is initially at 5V and then changed to 0V. The 5V applied

to the photogate initially is to create a potential well for trapping the carriers

(electrons in this case) during the photogeneration process. In practice, at the

end of the photogeneration, the photogate voltage is lowered to 0V to inject the

carriers across the transfer gate. In the present study, however, due to the

limitation of the simulation software, the results of 5V and 0V applied to the

photogate are simulated separately. The simulated results of the voltage at the

photogate being 5V and 0V are compared.

49

4.2 Results and Analysis

3-Finger 5-Finger

7-Finger

Figure 22: Device simulations showing the potential well formation under the gate for each of the multifinger designs

Figure 22 shows the cross sectional view of each of the experimental

designs together with a transfer gate. The MicroTec simulator shows the

distribution of the holes under devices and from this the shape of the potential

well formation in under the photogate area. The regions that where the hole

density falls within the legend colour less than 0.125 x 1015 cm-3 (dark purple)

o.-V>Coti 0.2E-::; 0.4u...(is-.!!! 0.6 I

Q

O. 1. 2. 3. 4. 5. 6. 7. 8.

Distance X (microns)

O. 0.125 0.25 0.375 0.5 0.625 0.75 0.875 1.

x1015

50

constitute the space charge region under the gate as it is nearly fully depleted of

holes.

3-finger 5-finger

7-finger

Figure 23: Simulated outputs showing the equipotential surface of 3, 5 and 7 multifinger photogate APS designs

Figure 23 shows the equipotential surface, describing the direction in

which the photo generated carriers can flow in each of the designs.

O.~;t; 0.2

i::;; 0.4uiii

..~ 0.6c

O.~;t; 0.2

i::;; 0.4~16.; 0.6c

O. 1. 2. 3. 4. 5. 6. 7. 8.


.j).308 .j).196 .j).084 0.028 0.139 0.251 0.363 0.475 0.587

O. 1. 2. 3. 4. 5. 6. 7. 8.


.j).308 .j).195 .j).082 0.031 0.144 0.257 0.37 0.483 0.597

O.

Iot; 0.2

I::;; 0.4u

16.; 0.6c

O. 1. 2. 3. 4. 5. 6. 7. 8.


.j).308 .j).213 .j).118 .j).023 0.072 0.167 0.261 0.356 0.451

51

The simulation results reinforced the significant role played by the fringing

fields in boosting the sensitivity of the multifinger photogate designs. For

example, the potential well for the 3 finger design where the fingers are too wide

apart, the potential well is very weak and hence resulted in lower sensitivity than

that of standard photogate. It can be seen that the Figure 22 simulation is similar

to the expectation. There are wide areas where the fringing field extends, but

between those, in the centre of the open area, there is no depletion region. The

extent of the fringing field is suggested in the equipotential surface of Figure 23

where the 3 finger design shows extensive regions with non zero potential.

However the results in Figure 22 for the 5 finger case show that the entire

photogate area has a depletion region. Moreover the ripple of the bottom of the

well is actually quite small. This suggests that the fringing fields are touching in

this case which is confirmed in equipotenial plots in Figure 23. This is consistent

with the experimental results where the 5 finger, is much better than the

expectations shown in Figure 16.

On the other hand, as the spacing between the adjacent fingers decrease,

the potential well became stronger with almost an almost uniform shape for the 7

finger design in Figure 22. The Figure 23 equipotential surface shows strong

overlapping of the fringing fields. Indeed the 7 finger design has wells almost as

good as the standard device.Thus one can say that, the 5 and 7 finger

photogates collect almost all of the photocarriers collected as collected by the

standard with reduced absorption in the polysilicon gate material. This is in

agreement with the experimental results.

52

4.3 Chapter Summary

By making use of simulations, this chapter provided an insight into the

device level working of the multifinger photogate APS. The analysis performed

on the experimental results, show how and why employing a finger like pattern

designs could result in higher sensitivity than the standard photogate design was

validated.

The 2D simulations show that the combined effect of the fringing fields

due to each pair of adjacent photogate fingers increases, as the spacing between

them decreases. Hence, it is discernible that as the number of fingers increases,

the combined field effect and carrier storage capacity of all the fingers will

gradually behave like the standard photogate.

However, the tradeoff here is the additional surface area covered by the

polysilicon, further blocking off the penetration of short-wavelength light. This

necessitates the existence of an optimal number of fingers, where, the uniformity

of combined field due to fringing effect closely assimilates that of the standard

photogate, keeping the total surface area covered by the polysilicon gates small.

Moreover, the total area covered by the polysilicon gates can be further

reduced by largely decreasing the width of each individual finger but slightly

increasing the number of fingers while achieving the same level of uniformity in

combined field effect. The problem is that these MicroTec simulation, while

interesting, does not allow us to explore different finger widths due to its

53

limitations. Thus we needed to expand to a more powerful simulator, the TCAD

simulator of chapter 5.

54

5: ADVANCED 2-D TCAD DEVICE SIMULATIONS TO ENHANCE THE SENSITIVITY OF MULTIFINGER PHOTOGATE APS DESIGNS

The work presented in chapter 3 validates the efficacy of multifinger

photogate design in improving the performance of CMOS photogate APS.

However, the trade off in sensitivity observed between the number of fingers and

the total open area available in each design indicates the necessity to come up

with an optimized multifinger photogate design that can achieve the highest

sensitivity. In addition, it was stated in chapter 3 that the 0.72µm poly gate width

for the experimental models was limited by the process specifications for poly

lines over open areas rather than the technology limit, which is 0.18µm.

It is well known to IC designers that the fringing fields change very little

with the changes in the width for small poly lines (below 1µm size) [16]. The

above said factors indicate that, shrinking the photogate finger size allows larger

areas of open silicon compared to the most efficient 0.72µm 7 finger

experimental design while retaining the strength of the potential well formed

unchanged. This chapter presents the research work [17] accomplished in

exploring how reducing the polyfinger gate width and potentially changing the

number of fingers might enhance the sensitivity of the multifinger photogate

design.

55

The work in this chapter uses an advanced 2-dimensional device

simulator “Synopsys SENTAURUS TCAD” to investigate how reducing gate

widths will trade-off with the additional open space for collection as well as to

explore the maximum point that can be reached by increasing the number of

fingers. A comprehensive understanding of the behaviour of the space charge

layer was obtained by collecting data for the extension of the space charge layer

into the substrate observed at the centre of the polygate finger, edge of the

polygate finger and the centre of the open area spacing between the adjacent

fingers for different voltages.

5.1 Device structure generation and design

The Sentaurus Structure Editor a graphical 2D, 3D device structure layout

editor was used to design the device structures. The Sentaurus structure editor

can be either in the GUI mode or the command prompt mode. Once the device

structure is made, contacts are defined where necessary on the devices. Next

the doping and meshing of the generated structures is performed [17].

5.1.1 Doping and Mesh generation

The silicon substrate was doped p-type with Boron concentration of

1015/cm3 and the poly gate was made n-type by doping with Phosphorous

concentration of 1017/cm3. The gate oxide width is 0.02µm and is constant for all

the designs. Figure 24, shows, one of the designed device structures with 3

fingers that were simulated.

56

Figure 24 : 2-D simulation design of a 3finger photogate APS.

For these simulations the same size of photogate sensor area was used

for all designs. Two sets of designs are made based on the variation of gate

width. One set contains the designs where the gate width of 3, 5 and 7 finger

experimental models from the experimental work are simulated for 0.72µm, 0.5

µm, 0.25 µm, 0.18 µm keeping the centre position of the gate fingers the same.

The second set of simulations is done by compensating the open spaces created

due to the reduction in the gate widths by increasing the number of gate fingers.

The maximum number of gate fingers and open spaces for any given poly-

finger gate width is given by the formula,

(7.24 ) ( ) ( 1) ( )Device gate SpaceW m n W n W (14).

In order to save computing time and to obtain more accurate results in the

areas of importance, a finer mesh was employed 10 µm in the horizontal X-

direction and up to 3µm into the substrate in the vertical Y-direction. The rest of

the substrate was meshed with wider spacing. Once the device structure is

meshed using the mesh generator, the device is ready for electrical simulation

SiC>,

57

with sdevice. Figure 25, shows the generated mesh for the 3-finger photogate

APS design.

Figure 25 : Meshed structure of the 3-finger photogate APS design.

Except for the gate finger width and the number of fingers that cover the

photo sensing area, the rest of the device structure is designed with same

parameters for all the designs.

5.1.2 Theoretical models and simulation set-up

The Drift diffusion model is used by the simulator for the simulation of

carrier transport in semiconductors and is defined by the basic semiconductor

equations which are the Poisson equation given as

. ( )D A trapq p n N N (15)

Where ε represents the electrical permittivity, q the electronic charge, p, n

denotes the hole and electron densities. ND is the concentration of ionized

0

2

4

E2.>-

6

8

10

2 3 4 5 7 B 9 10

Xruml

58

donors; NA is the concentration of ionized acceptors. ρtrap corresponds to the

charge density contributed by the trapped and fixed charges [17].

The electron and hole continuity equations, which are

. nn net

t

J qR q

(16)

.p

p net

t

J qR q

(17)

Rnet in the above equations represents the electron-hole recombination

rate. Jn and Jp are the electron current density and the hole current density

respectively [16].

The current densities for electrons and holes are given by:

n n nJ nq (18)

p p pJ pq

(19)

Where, μn and μp represent the electron and hole mobilities while Φn and

Φp are the electron and hole quasi-Fermi potentials respectively [17].

Each device is simulated for 4 different gate voltages for 0.1V, 0.9V, 1.8V,

3.3V respectively. Due to convergence problems with the simulator, the lowest

0.1V voltage is considered for our work to be equivalent to observing the

behavior of the device at 0V conditions for the gate. The simulated outputs of the

devices are viewed with the help of Tecplot 360 graphic display viewer which

allowed us to plot out electron and hole concentration, potential field etc.

59

5.2 Simulation results for experimental designs

Figure 26, shows the outputs of 3, 5, 7 finger fabricated experimental

designs electron concentration, which are similar to the experimental designs

from our previous MicroTec work presented in chapter 4 [10][15].

(a) 3-finger (b) 5-finger

(c) 7-finger (d) Standard

Figure 26: Electron densities simulated at 0.9V for 3 finger, 5 finger, 7 finger multifinger designs with 0.72um gate widths and the standard photogate design.

>-

E2.

E2.>-

E2.>-

Standard

E2.>-

l.<E.IS

S.(E.12

1.8E'tIO

6.2E.lI7

2.2E.lIS

60

The emphasis here is to model the potential well formation in the substrate

and hence, the electron and hole density concentrations which are responsible in

determining the width and depth of the space charge region were examined. In

the plots of the electron densities, the white line contour shows the edge of the

depletion region which corresponds to the location of the photogate potential

well. Figure 26 shows that the fringing fields of the gate fingers extend into the

open area spacing between the fingers playing a vital role in the formation of the

potential well inside the substrate.

3 Finger APS designs with varying gate widths

(X-Y axes in µm)

0.72µm 0.5µm 0.25 µm 0.18 µm

Figure 27: Simulated results showing electron concentration in 3 finger APS designs with decreasing gate widths.

Figure 27, shows the electron concentration and the lateral spreading of

the fringe fields in each of the 3 finger APS designs with varying polyfinger gate

widths. The 3 finger was choosen as it allows us to measure the field from a

single finger without overlap. A close observation at these plots show that the

extension of the fringe fields from the edge of the polygate into the open space is

almost constant irrespective of changes in the gate width. Measurements show

61

that the fringe field extends into the depletion region about 0.4µm from the edge

of the photogate. However, with increasing gate width, the strength of the fringe

filed increases under the gate, and hence the potential well extends deeper into

the substrate.

Figure 26(a), shows that for the 3 finger design, the open area spacing of

2.54µm is too large for the fringing fields of adjacent gate fingers to overlap. As a

result there is no potential well formation at the middle of the open area and thus

little collection of carriers in that region. In Figure 17, which shows the actual

experimental results, the absence of space charge layer in the open spacing

between fingers gives the 3 fingers design less sensitivity than that of the

standard gate. For the 5 finger design, the fingers are close enough (0.91µm)

that the fringe fields overlap to form a potential well but, the potential well depth

in the open area is shallower when compared to the depth of the potential at the

center of the gate finger. This causes a ripple like pattern as shown in Figure

26(b). Note that, this ripple is stronger than the simpler MicroTec predicted

(Chapter 4), but less than the originial design expectations of Figure 16. The

potential well formation due to overlapping of fringe fields will allow collection of

carriers in the open area because more light hits the silicon substrate for the 5

finger design and as result it has higher sensitivity than both the 3 finger and the

standard as shown in Figure 17.

Figure 26(c) shows the 7 finger design where 0.367µm spacing between

the fingers has resulted in a deeper potential well almost similar to that of the

62

standard photo gate design giving a larger effective open area for capturing light

and carrier generation. Hence, the 7 finger design has a highest sensitivity ratio.

Thus the simulation results are authenticated to be in agreement with the

experimental analysis of our previous works as shown in Figure 17 from the

previous chapter 3.

5.3 Simulation results

The design of a poly-line over open space cannot be less than 0.72 µm in

order to adjust with the topology of the device according to process

specifications. This is the reason for the gate widths to be 0.72 µm for all the

experimental designs in the previous experimental works. But, considering the

multifinger photogate as an equivalent to the standard MOS transistor design, the

0.18µm CMOS technology allows us to design a gate of the transistor with a

minimum width of 0.18µm. So clearly, different designs by having gate widths of

the poly fingers going down to 0.18µm can be explored.

Now we will extend the simulations to where 0.72 µm, 0.5µm, 0.25 µm and

the minimum allowed 0.18 µm are used to design poly-finger gate widths. For a

given gate width, the minimum open spacing between the adjacent fingers is set

to be half of the width of gate finger, giving 50% of the total device area to be

open. A total of 30 different designs with varying gate widths and number of

fingers were designed.

The design with maximum number of fingers is 27-fingers with a gate

width of 0.18 µm. Figure 28, shows the simulated outputs of 5 finger, 7 finger

63

designs for all the gate widths and the 9-finger design for the 0.5 µm, 0.25 µm,

0.18 µm respectively. For better understanding of the space charge layer

formation, the middle 3 fingers of the designs are focused in all the figures.

64

Gate width

(m)

(µm)

5 finger 7 finger 9 finger

0.72

(a)

(b)

N/A

0.5

(c)

(d)

(e)

0.25

(f)

(g)

(h)

0.18

(i)

(j)

(k)

Figure 28: Electron Density at 0.9V for the 5-Finger design with gate width (a) 0.72µm (b) 0.5µm (c) 0.25µm (d) 0.18µm, 7-Finger design with gate width (e) 0.72µm (f) 0.5µm (g) 0.25µm (h)

0.18 µm, 9-Finger design with gate width (i) 0.5µm (j) 0.25µm (k) 0.18µm

E~

>

E~

>

E~

>

" ,.i 1> >

"

" "E " E , 1~ ~

> > >

".'

65

A quick glance at Figure 28, tells that the 5 finger designs with 0.5 µm,

0.25 µm and 0.18 µm as well as the 7 finger design with 0.18 µm show no

potential well formation in the open spacing between the adjacent gate fingers.

Thus they can be considered as the least efficient designs similar to the 3

finger experimental designs.

Once again, in every case where the gates fields are too far apart to

overlap the fringing fields, a potential well that extends to approximately 0.4µm

laterally from the edge of the gate into the open space is created irrespective of

the gate width. The above condition infers that for a given voltage, the variation in

the dimensions of the gate width has a very little affect on the fringing fields

generated.

Now consider the 5 and 7 finger 0.72 m designs. In the 5 finger case the

open area is 0.91 m wide. While this is wider than the stated fringing field

distance to create a potential well, Figure 28 (a) clearly shows that the space

charge layers overlap and the potential well is 0.33 m below the silicon surface.

What is happening here is that that at the centre the combined fringing

field from both gate edges adds up to create sufficient field strength to form a

space charge layer and thus a significant potential well. By the 7 finger case

(Figure 28(e)) the combined field strength results in a very small 0.01 m ripple in

the potential well depth. It can be seen that, exactly the same thing happening for

the 7 finger 0.5 µm, Figure 28(f), and 0.25 µm, Figure 28(g) cases the combined

fields create the potential well at depth over the whole open area. For the 0.18

66

µm this does not happen until the 9 finger, Figure 28(k), simulation. As before,

the potential well ripple significantly decreases for beyond the point of overlap,

with the ripple being quite small by 7 fingers for the 0.5 µm case (Figure 28(f))

and in the 9 fingers for the 0.25 µm and 0.18 µm cases.

Gate

(m) 11 finger 13 finger 15 finger

0.25

(a) (b) (c)

0.18

(d) (e) (f)

Figure 29: Electron density for the multifinger designs with 11, 13 and 15 fingers for

narrower gate widths of 0.25 m and 0.18 m

Figure 29 shows the electron density plots of multifinger designs with

narrower gate widths and higher number of fingers. A clear first observation is

the flatness of the potential well in all the designs due to higher number of fingers

"

- ------------

I"-'..t.

1:

"E ~~ E~ ~

> >

",.

" "

".,

XI·m) Xlu~

67

allowing for the strengthening of the potential well in the open spaces. comparing

the 11 finger designs (Figure 29(a) & (b)), we can clearly observe the increase in

the ripple as the width of the gate decreases. Now, the question is to figure out,

which of these designs can have higher efficiency. For example, Figure 29 (e)

and Figure 29 (f) show that the potential well extends almost the same 0.6m for

both 13 finger and the 15 finger with 0.18m gate widths respectively. However,

tradeoffs occurs due to reduction in the total open space for the higher 15 finger

design and hence lesser collection of incident light than the 13 finger design of

same finger width. Figure 30(a) shows a description of the fringe fields extending

laterally from the edge of a gate finger while Figure 30(b) is the plot showing the

amount of lateral extension of the fringefileds in 3, 5 and 7 multifinger designs

with varying gate widths. The readings were taken only in the results where the

adjacent fingers are too far away for the fringe fields to overlap and create a

potential well in the open spaces. It can be observed from the plot that the fringe

fields chage very little with changes in the width of the gate for any given design.

Also, it can be observed that the fringe fields extend by approximately

~0.4 m irrespective of the width of the gate finger.

68

(a) (b)

Figure 30:The lateral spreading of the fringefiled from the edge of the gate into the open space between adjacent fingers for varying gate widths

Figure 31 shows the difference in the depth of the space charge layer from

the center of the gate finger to the edge of the gate finger. Figure 32, is a plot of

the depth of the space charge layer from the center of the finger to the center of

the spacing between adjacent fingers. These two sets of data help in determining

the uniformity or flatness of the potential well formed in the device. The smaller

the difference the closer the shape of the potential well under the poly gate

fingers is to being flat. What is notable in Figure 31 is that for sizes of 0.5 m or

smaller fingers the difference between centre and edge depth of the space

charge layer become almost zero by the 9 finger or larger case.

Lateral extension of fringe filed from the edge ofthe gate into the open space between adjacent

gate fingers

Extens icnPcty"s;iliccn

gate

.L.-.~-~~.~

Fringe field

Oxide

0.8

r::0 0.6·~S~.=.

0.4"w0.2

3linger 5 linger 7 linger

-O.72um

-0.5um

_0.25um

-0.18um

69

Figure 31:The difference of the depletion layer depth from the center to the edge of the gate finger at 0.9V gate Voltage

Figure 32 then measures the difference in the depletion layer between the

centre of the fingers and the centre of the open space between the fingers.

This measures the ripple of the potential well caused by the separation

between the gates. For the 3 finger case all the designs shown, have no potential

well in the center. For the 0.72 µm design note how this ripple is about 0.28 µm

for the 5 finger case, and only 0.01 µm for the 7 finger. The 0.5 µm design shows

only a small ripple for the 7 finger and almost none by the 9 finger. For the 0.25

Diffel:ence of depletion layt'r dellth from centet' ofthe gate to edge of the gate.

0.08000

0.07000

0.06000

0.05000Diffel:ence

0.04000Ulln)

0.03000

0.02000

0.01000

0.00000

f-L

lIi:::Il .....

.0.72um

.O.sum

.0.25um

.0.18um

3 5 7 9 11 13 15 Ii 19 21 23 25 2iNumbet· of Poly-gate fingel'S

Diffet'etlCe of depletion layt'r dellth from Cetltet' ofthe gate to edge of the gate.

0.08000

0.07000

0.06000

0.05000Diffet'etlCe

0.04000Ulln)

0.03000

0.02000

0.01000

0.00000

f-L

lit Cia ...

.0.72um

.O.sum

.0.25um

.0.18um

3 5 7 9 11 13 15 Ii 19 21 23 25 2iNumbet· of Pol}'-gate fingel'S

70

µm fingers, the 7 finger show the onset of decline and almost becoming flat by 9

fingers. Finally the 0.18 µm shows a larger decline at 9 fingers, and is almost flat

by 11 fingers.

Figure 32: The difference of the depletion layer depth from center of the gate finger to the center of spacing between adjacent gate fingers at 0.9V gate Voltage.

Figure 33 is a plot of the depths of the space charge layer into the

substrate at the center of the gate finger. The strength of the potential well

formed under the gate can be understood from this plot. The 3 finger, 5 finger

and 7 finger design with 0.18µm width show the deepest potential wells. As the

number of fingers increases the potential well depth is increasing. For the

designs with gate fingers 11 and above, the potential well depth is almost same

and closer to the standard photo gate. This indicates that the fringing fields

become stronger as the open spacing between fingers decreases allowing them

to extend under the gate contributing a deeper potential well. However in all

these cases the depth of the potential well is close to that of the 5 finger 0.72 µm

Diff...·...'c .. of ,h.. ,1.."letion L~}''''' d"'Ptll from til.. c ........ of tile VI'ero til..'<'1'1".. of tile spacing belW.....'adja'..'t f"m:il:et"5....

••••••

Diffe"'JOCe ..,~.) ..,

•••• , • , , 13 B 17 III 21 23 23 27

NWIOber .rPel,. Cue- n~ers

71

design by the time the ripple becomes small. It is not fully clear how much the

potential well depth affect the sensitivity in these designs.

Figure 33: Depth of the depletion layer into the substrate at the centre of the Poly-gate finger at 0.9V gate voltage

5.4 Efficiency Estimation

The obtained simulation results, combined with the experimental

measurements on the 0.72 m devices in chapter 3, make it possible to estimate

the expected sensitivity of the modeled photogates. Table 5 shows data from the

previous chapter for the 0.72 m design and gives the estimated average

efficiency of the open area relative to that of the standard photogate.

The results of the simulation in section 3.2 explain these results. First

consider the 3 finger design which was showing an efficiency of 0.62 relative to

the standard photogate. As was noted in section 4.2 the fringing field for all the

poly gates of this size creates a potential well that extends ~ 0.4 m from the

0.'0.;

~ 0.6

_ 0.4

f. 0.3Q 0.2

0.'o

D"1,leliQIl b}" ...· d.,>fil into tl,e "nbs!ra tea t

tile c .."I:...• of tile ~"t<,. I[]D"",letioll La)· ...]

NlUOlb or 0 f Pol,._;:>. Ie f"no:;ers x Wid tk .ftlle Po 11-;"-'" f"no:;er(wtl)

72

gate edge. Since the spacing between the poly gate finger edges is 2.54 m that

means only 0.73 m of the open area has a potential well, while 1.81 m has no

potential well. This clearly explains the sensitivity of the 3 finger case being

much less than that of the standard photogate. To estimate the efficiency of the

open areas for 0.5 µm, 0.25 µm and 0.18 µm designs we can use these

measured experimental values for Table 5, and the simulation results to make

some projections of these values for the new designs.

First consider the case where the spacing between the poly gates is so

wide that the fringing fields do not overlap. In these cases, like the 3 finger 0.72

µm, it is reasonable to assume as a first approximation that photoelectrons are

only collected in the regions where the potential well exists. Since as noted the

fringing field extends the same 0.4 m for all the widths of poly gates, thus, the

amount of photocarriers collected is the same for all these cases independent of

the separation between the gates. Thus the collection efficiency for the open

area, Co, becomes a simple division of the amount collected in the fringing field

area, divided by space between the adjacent gates, SG, the formula for it

becomes:

1.575

O

G

CS

(20)

Table 7 lists the SG values for all the designs. The bolded values in the

table are those where the fringing fields do not overlap, and so an open area

73

without collection exists. Sensitivity Co is then calculated using equation 6 for

those open areas.

Table 7: Spacing between the adjacent poly gate fingers edges. Bolded values are where the gate fringing fields do not overlap.

Spacing between adjacent gate fingers SG (µm)

Gate Width 3-Finger 5-Finger 7-Finger 9-Finger 11-Finger

0.72 2.54 0.910 0.367

0.5 2.87 1.185 0.623 0.343

0.25 3.25 1.498 0.915 0.624 0.526

0.18 3.35 1.585 0.996 0.702 0.449

Now we must consider the cases where the fringing fields overlap, and

create a potential well all across the open area. As shown in Figure 32, the 5

finger 0.72µm design with 1.75 times open area collection efficiency shows a

ripple in the potential well of 0.3 µm, while the 7 finger design with the highest

collection efficiency of 3 times the standard has a ripple of only 0.01µm. It seems

reasonable to assume, as a first approximation, that the collection efficiency

would scale with the amount of ripple. Hence doing a straight line fit for those 2

experimental data points give the Co as,

3.043 4.31O SCLC R (21)

Where CO is the collection efficiency in the open area and RSCL is the

fraction of ripple in the space charge layer. Using these two formulas of (7) and

(8) for the open area efficiency Co the overall sensitivity gain for the designs can

now be estimated.

74

For the areas under the photogate fingers it is reasonable to assume the

collection efficiency CG will be the same as under the standard photogate (i.e. CG

= 1).

Thus the overall device sensitivity SR, relative to the standard photogate

will be given by multiplying the fraction of the sensor area containing the poly

gates AG by its efficiency CG , and the open area fraction Ao by the open area

efficiency Co

R G G O OS C A C A (22)

Table 8 shows the percentage open area of the 5, 7, and 9, multi finger

designs with 0.72 µm, 0.5 µm, 0.25 µm, and 0.18 µm used in these calculations.

75

Table 8: Percentage open area in multifinger photogate designs.

Width of Poly gate finger

Number of Poly-gate Fingers

3-Finger 5-Finger 7-Finger 9-Finger

0.72µm 59.3% 42.5% 25.8% NA

0.50µm 67.0% 55.3% 43.6% 32.0%

0.25µm 75.7% 70.0% 64.1% 58.4%

0.18µm 78.2% 74.0% 69.8% 65.6%

Figure 34: Sensitivity ratio of 0.72µm multifinger designs with respect to standard photogate vs. photogate area

•"•:~ 0.8,,;; 0.6

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76



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77


Using equation (9) for a given polygate width the sensitivity of the

multifinger designs can be plotted as a function of the total polygate area. Figure

34 shows the change of sensitivity with respect to the photogate area for the 0.72

µm gate width, which is the same as that determined experimentally in Figure

17(chapter 3). This is expected as the experimental data was used to generate

the parameters used in this model.

Shrinking the fingers to 0.5 µm (see Figure 35) produced a very similar

curve with a higher peak sensitivity of 1.81 times in the 7 finger design. Note the

shape of both curves. Sensitivity at the 3 finger case starts below that of the

standard (fully covered) photogate. It then increases as the number of fingers

increases (and the spacing between the fingers decreases) until it reaches a

peak. Adding fingers beyond that peak may make reduce the potential well

ripple, but it decreases the open area fraction, and thus results in the sensitivity

declining. Thus the 9 finger version of the 0.5 µm design is less sensitive than the

25

,

o

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78

7 finger. For the 0.25 µm fingers this peak comes for the 9 finger case, which

now rises to 2.1 times the standard (Figure 36). For the 0.18 µm fingers the peak

is the 11 finger design at 2.2 times the standard (Figure 37). However the

improvement is only modestly greater than the 0.25 µm design.

Figure 38 shows a plot of the designs that achieved the highest sensitivity

versus the gate width. What these calculations suggest is that even small gate

widths would show increasing sensitivity. It must be cautioned that these

sensitivity calculations are done by projections from the experimental cases

using the assumption that the shape of the potential well will predict the

sensitivity. While this seems reasonable, a better method would be to simulate

what actual collection of photocarriers is. That would enable us to really project

the sensitivity without this assumption about the potential well shape. This will be

done in chapter 6.

It should be noted that, all the multifinger designs simulated in this thesis

contain an odd number of fingers. This is partially because the current work is an

extension of the experimental 3, 5 & 7 0.72 m multifinger designs. Here, the

centre of the middle (second finger) in the 3 finger design was taken as a

reference to model all the other designs and thus resulted in odd numbered

multifinger designs. It gives a potential well that is deepest at the centre of the

pixel.

Designs with an even number of fingers would leave the centre line open,

but should behave the same. In fact, simulating multifinger designs with even

number of fingers will add more data points to the sensitivity plots showed in

79

Figure 34, Figure 35, Figure 36, and Figure 37. Once the fringe fields begin to

overlap (as in the 0.72 m 5 finger design), even designs would simply generate

an in-between level of ripple in the potential well. This is reflected by the

sensitivity curves which show a nearly even slope rising to the peak, with a very

smooth decline from the peak. Given the sensitivity projection formula used in

this chapter, even points would only modestly change the location of the peak

sensitivity point in most curves. It is possible though that in the 0.72 m designs

a 6 finger even design would be nearer the peak. Future work discussed in

chapter 7 will explore this.

Figure 38: Maximum sensitivity Vs Width of the gate.

2.5

2

o

l\Iaximum Sensitivity ratio Vs gate width.

-fing~...."noel'

7-finger

o 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

Gate "idth (fnn)

80

5.5 Summary

In this chapter, advanced 2-dimensional device simulations in correlation

with the previously obtained experimental results explored various possibilities of

enhancing the sensitivity of the multifinger photogate APS design. Besides,

verifying that the affect on the fringing fields, with respect to changes in gate

width are negligible, the simulations showed that reducing the gate width and

replacing the open area with more fingers significantly increased the sensitivity.

Also, the tradeoff in sensitivity with the strength of the potential well and

the open area was tested to predict the maximum point of increase. For example,

while the 9 finger design with 0.25µm gate width and the 11 finger design with

0.18µm gate width were the most sensitive, increasing the number of fingers

further would result in a decrease in the available open area and hence lower

efficiency.

Since current device technologies allow 0.045 µm gates the improvements

might be significant. It is important to note that these predictions are made by

combining the experimental measurements of the 0.72 µm designs with the

potential well simulation results. While these predictions are good, what they do

not include is flow of photocarriers within the device. The next level of simulation

will involve injection of photons and creation of the photo electrons at the

expected depth which will be integrated over the standard pixel exposure cycle.

Clearly the movement of carriers must be taken into account to calculate

the true sensitivity. Optical module additions to the Sentaurus DEVICE simulator

81

will enable this. Also we have not taken into account the changes in the potential

well depth, which such a simulation would also consider.

82

6: SIMULATING PHOTOCARRIER GENERATION IN MULTIFINGER PHOTOGATE APS DESIGNS TO ACHIEVE ENHANCED COLLECTION EFFICIENCY.

In the previous chapter, advanced 2-dimensional device simulations had

shown that the fringing fields form the poly fingers would create a potential well

shape that approached that of the standard fully covered photo gate. However,

those designs provided large open areas which would have less optical

absorption. Reducing the gate widths resulted in higher efficiency of photo

carriers generated in the larger open areas while keeping the potential well

shape desired. But, till now, the simulations showed only the potential well shape

and did not clearly show the collection of the photoelectrons. In order to improve

our prediction of the design with maximum sensitivity, it is necessary to simulate

the pixel response under illumination.

This chapter presents the work [18] conducted using the optical

generation module, provided by the advanced 2-D TCAD device simulator

Sentaurus Device, to simulate the response of each of the multifinger photogate

pixel designs to white light.

6.1 Simulation setup

The simulation setup for device strucuture generation, doping and mesh

generation was kept the same as that explained in chapter 5. In addition to the

existing set up, an optical solver for the optical generation and simulation of the

83

standard and multifinger photogate designs under illuminated conditions has

been added.

6.1.1 Device simulation

The transfer matrix method (TMM) optical solver was used to simulate the

devices for optical generation [17].

First the optical generation profile of the device is obtained by solving for

white light illumination. This calculates the rate at which carriers are generated in

both below the polygate and in the open areas. The TMM includes both the

intensity and spectral distribution of the illumination, which in this case was

matched to that of standard white light. Figure 39 shows the optical generation

profile obtained for the standard photogate APS design. Note that this TMM

simulation automatically calculates the light absorption in the poly gate, so

carriers entering the region below the poly are lower than that in the open areas.

Figure 39: Optical generation profile of a standard photogate APS

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84

The optical generation profile obtained for each device design is used as

an input file for its corresponding electrical simulation.

Figure 40: Illumination spectrum of the simulated white light source.

Figure 40 is the spectral plot of the simulated light source used to simulate

all the multifinger designs for pixel response to white light. All the devices were

simulated for 1.8V gate voltage, illuminated with a white light source set for linear

illumination for 0.1 seconds. The generation of photocarriers and their

accumulation over time was plotted using transient simulation method. It is very

important to choose the right amount of optical illumination levels and the

exposure time used in these simulations. If too high an illumination level and/or

too long an exposure (integration time), the behaviour of the device was not

correct because the wells would overfill with charges. That corresponds to the

case of a saturated pixel, where it no longer responds linearly to increases in

illumination. Thus, the right optical illumination was explored carefully by

Illumination spectrum(white light)

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85

simulating several illuminations, each factors of 2 smaller than the other, until a

linear behaviour was found. That is, in a selected region, reducing the

illumination strength in the optical spectrum file by a factor of 2 resulted in the

same reduction in the number of carriers collected. At the same time the

integration time of 0.1 sec was found to be the longest before other non linear

changes in the carrier density occurred. This range worked both for the standard

photogate and all the multifinger photogates. Thus suggesting that, the potential

well electron collection capacity is the same for both the standard and multifinger

designs.

6.2 Results

In this chapter, the new metric to measure the pixel sensitivity is to

measure the total number of generated photocarriers (ephoto) that can be

collected by the potential well in each type of pixel design. In each design, the

simulator will integrate the number of electrons within the volume of the device.

The number of photogenerated carriers is obtained by subtracting the total

number of electrons collected by the potential well without illumination (edark) from

the total number of electrons collected by the PW with incident illumination (e light)

as shown below.

photo light darke e e (23)

Once again, considering the sensitivity of the standard photogate APS to

be 100%, the sensitivity an individual illuminated multifinger design can be

calculated by,

86

( ) ( tan )( / ) 100photo Multifinger photo S darde e (24)

The simulated results for the 3, 5, 7, 9, 11, 13 and 15 multifinger designs

with all the gate widths of 0.72µm (3 to 7 fingers), 0.5µm(3 to 9 fingers), 0.25µm

(3 to 13 fingers) and 0.18µm (3 to 15 fingers) under dark and illuminated

conditions are shown in Figure 41, Figure 42, Figure 43 and Figure 44

respectively.

Comparing the electron concentration inside the potential well between

the dark and illuminated device, it can be noted that the density of the carriers

increased significantly under the gate than in the open area. This indicates that

the generated carriers in the open area are swept under the gate with the applied

gate voltage.

87

No. of

Fingers

Polygate width = 0.72µm

Dark Light

3

5

7

Figure 41: Photocarrier collection in the multifinger designs with 0.72um polygate width.

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Another important observation to be made is for the multifinger designs

where the fringe fields from the adjacent gate fingers extend into the open area.

Here, for the 5 and 7 finger designs with 0.72µm, 7 and 9 finger designs

with 0.5µm and 0.25µm gate widths and the 9 and 11 finger designs with 0.18µm

gate width, the ripple in the potential well increased for the simulation with light

when compared to dark. This might be due to the reason that by integrating the

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collection of generated carriers over time, the carrier charge density appears to

vary the shape of the space charge layer. A closer look at the multifinger designs

with the potential well almost resembling that of the standard photogate such as

the 9 finger design with 0.5µm gate width and the 11 and 13 finger designs with

gate widths 0.25 µm and 0.18 µm shows that the depth of the potential well

decreases slightly when illuminated. This is understandable because the fringe

field is much weaker than that under the gate, and thus is more affected by the

collection of charge. In reality this really only occurs for the cases near

saturation of the device.

These two observations indicate that, the open space between the fingers

dominates the fringing fields in determining the depth of the potential well and

hence the sensitivity.

6.3 Sensitivity estimation and analysis

To consider the amount of open area in each design would be a good

direction in estimating the sensitivity considering the contribution of open area in

the collection of photocarriers. Table 9 once again shows the percentage open

area of the 3, 5, 7, 9, 11, 13 and 15, multi finger photogate designs with 0.72μm,

0.5μm, 0.25μm, and 0.18μm gate widths used in these calculations [16]. While

open area will allow more light to create photocarriers in the substrate, if the

carriers are created too far from the potential wells they will not be collected.

Hence there is a trade off between open space and the number of fingers.

94

To measure the sensitivity, the total number of photo carriers collected by

the potential well for each multifinger design is given in the Table 10.

Table 9 : Percentage open area in multifinger photogate designs

Width of polygate

fingers(µm)

No of polygate fingers

3 5 7 9 11 13 15

0.72 59.3 42.5 25.8 NA NA NA NA

0.50 67.0 55.3 43.6 32.0 NA NA NA

0.25 75.7 70.0 64.1 58.4 52.4 46.5 40.7

0.18 78.2 74.0 69.8 65.6 61.4 57.2 53.0

95

Table 10: Simulated results of the total number of photocarriers(x 109/cm

3), that are

captured by space charge layer of each multifinger design pixel for one exposure cycle. (Bolded values indicate, designs with highest number of collected carriers)

Note: For the Standard design, the number of photocarriers is 21x 109/cm

3.

Width of polygate

fingers(µm)

No of polygate fingers

3 5 7 9 11 13 15

0.72 57 66 29 NA NA NA NA

0.50 61 85 56 39 NA NA NA

0.25 57 79 120 72 72 54 55

0.18 50 68 110 75 70 77 56

For the standard design, the number of photocarriers is 21X109/cm3 under

the provided illumination conditions. What the 0.72μm results show here is quite

interesting.

The 3 finger shows much higher carrier numbers 57x109/cm3 than the

standard while the peak is at the 5 finger with 66x109/cm3 and the 7 finger

significantly decreases to 29x109/cm3. The decrease at 7 fingers is probably due

to the much lower area. What this suggests is that much more photocarriers are

created in the much open lower area, which is only 29% so that the optical

absorption in the gate area dominates than in the experimental design. This is

consistent with the experimental results that showed the silicon nitride covering

of the open areas was much more absorptive than expected which was stated

earlier in chapter 3. Since, the previous experimental designs were not fabricated

96

in an optically optimized process technology, the insulating Silicon Nitride layer

underneath the photodetector also accounted for absorption of the generated

carriers and hence resulting in decreased sensitivity. This means that with an

optimized insulator that does not absorb light, all these optical illumination

designs will tend to have better results with more open area, than expected. This

is in agreement with what was noted in previous section for the shape of the

potential wells. The point is that if true this suggests that the best sensitivity

would reach 3.1 times that of the standard device, while in the experimental (but

with non optimized material) it only reached 1.5 times.

Note that the maximum number of carriers collected appears in the 7

finger designs for 0.25μm, and 0.18μm gate widths, with the 0.25μm having the

highest sensitivity.

Based on these collected photocarriers Figure 45 shows expected

sensitivity relative to that of the standard photogate for all the designs.

97

Figure 45: Multifinger photogate sensitivity Vs photogate under light with respect to the standard photogate.

For any given multifinger design, the increase in the collection of

photocarriers appears to increase with decreasing gate width to a certain point

and then decrease again except for the 7 finger designs with 0.25µm and

0.18µm. From Figure 44, it can be observed that the 7 finger design despite

having a very weak potential well formation with no overlap in the open spaces

SensitvityVs photogate area forO.72lJmgate width

SensitivityVs photogate area forO.5lJmgate width

150

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98

has collected the second highest number of photocarriers. This indicates that the

open area collection efficiency is higher than expected. The sensitivity plots of

Figure 45 show that, while the 5 finger design attained higher sensitivity for the

0.72µm and 0.5µm gate widths, the 7 finger design achieved peak sensitivity of

for both 0.25µm and 0.18µm gate widths with a highest of 550% for the 0.18µm

gate width.

What is probably going on here is that by the 7 finger design the potential

wells and fringing fields are strong enough that even those photocarriers created

where there are weak fields are driven by the potential gradient to be collected in

the wells.

6.3.1 Predications

At this stage, this research work will gather all the necessary experimental

results and advanced simulations required to understand the multifinger pixel

designs in terms of carrier collection using the potential well shape, integration of

photo carriers by optical simulations for achieving enhanced sensitivity. However,

a brief comparison of the sensitivities obtained using optical illumination in the

current chapter with the previous results provided with many interesting

analogies. Figure 46 & Figure 47 show the sensitivity curves of the experimental

results obtained in chapter 3 simulated results for multifinger designs without

illumination from the previous chapter respectively.

99

Figure 46: Experimental results for the fabricated CMOS 180nm multifinger APS designs showing sensitvity Vs photogate area.

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100

Figure 47: Sensitivity of the multifinger pixels in the dark Vs photogate area with respect to the standard photogate. (Note: The data points represent number of

polygate fingers on all plots.)

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Comparing the simulated results of the 0.72µm gate width multifinger

designs (Figure 45) with previous experimental results (Figure 46), the 3 finger

design achieved a higher sensitivity of ~2.5 times the standard when simulated

as opposed to having a lower sensitivity of 0.62 times the standard. Moreover

the 5 finger shows 3.1 times the sensitivity of the standard design, which is much

higher than the 1.3 times seen in Figure 47 and Figure 46. Again these

observations indicate that there could be absorption in the insulation layers of

experimental designs and that the simulations did not account for the absorption

by the insulating layers in the device.

The 0.5µm design shows a peak at 5 fingers (see Figure 45), which is 3.9x

greater than the standard, then decreases for additional fingers. From Table 9,

note that the 5 finger has 55% open area, which is 30% greater than the 7 finger

design. Again this shows that open area is much more important for efficiency

than the potential well shape. Interestingly when going to narrower gate widths

of 0.25µm the 5 finger sensitivity stays nearly the same at 3.8x increase, but the

7 finger is now the peak at 5.7x the peak value. This is a clear case of how the

shape of the potential well is having a significant effect because the open area

has decreased from 5 fingers (70%) to 7 fingers (64%).

When increased to 9 fingers the sensitivity falls sharply to 3.4 times the

standard APS design. Beyond 9 finger design, the sensitivity drop is very drastic

and requires further analysis. The 0.18µm gates show a similar result with the 5

finger more significantly to 3.2x and the 7 finger peaking at 5.2x the standard

sensitivity, and again showing a sharp fall at the 9 finger result.

102

By comparison, Figure 47, based only on the potential well shape, the 9

finger design with 0.25µm gate width and the 11 finger design with 0.18µm gate

width were the most efficient. Part of the problem may be that when their

sensitivities were predicted based on the strength and uniformity of the potential

well in the non-illuminated case it does not take into account the change in the

wells when the illumination occurs. The simulations with optical illumination show

that the sensitivity calculated for the 9 finger and 11 finger designs with narrower

gate widths of 0.25µm and 0.18µm is almost the same despite being lower than

the 7 finger design. The slope of the sensitivity curve both in the 0.25µm and the

0.18µm designs appears to flatten around 9, 11 and 13 finger designs.

Indeed there is some oscillation in the results for this higher number of

fingers. This is quite unexpected behavior and suggests there is a problem with

the simulations at this higher number of fingers. One possible explanation for

such a behavior could be that the mesh size used to generate the device profile

plays an important role affecting the simulated results. While the same meshing

had been implemented for all the designs, it was noted that as the number of

fingers increased, the need for a much finer mesh is suggested in the open

spaces during illumination. A test done with a lower density mesh showed a

significant decrease in the 7 finger simulated sensitivity which suggests the mesh

size works well up to 7 fingers, but starts to be too coarse for the higher number

of fingers. Unfortunately trying to increase the mesh density to simulate these

designs was not successful due to memory overflow. We can conclude that the

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sensitivity is significantly underestimated in these higher finger designs with very

narrow gate widths.

Once again, the necessity for simulating multifinger designs with even

number of gate fingers is reflected clearly in the sensitivity plots of Figure 45. The

sensitivity curves with optical simulation are much more sharply peaked than

those of the potential well simulations of chapter 5. Thus even designs may be

more important for seeing what is happening near the peak. For example,

consider the sensitivity plots of multifinger designs with 0.25m and 0.18m gate

widths. In both the curves, the sensitivity tends to rise sharply till 7 finger design

and then drops suddenly towards 9 finger design. Such behavior suggests that,

simulating multifinger designs with even number of fingers such as 6 fingers and

8 fingers might result in the smoothening of the sensitivity curves and help in a

better understanding of the behavior of multifinger designs under light. In addition

the even designs near the peak may not suffer the simulation difficulty that was

noted for these 9 finger designs. This will be further discussed in the future work

section.

6.4 Summary

Multifinger photogate APS designs were simulated to observe the

photocarrier generation and collection using optical illumination. It was observed

that the generated carriers in the open spaces appeared to drift under the

photogate due to the applied gate voltage. With time the integrated photocarriers

vary the shape of the potential well inside the open spaces. Thus indicating the

open area sensitivity as a dominating factor in determining the efficiency of the

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multifinger photogate APS. The 7 finger design with 0.25µm gate width showed

the peak sensitivity 5.7 times the sensitivity of the standard photogate. However

limitations in the simulations may underestimate the values for higher number of

fingers.

The affect on sensitivity by the size of the mesh used on designs with

higher number of fingers (fingers>7) suggested that, a much finer mesh is

necessary in the open spaces during photo-collection.

Possible absorption in the insulating layers observed for the previous

experimental results were not accounted in current simulations compared to the

actual experimental work. This suggests that an optically optimized process will

have much greater sensitivity than the current experimental device for the

smaller gate sizes.

Also, future work, can include diffraction of light with smaller fingers, which

can further improve the performance of the multifinger photogate APS which is

possible due to new emerging technologies with narrower gate widths.

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7: CONCLUSION

CMOS APS technology, with advantages such as, the possibility to

integrate the signal sensing and signal processing circuits on the same chip, fast

response time has become an important alternative to the CCDs in present day

image sensors. However, of the two available types of CMOS APS devices, the

CMOS photodiode APS is more widely used, while the CMOS photogate APS

has been less studied due to its lower sensitivity in current designs caused by

significant polysilicon gate absorption of the incident light signal.

This thesis, explored the idea that by making changes in the photogate

photodetector structure using a multifinger approach, the performance of an the

existing standard photogate can significantly be improved.

7.1 Experimental work

The thesis first provided a detailed overview of the previous works carried

out by Michelle La Haye and Jenny Leung to obtain the spectral sensitivity

response of experimentally tested multifinger photogate APS designs fabricated

in the 0.18µm CMOS technology. The designs consisted of the standard

photogate APS, 3 finger photogate APS, 5 finger photogate APS and 7 finger

photogate APS. The fingers were formed by replacing the photogate area with

0.72m wide poly lines, which now create significant open spaces within the

photogate area.

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The idea here is that the open spaces created would allow for more light

to pass through without any absorption in the polysilicon gate material, while the

fringe fields extending from the fingers will form a potential well in the open

spaces to collect the photo generated electrons. The previous experimental

results showed that the open area could collect 3 times more photocarriers than

that collected by an area collected under the photogate. The obtained results

showed that the open area could collect 3 times more photocarriers than that

collected by an area under the photogate.

The 7 finger APS design which had the lowest open area of 25.8% the

photogate area achieved the highest sensitivity of ~150%, while the 3 finger

design, which actually had largest open area of 59.3% achieved ~70% which is

less than the standard photogate of 100%. On the other hand, the 5 finger APS

design with an open area of 42.5% was able to achieve ~130% sensitvity. These

results concluded that the open area collection efficiency increased substantially

when there are more number of fingers, bringing the adjacent fingers close

enough for the fringe fields to overlap and form a strong potential well in the open

spaces. Hence, suggesting that the collection efficiency is directly dependent on

the strength of the fringing fields covering the open spaces between adjacent

fingers.

However, the tradeoff occurring between the available open area to collect

input light signal and the maximum number of fingers that can be placed,

demanded a need to explore the working of the multifinger design with a device

physics perspective to know the importance of the role played by fringefields in

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improving the sensitivity and to optimize the designs to achieve the best pixel

performance.

7.2 Analysis using device simulations

Initially, only the experimental designs, were modeled to have a better

understanding of the working of the multifinger APS in a device physics level.

Simulations then confirmed the role played by fringe fields in improving the

sensitivity of multifinger designs with more number of fingers. In this thesis an

advanced device simulator required to model the carrier distribution and optical

generation of carriers became necessary. Also, since the experimental designs

used only 0.72m wide polylines over open space as photogate fingers due to

process limitations. The advance device simulations allowed for exploring more

designs by reducing the gate widths to 0.18m which is the technology limit of

the simulated process and increasing number of fingers.

Modeling and analysis of various multifinger photogate APS designs using

advanced TCAD simulations

As a part of understanding the tradeoffs between available open area to

the number of polygate fingers and to find the optimum design with maximum

sensitvity, TCAD device simulations were used to model a total of 27 multifinger

designs. These designs constituted, experimental designs with 0.72m gate

widths, designs with reduced gate widths of 0.5m, 0.25m and 0.18m and the

multifinger designs where the available open area was compensated by adding

more fingers. The efficiency of the designs was determined based on the shape

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and uniformity of the potential well formed in each design. One important

observation made is the small amount by which fringe filed gets affected by

variations in the width of the gate. It was observed that for any multifinger design,

the fringe fields extend approximately ~ 0.4m laterally into the open space

between adjacent polygate fingers irrespective of the width of the gate finger.

This means that designs with narrower gate widths and increased number of

fingers will be more efficient, as they allow for more open area while forming a

strong potential well in the open space due to the overlapping of fringe fields from

adjacent gate fingers. Taking the uniformity and strength of the potential well as

the metric, to estimate the efficiency of the multifinger designs, the simulated

results were found to be in line with the experimental results where the 7finger

design achieved the highest sensitivity for multifinger designs with 0.72m gate

fingers. Using this metric, the peak sensitivity of 2.1 times the standard photogate

APS was achieved by 9 fingers with 0.25m gate width and 2.2 times the

standard photogate APS by 11 finger design with 0.18m gate width. The

weakness of this projection was that it relied on the shape of the potential well,

and not on the actual carrier distribution. This was addressed in the next

simulation set.

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7.3 Multifinger photogate APS pixel response to simulated optical illumination

The pixel response with white light illumination was carried out for all the

multifinger designs using optical simulations. Observations included the carrier

generation and collection inside the potential well.

It was observed that over time, the carrier concentration increased under

the gate suggesting that the carriers generated inside the open spaces drifted

under the gate due to the applied electric field.

A comparison of the electron concentration of any given multifinger design

between dark and illuminated conditions showed that the carrier concentration

increased significantly under the polygate that it could affect the shape of the

potential well. As a result of this, the ripple in the potential well increased when

illuminated indicating the significant contribution by the open space in

photocarrier collection.

Sensitivity estimation based on the number of collected optically

generated electrons showed that, a significant 5.1 times the sensitivity of the

standard photogate can be achieved as gained by the 7 finger design with

0.25m polygate finger width. Limitations in the simulations relating to mesh size

and memory overflow might have underestimated the potential of the higher 9

finger and 11 finger designs to perform much better.

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7.4 Future Work

This thesis showed with the help of simulations that the variation in the

strength of the fringe fields is negligible with respect to the changes in the width

of the gate. Hence, with present day CMOS processes available, multifinger

designs with polygate widths as low as 0.045m and increased number of fingers

can be made. The advantages such designs would possess are,

More open area available due to smaller gate widths.

Stronger potential well formation in the open space due to

negligible effect on the fringe fields with reduction in the width of the

gate.

One point not considered in this thesis but that should be explored in

future work is that these smaller gate designs will show increasing diffraction

effects for the incoming light. Optical diffraction occurs significantly when object

sizes decrease to near or below the wavelength of light, which is 0.4 to 0.7 µm.

This will cause light to be diffracted around the poly gates, probably increasing

the amount of light entering the open areas. This would require the addition of an

optical path simulator to the TCAD simulation process.

An optically optimized process to fabricate the multifinger photogate APS

will solve the problem of possible absorption by insulting materials such as SixNy

and thus improve the quantum efficiency of the pixels particularly in the blue

spectrum.

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Future work should also include choosing proper dimensions to mesh the

modeled devices for predicting how efficient are designs with higher number of

fingers, while tackling the problem with memory overflow.

Lastly, the current work only concentrated on simulating multifinger

designs with odd number of fingers. However, as was shown in chapters 5 and 6,

future investigations involving the simulation of multifinger designs with even

number of gate fingers is necessary to better find the peak sensitivity. The

extension of such investigation is currently being pursued by Sunjaya Djaja in our

research group.

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[1]Horn, B. K. (1986). Robot Vision. New York: The MIT Press. [2] Catrysse, P. B. (2003). Dr. Thesis. [3]DALSA. (n.d.). Image sensor architectures for digital cinematography. Retrieved September 8, 2010, from www.dalsa.com: www.dalsa.com/.../Image_Sensor_Architecture_Whitepaper_Digital_Cinema_00218-00_03-70.pdf [4] Noble, P. J. (1968). Self-Scanned Silicon Image Detector Arrays. ED-15. IEEE. , 202 - 209. [5] Chamberlain, S. G. (1969). Photosensitivity and Scanning of Silicon Image Detector Arrays. IEEE Journal of Solid-State Circuits SC-4 (6) , 333 - 342. [6] P. K. Weimer, W. S.-H. (1969). Multielement Self-Scanned Mosaic Sensors. IEEE Spectrum 6 (3) , 52 - 65. [7] Haye, M. L. (2007). Enhancing sensitivity for active pixel sensors with fault tolerance and demosaicing. Burnaby: Simon Fraser University. [8] Jing, T. (2002). Patent No. US 6,350,979 B1. Fremont, CA, USA. [9] Koji YAMAMOTO, Y. O. (2006). A 128 x 128 Pixel Metal Oxide Semiconductor Imager With an Improved Pixel Architecture for Detecting Modulated Light Signals. Optical Review Vol. 13, No. 2 , 64-68. [10] Jenny Leung, M. L. (2009). The implementation and spectrum response analysis of multifinger photogate APS pixels. Proc. SPIE, Vol. 7249, 724903 ; DOI: 10.1117/12.806110 . [11] Fossum, E. R. (1997). CMOS Image Sensors: Electronic Camera-On-A-Chip. IEEE TRANSACTIONS ON ELECTRONIC DEVICES , 5. [12] Jung, C. G. (2007). Characterization of duo-output and Fault tolerant active pixel sensors. MASc. Thesis, Simon Fraser University Library, Burnaby, CA [13] F.M. Li, A. N. (2005). CCD Image Sensors in Deep-Ultraviolet Degradation Behaviour and Damage Mechanisms. New York: Springer.

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[14] E.D.Palik, Handbook of optical constants of solids. New York: Academic Press, 1985. [15] Kalyanam, P. V. (2010). Enhanced Sensitvity Achievement Using Advanced Device Simulation Of Multifinger Photogate Active Pixel Sensors. Proc. SPIE, Vol. 7536, 75360G (2010); DOI: 10.1117/12.839157 (pp. 1-12). San Hose: SPIE. [16] Synopsys. (2008). Sentaurus Device User Guide. Synopsys Inc. Synopsys. (2008). Sentaurus Structure Editor User Guide. Synopsys Inc. [17] Kalyanam, P. (2011). Simulating enhanced photocarrier collection in the multifinger photogate active pixel sensors. San Francisco: SPIE. [18] Ohta, J. (2007). Smart CMOS Image Sensors and Applications. In J. Ohta, Smart CMOS Image Sensors and Applications (pp. 12-13). CRC Press.

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DEVICE MODELING AND ADVANCED 2-DTCAD ...summit.sfu.ca/system/files/iritems1/11821/etd6791...MASc. Device modeling and advanced 2d tcad simulation of multifinger photogate APS for enhanced