Device Interface Board Design for Wireless LAN Testing Project Plan

Team

May 05-29

Client ECpE Department

Faculty Advisor

Dr. Weber

Team Members Nathan Gibbs, EE

Adnan Kapadia, EE Daniel Holmes, EE/CprE

Kyle Peters, CprE

REPORT DISCLAIMER NOTICE

DISCLAIMER: This document was developed as a part of the requirements of an electrical and computer engineering course at Iowa State University, Ames, Iowa. This document does not constitute a professional engineering design or a professional land surveying document. Although the information is intended to be accurate, the associated students, faculty, and Iowa State University make no claims, promises, or guarantees about the accuracy, completeness, quality, or adequacy of the information. The user of this document shall ensure that any such use does not violate any laws with regard to professional licensing and certification requirements. This use includes any work resulting from this student-prepared document that is required to be under the responsible charge of a licensed engineer or surveyor. This document is copyrighted by the students who produced this document and the associated faculty advisors. No part may be reproduced without the written permission of the senior design course coordinator.

Date Submitted September 17, 2004

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Table of Contents List of Figures iii List of Tables iv List of Definitions v

1. Introductory Material 1

1.1 Abstract 1 1.2 Acknowledgement 1 1.3 Problem Statement and Solution 2

1.3.1 Problem Statement 2 1.3.2 Problem Solution 2

1.4 Operating Environment 3 1.5 Intended User and Intended Use 3

1.5.1 Intended User 3 1.5.2 Intended Use 3

1.6 Assumptions and Limitations 4 1.6.1 List of Assumptions 4 1.6.2 List of Limitations 4

1.7 Expected End-Product and Other Deliverables 5

2. Proposed Approach and Statement of Work 6

2.1 Expected end product and other deliverables 6 2.1.1 Functional Requirements 6 2.1.2 Constraints Considerations 6 2.1.3 Technology Considerations 7 2.1.4 Technical Approach Considerations 7 2.1.5 Testing Requirements Considerations 8 2.1.6 Security Considerations 8 2.1.7 Safety Considerations 9 2.1.8 Intellectual Property Considerations 9 2.1.9 Commercialization Considerations 9 2.1.10 Possible Risks and Risk Management 9 2.1.11 Project Proposed Milestones and Evaluations Criteria 11 2.1.12 Project Tracking Procedures 13

2.2 Statement of Work 13

3. Estimated Resources and Schedule 25

3.1 Personnel Effort Requirements 25 3.2 Other Resource Requirements 26 3.3 Financial Requirements 26 3.4 Project Schedule 26

4. Closure Materials 29

4.1 Project Team Information 29 4.1.1 Client Information 29

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4.1.2 Faculty Advisor Information 29 4.1.3 Student Team Information 29

4.2 Closing Summary 29 4.3 References 30

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List of Figures Figure 1: Teradyne J750 v Figure 2: Proposed project setup 1 Figure 3: Overview of project solution 2 Figure 4: ESD wristband 9 Figure 5: Gantt chart – part 1 27 Figure 6: Gantt chart – part 2 27 Figure 7: Gantt chart – part 3 28

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List of Tables Table 1: Milestone Completion Scoring Rationale 11 Table 2: Final Project Evaluation Breakdown 13 Table 3: Estimated personal efforts 25 Table 4: Estimated additional resources 26 Table 5: Estimate project costs 26 Table 6: Team member information 29

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List of Definitions Coover – The electrical engineering building on the Iowa State campus that houses the

Teradyne J750 ESD – Electrostatic discharge, or simply the discharge of static electricity ECpE – Electrical and Computer Engineering DIB – Device interface board. This board is the physical interface between the Teradyne

and chip attached to the Teradyne DUT – Device under test. In this paper, it refers to any wireless chip that could be tested

by the Teradyne IG-XL – Software package used to develop test programs for the Teradyne J750 ISU – Iowa State University I/O – Input and output LAN – Local area network RF – Radio frequency, refers to signals with frequency in the 9kHz-300Ghz range Teradyne J750 – Tester donated to Iowa State University by Teradyne. Seen below, it is

used in the testing of printed circuit boards and integrated circuits.

Figure 1 – Teradyne J750

TI chip – Any of the family of Texas Instruments wireless chips TDR – Time domain reflectometry. This refers to making paths that signals take in the

time domain equal so the signals arrive at the same time.

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1. Introductory Material

This section will introduce the project, including the abstract, acknowledgements, problem statement and solution, operating environment, intended users and uses, limitations and assumptions, expected end product and other deliverables

1.1 Abstract

Today, hundreds of companies are producing wireless LAN cards and routers. But to make sure these products perform as needed, high speed testing of the RF components is necessary. Iowa State University has an excellent tester, the Teradyne J750, however the J750 cannot currently test wireless devices.

The purpose of this project is to investigate if it is possible for the Teradyne J750 to remotely test a LAN chip. In order to investigate this, the team will develop a wireless front-end for the Teradyne and will attempt to use the front-end to test the RF capabilities of a remote wireless LAN chip. If it is possible, the team will create a working demonstration, and write a manual for future users to set up wireless tests. If it is not possible, the team will document its findings and pass them along to Teradyne. The proposed setup is seen in Figure 2.

Figure 2: Proposed project setup

1.2 Acknowledgement

The team would like to take the opportunity to thank Dr. Robert Weber for his commitment to advise the team through the course of the project. The team would also like to thank Bernard Lwakabamba for his help on the TI wireless LAN chip.

J750 Wireless front-end for J750

Goal: Investigate if J750 can test RF of Remote LAN using TI chip

Remote Wireless LAN

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1.3 Problem Statement and Solution

This section shall outline the general problem as well as an overview of the proposed solution.

1.3.1 Problem Statement

Testing is a major part of the development process for almost any product. Products must be tested before they can be marketed to ensure that they work as they should. Educational institutions are also highly involved in research and testing. Knowing this, many companies often donate testing equipment to help with their research. This is the case with Teradyne’s donation of their Teradyne Integra J750 tester.

Iowa State University’s Electrical and Computer Engineering Department is interested in using a Texas Instruments wireless LAN chip to give the Teradyne Integra J750 Test System a wireless interface. Using the wireless interface, the Teradyne J750 would be able to test the RF capabilities of a wireless chip. However, there is currently no way to interface the Teradyne J750 and the TI LAN chip. Also, if an interface is made, it is unknown if the Teradyne J750 can receive a reply from a wireless chip under test. This is because there is a delay between when a signal is sent to the wireless chip under test and when the chip under test replies. The J750 is not usually used under such unknown delay conditions, so this project will asses the feasibility of using the J750 under such conditions, and try to develop a solution that will allow the J750 to receive a reply from the wireless chip after some unknown delay.

1.3.2 Problem Solution

A DIB will be used to connect the TI chip and the Teradyne J750. Test code will be developed for the Teradyne to interface with the TI chip. The team will develop solutions to test and make operational the I/O on the TI chip and the wireless chip. When all components are known to work, the team will develop a solution (or solutions if the first fails) to make the J750 test the RF capabilities of a chip under test. It is unknown if a solution exists, so the team will need to try multiple solutions to the unknown delay problem.

Figure 3: Overview of problem solution

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1.4 Operating Environment

The Operating Environment for the finished setup is indoors from 27°C to 33°C. It should not be subject to ESD or mechanical shock. This is because the client is the I Department Electrical and Computer Engineering, and it will only use the J750, the TI wireless chip set indoors in an air conditioned room. Because all components are expensive all users are expected to treat the setup with care, the chance of mechanical shock is limited. Also, the J750 is sensitive to temperature and can only be used from 27°C to 33°C, so the entire project will only be used in that temperature range. Lastly, because the J750 is so sensitive, users are required to wear an ESD band while using it, so the project will be safe from ESD.

The interface between the J750 and the TI chip set will be developed using the program IG-XL, the J750 interface development program. The PC on which IG-XL currently runs is a Windows-based PC.

1.5 Intended User and Intended Use

This section defines the intended users and uses of the project. 1.5.1 Intended User

The intended user is any member of the ECpE department that needs to test the RF capabilities of a wireless device. The size and sex of the person don’t have any bearing on their ability to test, however they must posses a basic knowledge of RF communication and understand how to run a test on the J750. Specifically, they must be able to make the frequencies of the DUT and the TI chip the same, and follow the reference manual this project will create to allow the J750 to test the RF capability of the DUT.

1.5.2 Intended Use

The intended use of the project is to allow the J750 to send a single signal wirelessly through the TI chip to a DUT. The DUT should receive the signal, process it, and send a signal back (the signal sent to the DUT will instruct the DUT to perform a diagnostic test and send back a reply) and the J750 will receive the reply through the TI chip.

The setup is only intended to test a single wireless DUT, it is not meant to monitor network traffic or multiple devices. Also, it is not meant to test all of the components of the DUT, just the RF capabilities. Sending the DUT a signal to perform a diagnostic test simply creates something for it to output to the J750 (though in the future, testing of the DUT could be done wirelessly).

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1.6 Assumptions and Limitations

This section defines the assumptions and limitations for the end-product. Assumptions and limitations will be added as decisions are made in the project.

1.6.1 Assumptions This section will provide details of the user and system assumptions

1.6.1.1 User Assumptions

• User knows English – The user-documentation will be written in English.

• User is well educated in electrical and/or computer engineering. Specifically user understands need to have TI chip and wireless device under test on the same frequency, with a compatible interface.

• User is aware of electrical hazards (short circuits, overloading, etc.)

• User is experienced with circuit testing using the Teradyne J750

• User has access to Teradyne lab in Coover Hall

• User will observe ESD requirements around Teradyne J750. 1.6.1.2 System Assumptions

• Teradyne can interface with the TI Wireless LAN chips with an existing daughterboard or a custom designed interface board.

• TI Wireless LAN Chip and the DUT communicate at one frequency.

• Setup can only test one DUT at a time

• Teradyne J750 can receive reply from wireless device after unknown delay period.

1.6.2 Limitations This section will provide details of the limitations identified with the project

• The Teradyne system is operating within ±3°C of its calibrated

temperature. (30°C for the current system)

• The Teradyne system can only test digital I/O. Therefore, all wireless chips must have digital I/O.

• Unable to use the setup if there are nearby wireless signals at similar frequencies

• The Teradyne J750 is stationary, so operating environment shouldn’t change.

• IG-XL software has the ability generate test codes for wireless LAN chips

• Range of the TI Wireless LAN chip is great enough to interface with wireless device under test

• Wireless device under test has large enough range to communicate with TI chip.

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1.7 Expected End-Product and Other Deliverables

This section will provide the details of the expected end-product and other deliverables

• By the end of Spring 2005 the project will result in:

• An electrical interface between the Teradyne J750 and a TI wireless LAN chip.

• A strong communication link between the TI chip (front-end for Teradyne) and the DUT. This means that TI chip and DUT can send and receive signals. It is unknown if the J750 can process the received signal after an unknown delay, which is the problem to be studied.

• If the J750 can receive an input from the DUT:

• A demo to test the digital components on a TI wireless LAN chip (DUT) using the Teradyne J750

• A reference manual on how to test a wireless system using the Teradyne J750.

• If the J750 cannot receive a reply from the DUT, the team will create a document explaining the failure of the project

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2. Proposed Approach and Statement of Work

The proposed approach and statement of work will detail the components and activities necessary to ensure project success.

2.1 Expected end product and other deliverables

This section will provide the details of the expected end product and other deliverables including the functional requirements, constraint considerations, and technology considerations, technical approach considerations and testing requirements.

2.1.1 Functional Requirements

The following describes the functional requirements of the end product

• The project shall develop a complete working interface between the Teradyne and TI chip

• The project shall choose a suitable DIB for the TI chip, or create a suitable DIB for the TI chip

• The project shall establish a strong communication link between the TI chip and the wireless DUT

• The project shall develop a test program using the IG-XL software, which will create allow the J750 to send a signal to the DUT

• The project shall determine the feasibility of making the Teradyne get a reply from a DUT after an unknown delay period

• The project shall test many solutions to the problem of unknown delay for a reply for the DUT

• The project shall test only one DUT at a time.

• The project shall only test the DUT at one frequency

• If the testing is a success, the project shall provide a reference manual which will help a future use set up a wireless test

• If the testing is a success, the project shall include a working demonstration of the project

• If the testing is a failure, the project shall document the results 2.1.2 Constraints Considerations

The following will describe the constraints in the use of this project

• The communication link between the TI wireless LAN chip and the DUT shall be limited to one frequency.

• The team shall develop the test code using the software IG-XL.

• The TI wireless LAN chip shall connect with one of the existing daughterboards or the team will develop a DIB to interface with the Teradyne.

• The distance between the DUT and the wireless LAN chip will be limited.

• The DUT shall be limited to a wireless LAN chip which has digital components (e.g. RAM)

• The operating conditions are limited to 30°C ± 3°C.

• The budget for the project is limited to $150.00

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• The project needs to be completed within 30 weeks.

• The Teradyne lab is only accessible by selected faculty and students.

• The user interface will only be in English. 2.1.3 Technology Considerations

This section presents several technology alternatives and criteria to evaluate each alternative.

There are two major hardware components that the team will have to evaluate. First, the team will have to evaluate the different wireless LAN chips from TI to determine the most suitable digital wireless card components for the project. Criteria to evaluate each alternative include:

• Range of operation of the TI chip

• Interface to existing DIB boards

• Compatibility with Teradyne J750 I/O

• Digital chip (Teradyne only has digital I/O) Second, the team will have to select the most suitable wireless DUT for the

project. Criteria to evaluate the many possibilities include:

• Chip that can be connected to a computer interface to monitor the incoming and outgoing signals on the DUT.

• Chip must be compatible with the TI chip chosen (frequency of operation, security etc.)

• Chip must have enough range to communicate with TI chip over a short distance

Lastly, the team will have to investigate the TI DIBs that ISU already owns. If a DIB exits that is compatible with the TI chip set, the choice is made. However, if there is no DIB available that fits the TI chip selected, the team will have to construct a DIB.

2.1.4 Technical Approach Considerations

This section outlines the methodologies in used in completing this project. The approach to the project will be to break the many technological challenges

into stages. By breaking the project up into stages, the team minimizes the risk in any given stage, and ensures that the project developed in each stage is complete and functional. Also, in each stage the part of the project to be developed will be researched, designed, implemented then tested. This ensures that each stage of the project will have a high probability of success. Lastly, breaking the project into stages allows for better scheduling. This ensures that the project stays on schedule and is completed on time. The stages are as follows:

The first stage will be to document the project plan, which will set the goals for the project, the budget for the project and the schedule of the project. The second stage will be to choose proper technologies, as described above. The third state is to document the I/O configurations on the Teradyne and the TI wireless LAN chip. The fourth stage is to develop an interface between the Teradyne and the TI chip chosen. The fifth stage is to get the I/O of the TI chip and DUT working. The sixth stage is to research and determine how to make the J750 interface with the DUT. The last stage is to implement the solution to allow the J750 to communicate with the DUT and receive output from the DUT.

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2.1.5 Testing Requirements Considerations

This section will describe the testing considerations required for the functionality of the device interface board. In order to ensure that each stage of the project works, it must be tested. For each stage the team will develop a test to determine the functionality of the chosen implementation, test the implementation and revise the implementation if necessary. Here are the tests that will be conducted by the team to ensure full functionality:

• Test the interface between the Teradyne J750 and the TI wireless LAN chip by monitoring the signals received on the transceiver and matching it with the input sent by the Teradyne. Acceptance criteria for the test are: strong signal and receiving signals as expected.

• Test the communication link between the TI wireless LAN chip and a known access point to establish the I/O of the TI chip. Acceptance criteria for the test are: strong signal and receiving signals as expected.

• Test the communication link of the DUT by interfacing it with a known access point. Acceptance criteria for the test are: strong signal – must be the same strength as the signal from the TI chip and receiving signals as expected

• Test the connection between the TI chip and the DUT by checking signals sent between the two.

• Test the entire setup by monitoring the test sent by the Teradyne and the diagnostics received by the TI wireless LAN chip.

2.1.6 Security Considerations

This section will discuss security concerns in the development of the product and the operation of the product by the end user.

The project is not propriety information so there are no concerns of an outside person gaining knowledge of this project. In the design development stage the team will have to make sure that its operation frequency does not exceed the specified bandwidth as that would violate FCC regulations. This is to avoid any interference with other signal frequencies which might be reserved for radio, communication or television networks.

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2.1.7 Safety Considerations

This section will describe the safety concerns in the operation of the product by the end user.

Since the team is not operating under high voltage or current conditions there are no life-threatening concerns with the use, maintenance or disposal of this product. But to ensure safety the user is required to wear an ESD wristband (as seen in figure 4) to avoid unwanted shocks which could damage the equipment and the project.

Figure 4 : ESD wristband

2.1.8 Intellectual Property Considerations

The ECpE department has no issues with protecting the information in this project. The design and the software will be open to public. However, only certain faculty members and students have access to the Teradyne lab in Coover.

2.1.9 Commercialization Considerations

The DIB has the potential to be marketable to companies that will require high volume testing of their wireless systems. However, the end-product of the project will not be a commercial product. If the end-product performs well and if there is a demand the team will investigate commercialization for a future project.

2.1.10 Possible Risks and Risk Management

Multiple risks are associated with the design of this project. The following is an assessment of potential risks the team may encounter and the proposed solution(s) to keep the project on track with the time allotted.

2.1.10.1 Risk: Teradyne J750 cannot communicate with the TI wireless LAN chip Management: Due to technical reasons if the team is not able to establish a communication link between the Teradyne J750 and the TI wireless LAN chip it will use Bernard Lwakabamba’s

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technical advice to re-design the board to accomplish full functionality.

2.1.10.2 Risk: TI wireless LAN chip cannot communicate with the DUT Management: Due to technical reasons if the team is not able to establish a communication link between the TI wireless LAN chip and the DUT it will have to use the help of experts in wireless communications to debug the problem. (Advisor or graduate students).

2.1.10.3 Risk: Procedure to check transmitted signal from DUT with the Teradyne J750 may fail. It is unknown if the J750 has the capability to test a wireless device. Management: If the selected procedure to make the J750 remotely test a DUT is unable to receive a signal from the DUT the team will retrace the subtasks 3g – j to create a new process and try again. It is unknown if the J750 can perform this task, therefore it may be necessary to try multiple solutions.

2.1.10.4 Risk: Unknown hardware capabilities of TI wireless LAN chip, Teradyne and the DUT will make it difficult to test them all at once. Management: Since the team has to develop 3 new hardware systems it will research and test each system separately with a know I/O access point to document possible system glitches or problems.

2.1.10.5 Risk: The project could lose a team member Management: To incorporate the possibility of a lost teammate, time allotments for project milestones have been “padded” to include time for a new group member to catch up whilst the other group members continue their respective tasks. To minimize this impact, logs are to be kept to trace individual achievement and all progress is to be fully documented. Members of the team are also working with the understanding that this will result in increased individual efforts to maintain deadlines.

2.1.10.6 Risk: The team could lose data or documentation Management: To reduce the risk of the loss of data, pertinent project information will be stored on shared drives and backed up on removable storage devices where available. Hard disk and hard copies are also encouraged. Should loss of data occur, members of the team are prepared to increase their efforts to maintain the project’s schedule.

2.1.10.7 Risk: Project fails to meet client expectations Management: In order to reduce the risk of not meeting the client’s expectations, regular meetings have been set with the client to ensure that expectations are clearly laid out. It is an expectation of the team that each individual team member works through the earlier documentation of the Teradyne and become fully familiarized with the project within the next few months.

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This will allow extra time in the second semester to more accurately meet the client’s requests.

2.1.10.8 Risk: Limited subject resources & learning difficulties Management: In order to meet the project deadline, extra time was given within the project time allotments for learning the complex systems involved with this project. Each team member is to familiarize him/herself with the project and use his/her background to supplement the other team members’ understanding of the project. Finally, each team member is expected to become familiar with the Teradyne system within the next few months.

2.1.11 Proposed Project Milestones and Evaluation Criteria

Project success for the project will be based on the ability to meet project goals and milestones. The team’s ability to meet these goals will be evaluated on the following criteria. Each milestone will receive a score based on how well the team satisfied the criteria for that milestone. A rationale for the resultant scores is provided in Table 1 below.

Table 1: Milestone Completion Scoring Rationale

Progress Numerical Score (%)

Greatly Exceeded Criteria 100

Exceeded Criteria 100

Met Criteria 100

Almost Met Criteria 90

Partially Met Criteria 80

Did Not Meet Criteria 35

Did Not Attempt 0

When the project is completed each milestone will be evaluated and a final score

will be figured based on the weight or importance of each milestone. A successful project would achieve a score of no less than 85%.

2.1.11.1 Milestone: Definition of Project Description: The project must be adequately defined such that the team shares a clear and uniform vision of project direction. A good project definition will aid the team to work together toward a specific goal. Evaluated By: Client and faculty advisors Evaluation Criteria: Evaluators will weigh the project definition with their expectations for the scope of the project and assign a score from the table above. Weight: 15%

2.1.11.2 Milestone: Technology Selection and Usage Description: A large portion of this project will rely on the appropriate selection of technology. Wireless chip selection,

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PCB design and Teradyne usage are all integral parts to the successful completion of this project. Evaluated By: Team members Evaluation Criteria: Efficiency is the key criteria. For technology selection and/or purchase, the value of the item should be considered. Code selection should also be evaluated. Weight: 10%

2.1.11.3 Milestone: End-Product Design Description: End-product design should explicitly cover all aspects of the end-product including the interface designs, component specifications and coding functions. Evaluated By: Team members and faculty advisors Evaluation Criteria: The evaluators will select a score based on how well the design satisfies the project’s requirements and the design’s ability to be easily implemented. Weight: 15%

2.1.11.4 Milestone: End-Product Implementation Description: End-product design’s implementation Evaluated By: Team members and faculty advisors Evaluation Criteria: How well the end-product design was implemented should be key criteria. Speed, efficiency and accuracy should be evaluated. Weight: 10%

2.1.11.5 Milestone: End-Product Testing Description: Comprehensive prototype testing is the key to a successful product. Evaluated By: Team members Evaluation Criteria: Tests should be conducted efficiently and should represent as many possible real-world outcomes as it can. Evaluation criteria should be based on how well this was done. Weight: 15%

2.1.11.6 Milestone: End-Product Documentation Description: Manual for wireless testing/device interface Evaluated By: Faculty advisors Evaluation Criteria: How well does the manual: cover the scope of the project, fit with the preceding manual (cookbook), and meet the needs of the client. Weight: 10%

2.1.11.7 Milestone: End-Product Demonstration Description: End-product and documentation are presented to an Industrial Review Panel Evaluated By: Faculty advisor and industrial review panel Evaluation Criteria: How well the end-product met the scope of the project and the team’s apparent knowledge of the project. Weight: 10%

2.1.11.8 Milestone: Project Reporting

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Description: This is a conglomeration of all reporting documents completed throughout the scope of the project including, but not limited to: project plan, poster, weekly reports, Logs, website and the final report. Evaluated By: Faculty advisors Evaluation Criteria: Project reporting should be evaluated on quality, direction and relation to the project, professionalism, and readability. Weight: 15%

Each milestone will be evaluated using the rationale in Table 1, and the weight of

each milestone will be as seen in Table 2. Using these criterion, the team can assess the success of the project.

Table 2: Final Project Evaluation Breakdown

Milestone Evaluator Weight (%)

Definition of Project Client, Faculty Advisor 15

Technology Selection and Usage Team Members 10

End-Product Design Team Members, Faculty Advisor 15

End-Product Implementation Team Members, Faculty Advisor 10

End-Product Testing Team Members 15

End-Product Documentation Faculty Advisor 10

End-Product Demonstration Faculty Advisor, Industrial Panel 10

Project Reporting Faculty Advisor 15

Total 100

2.1.12 Project Tracking Procedures

Project tracking will be an integral part of the success of this project. In order to establish a rough timeline, a Gantt chart was created using Microsoft Project. The Gantt chart will serve as a guideline for all deadlines and milestones. The team will continually update the chart as the project progresses to reflect what the team has or has not yet accomplished. The team will then use the updated charts to decide where to focus its efforts to make accomplishing the deadlines easier.

Detailed records of expenditures, both monetary and non-monetary will be kept to aid in the final report and subsequent weekly reports. Should a risk come out negatively, the team will use these records to re-evaluate the teams’ efforts and direct support where it is needed to meet deadlines.

2.2 Statement of Work

The statement of work defines what the specific tasks to complete the project are, how the project activities will be conducted, and what the expected results are.

Task No. 1: Problem Definition Task Objective: To define every aspect of the project by completing the subtasks below.

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Task Approach: The team will discuss each of the subtasks listed below with the advisors, and use each to contribute to the definition of the project. When every aspect of the project has been considered, team members will discuss the desired solution of the project with the advisors. When all members understand the problem and desired solution, they will move on to choosing a technology and considering implementation. Task Expected Results: The team will develop a full understanding of the project and use it to update our Gantt chart, limitations and assumptions and any other aspects of the project plan that change.

Subtask No. 1a: Problem Definition Task Objective: Understand the problem including the history, technical challenges and details. Task Approach: The team will meet with the advisors and discuss the problem in detail. They will cover the historical need for a wireless tester and what problems are associated with using the J750 to test a wireless LAN. Task Expected Results: Every member of the team will understand what the problem is and why it exists. Subtask No. 1b: Identify desired solution Task Objective: Understand what the expected and ideal end results of the project are. Task Approach: The team will discuss with the advisors what result they would like the project to have. This will then be used later in the process to generate possible paths to the desired solution. Task Expected Results: Team understands the desired final form of the project. Subtask No. 1c: Intended Users and Uses Task Objective: To understand who the intended users and what the intended uses of the project are. Task Approach: The team will meet with the advisors and department faculty to understand what their expectations are of this project. Task Expected Results: Each member will be clear on the intended uses and users of the project.

Subtask No. 1d: Constraint Identification Task Objective: Investigate J750 and TI wireless chip I/O capabilities to identify any possible project constraints. Task Approach: The team shall spend time understanding the I/O capabilities of the Teradyne J750 through the reference manual that was developed by a Senior Design team in spring, 2004. The team has been given access to the Teradyne lab to run a few initial tests on D-flip flops to gain more experience with the I/O capabilities of the Teradyne. The team will also study the datasheets provided by TI to understand the I/O capabilities on the LAN chip. Task Expected Results: Each member of the team would have had experience using the Teradyne J750 and understand the I/O capabilities both on software and hardware.

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Task No. 2: Technology and implementation considerations and selection Task Objective: To choose a TI chip set, choose a DUT and choose a pre-made DIB, or create a DIB if needed. Task Approach: For the TI chip set and DUT we will identify possible candidates, develop criteria to pick the winning candidate and evaluate the candidates based on the criteria. The team will present its options, criteria and decisions to its advisor for approval as well. For the DIB, the team must investigate the DIBs that ISU already owns, and determine if one will fit the project needs. If not, a DIB will be designed. Task Expected Results: The team will choose a TI chip set, DUT and DIB that will suit the needs of the project.

Subtask No. 2a: Identify TI chip sets Task Objective: To identify all possible candidate TI chip sets from the numerous TI chip sets available. Task Approach: The team will have to invest time researching the TI chip sets available that meet the basic requirements for the project. The team will search online, through vendors such as Digikey and consult with graduate students (Bernard Lwakabamba, in particular has experience in this area) and the advisors about TI chip sets they have used and would recommend. Task Expected Results: Team will identify all possible candidate chip sets. Subtask No. 2b: Develop criteria to evaluate TI chip sets Task Objective: The team will develop criteria to evaluate the TI chip sets based on the uses that the chip sets will need to fill during project testing. Task Approach: The team must look through the schedule of development, implementation and testing to understand what the TI chips will need to do. Then through consultation with its advisor it will develop the criteria to evaluate the chip sets. Task Expected Results: Criteria to evaluate TI chip sets Subtask No. 2c: Evaluate and purchase TI chip set Task Objective: The team must evaluate the TI chips identified based on the criteria. Task Approach: The team will organize the criteria and evaluate the chips sets to determine the best solution for the project. Again, the team will consult with its advisor. Task Expected Results: A winning TI chip set will be identified and purchased. Subtask No. 2d: Choose or create DIB Task Objective: To choose a DIB that will allow Teradyne J750 to interface with TI chip set or develop a DIB to make the interface. Task Approach: ISU owns many DIBs for the Teradyne tester. The group must investigate which, if any board will fit the TI chip set chosen (This may also be a

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factor in choosing a TI chip set). If no suitable DIB can be found, the team must create a suitable DIB to make the interface between the Teradyne J750 and the TI chip set. Task Expected Results: A suitable DIB will be chosen or created to allow the interface between the Teradyne J750 and the TI chip set. Subtask No. 2e: Identify possible DUTs Task Objective: To identify all possible candidate DUTs from the large number of DUTs available. Task Approach: There are a countless number of available wireless LAN products, and many could potentially be a DUT. So, to narrow the field through which the team must search, we will impose a few simple constraints: DUT must have digital I/O, DUT must communicate on same frequency as TI chip set chosen, DUT must be able to interface with PC for testing purposes. Task Expected Results: A list of possible DUTs will be created. Subtask No. 2f: Develop criteria to evaluate DUTs Task Objective: To develop criteria to evaluate each DUT according to its required operation. Task Approach: The team must consider the uses of the DUT during testing in order to asses the required functionality of the DUT. Then the team must create criteria based on the required functionality. The team should consult with its advisor to gain input on DUT functionality and evaluation criteria. Task Expected Results: The team will develop evaluation criteria.

Subtask No. 2g: Evaluate and purchase DUT Task Objective: To evaluate DUTs based on criteria, and purchase the best DUT. Task Approach: The team will evaluate the possible DUTs based on the criteria developed. It should consult with its advisor on the final decision. When the best DUT is chosen, it will be purchased. Task Expected Results: The team will purchase the best DUT for the project.

Task No. 3: End-product design Task Objective: To research then design a solution for each stage of the project Task Approach: The team will design solutions to interface the Teradyne J750 with the TI chip, use the send and receive capabilities of the TI chip, use the send and receive capabilities of the DUT, then investigate ways to allow the Teradyne J750 to send a signal to the DUT and check the reply at the appropriate time. When the best way to achieve the send and receive from the Teradyne to the DUT is determined, the solution will be designed. Throughout the process the team will consult with its advisor for direction. Task Expected Results: The team will design an interface for the TI chip and design solutions to use the DUT and TI chips send and receive capabilities. If it is possible to use the J750 to test the output of the DUT, this solution will also be implemented.

Subtask No. 3a: Research interface and interface software

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Task Objective: To identify interface requirements between Teradyne J750 and TI chip and learn interface software (IG-XL) Task Approach: The team will gain experience working on the Teradyne in the initial stages of the project. Through this each team member will get the opportunity to individually work on the tester and study the interface software. Task Expected Results: Each member of the team is required to understand the interface. Particularly, Dan and Kyle will be concentrating on the software side awhile Adnan and Nathan will concentrate on the hardware interface.

Subtask No. 3b: J750 and TI Chip Interface Task Objective: To develop interface between Teradyne J750 and TI chip Task Approach: Based upon the research into the I/O capabilities of the J750 and the TI chip the team will design an interface between the two. Using the knowledge gained from researching interface software (IG-XL) the team will design the interface. Task Expected Results: The team will design an interface between the J750 and the TI chip Subtask No. 3c: Research IG-XL to communicate with TI chip Task Objective: To research how to create a program in IG-XL to send and receive signals using the TI chip. Task Approach: The team has a reference manual from a previous senior design team that explains how to create a program in IG-XL. It will use the reference manual to design an interface between the J750 and the TI chip. Task Expected Results: The team will understand the TI chip enough to design a solution to use its I/O capabilities. Subtask No. 3d: Design solution for I/O of TI chip Task Objective: To design a setup using IG-XL and a known test point to send and receive signals using the TI chip. Task Approach: The team has researched the I/O of the TI chip. Now it will design a test to use the I/O capabilities. It must choose a known send and receive point (for example a wireless access point) so that the only unknown in the design is the TI chip. Task Expected Results: The team will design a solution to test the I/O of the TI chip Subtask No. 3e: Research I/O of DUT Task Objective: To investigate I/O of DUT in order to send and receive signals Task Approach: The team must make sure that the DUT can send and receive before attempting to interface it with the TI chip. So the team must research the I/O of the DUT in order to design a test to interface it with a known access point. Task Expected Results: The team will understand the I/O of the DUT Subtask No. 3f: Design solution to use I/O of DUT Task Objective: To design a solution to use send and receive capabilities of DUT

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Task Approach: The team has researched the I/O capabilities of the DUT, now it must use its knowledge to design a solution to test the I/O of the DUT. The design should interface the DUT with a known access point to ensure that the DUT is the only unknown Task Expected Results: The team will create a design to test the I/O of the DUT

Subtask No. 3g: Research J750 capability to test DUT reply Task Objective: To investigate feasibility of making Teradyne J750 check receive pins of TI chip when signal is returned from DUT Task Approach: By this time, the team is familiar with the TI chip, DUT and J750. The unknown problem facing the project is to make the J750 check the receive pins of the TI chip at the correct time (when the DUT sends back a reply). The team will investigate the feasibility of calculating the delay in the response, or some other way to make the J750 check the reply at the proper time. Task Expected Results: It’s difficult to predict the outcome of unknown research. However, the team expects to gain knowledge about how to calculate the delay of the DUT and how to make the J750 check and output at a desired time. Subtask No. 3h: Generate methods to test DUT Task Objective: To identify methods to allow Teradyne J750 to check receive pins of the TI chip when a signal is returned from the DUT Task Approach: The team will use the knowledge gained from researching the J750 capability to test the DUT reply to generate methods to test the DUT reply. The team must generate multiple solutions and should consult with its advisor and other experts on the J750. If needed, the team should consult with Teradyne representatives as well. Task Expected Results: It is unknown if the J750 can check the reply from the DUT at the correct time. Still, the team expects to formulate possible methods to make the J750 check the reply at the proper time. Subtask No. 3i: Criteria to evaluate DUT reply check methods Task Objective: To develop criteria to evaluate methods that allow the Teradyne J750 to check the receive pins of the TI chip when a signal is returned from the DUT. Task Approach: Multiple methods are possible to check the reply from the DUT, the team must determine criteria to evaluate the methods, so that time is spent on the most probably methods to succeed. To determine this, the team will consult with its advisor and draw on its past experience with the test equipment. Task Expected Results: Team will create criteria to evaluate methods of testing DUT reply. Subtask No. 3j: Evaluate method for J750 to check reply of DUT and design Task Objective: To choose method and develop a design to allow Teradyne J750 to check input pins of TI chip when signal is returned from DUT.

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Task Approach: By this time, the team will have researched, identified and created criteria for different methods to check the DUT reply using the J750. Now the team will evaluate the methods using the criteria created and design a solution based on the best method. Task Expected Results: The team will have a possible method to receive information from the DUT.

Task No. 4: End-product prototype implementation Task Objective: To implement the end-product from the design plans Task Approach: The team will use the design plans to implement the necessary solutions. These include implementing the design for an interface between the TI chip and the Teradyne J750, using the I/O of the DUT and TI chip, and implementing a solution to allow the J750 to check the DUT reply. Task Expected Results: The team will develop and implement all the design steps necessary to realize the finished product.

Subtask No. 4a: Implement TI chip and J750 interface Task Objective: To implement interface between TI chip and Teradyne J750. Task Approach: The team researched and designed the interface. Now the team must implement the interface. The team will use its knowledge gained learning IG-XL, and the reference manual for the J750 to facilitate the implementation. Task Expected Results: The team will implement the interface. Subtask No. 4b: Implement solution to use TI chip I/O Task Objective: To implement solution to use send and receive capabilities of TI chip. Task Approach: The team will use the researched and designed solution to use the I/O on the TI chip. The knowledge gained researching the chip and advice from the team’s advisor will be used to develop the interface. Task Expected Results: The team will implement the solution.

Subtask No. 4c: Implement solution to use DUT I/O Task Objective: To implement solution to use send and receive signals of DUT. Task Approach: The team will use the researched and designed solution to implement the solution to use the I/O on the DUT. The team will have researched the DUT I/O and can use the knowledge gained to create the implementation. Task Expected Results: The team will implement the solution.

Subtask No. 4d: Implement solution for J750 to receive signal from DUT Task Objective: To implement a solution that allows Teradyne J750 to check receive pins of TI chip when signal is returned from DUT. Task Approach: The team will have researched, brainstormed and chosen the best design. It will use the expertise it has gained on the J750 and advice from its advisor to implement the selected solution. The team may also turn to Teradyne if more help is needed to implement the solution. Task Expected Results: The team will implement the solution.

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Task No. 5: End-product testing Task Objective: To design a test and execute a test for each of the solutions implemented. Task Approach: It is imperative that the solutions implemented are tested to check that they function properly. To do this, the team will design a test for each implementation, then execute the test and observe the results. When an implementation fails, some redesign will be necessary, then the test design and test execution will be redone. Task Expected Results: The team will test, and if necessary retest each stage of the project to ensure complete functionality.

Subtask No. 5a: Create test to check interface between J750 and TI chip Task Objective: To plan and develop test to test interface between Teradyne J750 and TI chip Task Approach: The reference manual written by a previous senior design team should be used to learn how past groups have tested interfaces. Then the group will create a test design so that they can observer a verifiable output that the test was a success. Task Expected Results: The team will generate a test design

Subtask No. 5b: Test interface of J750 and TI chip Task Objective: To test interface between Teradyne J750 and TI chip Task Approach: The team will execute the previously designed test. They can evaluate the success of the test based on the output, and if help is needed implementing the test they will use the reference manual on the J750. Task Expected Results: Team will execute test. If passed, team will move on. If test failed, team will redesign and retest the solution.

Subtask No. 5c: Create test to check I/O of TI chip Task Objective: To plan and develop test to check send and receive capabilities of Teradyne J750 through TI chip Task Approach: The team can use the reference manual for the TI chip to understand what normal I/O is, and design the test with that in mind. The team should use a known send receive to interface the TI chip with, so that the TI chip is the only unknown in the test. Task Expected Results: The team will generate a test design

Subtask No. 5d: Execute test of TI chip I/O Task Objective: To test send and receive capabilities of Teradyne J750 through TI chip Task Approach: The team will use the previously designed test to execute the test of the TI chip I/O. The team will run the test more than once to ensure a strong connection to the TI chip. Task Expected Results: Team will execute test. If passed, team will move on. If test failed, team will redesign and retest the solution.

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Subtask No. 5e: Create test to check I/O of DUT Task Objective: To plan and develop test to test send and receive capabilities of DUT Task Approach: The team can use the reference manual for the DUT to understand what normal I/O is. It should also use a known send/receive point (a wireless access point, for example) to ensure that the DUT is the only unknown in the system. Also, the team will investigate the DUT reference manual for a way to view signals on the output pins of the DUT. Task Expected Results: The team will generate a test design

Subtask No. 5f: Execute test of DUT I/O Task Objective: To test send and receive capabilities of DUT Task Approach: The team will use the previously designed test to execute the test of the DUT. The team should run multiple tests to ensure a good connection. Task Expected Results: Team will execute test. If passed, team will move on. If test failed, team will redesign and retest the solution.

Subtask No. 5g: Create test to check J750 ability to receive from DUT Task Objective: To plan and develop test to send a signal from J750 through TI chip, receive at DUT and send back to J750 so that J750 checks the output of the TI chip at the proper moment Task Approach: This test is critical as it is unknown if the J750 can be used to receive information wirelessly from the DUT. The group should investigate where communication could break down between the DUT and the J750 and create ways to monitor each possible breakdown point. This will facilitate in debugging and testing. Task Expected Results: The team will generate a test design

Subtask No. 5h: Execute test of J750s ability to receive from DUT Task Objective: To perform test to send a signal from J750 through TI chip, receive at DUT and send back to J750 so that J750 checks the output of the TI chip at the proper moment Task Approach: The team will execute the previously designed test. It will check each possible breakdown point to ensure that the signal the J750 receives is correct, or if it is not correct where the system failed and why. Task Expected Results: Team will execute test. If passed, team will move on. If test failed, team will redesign and retest the solution.

Task No. 6: End-product documentation Task Objective: To create documentation that will preserve and pass on knowledge gained from the project. Task Approach: If the project was a success, the group will document how to test a wireless device using the J750 by creating a reference manual. If the project was

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unsuccessful in establishing a link, the group will document why the test failed and what was learned. Task Expected Results: Documentation will be created, whether or not the project is a success.

Subtask No. 6b: Create reference manual Task Objective: If test of J750 to DUT is successful, develop end-user documentation – a reference manual explaining how to test a wireless device with the J750. Task Approach: The group must first plan the document so that it is targeted at the intended audience and includes all of the necessary information. The group should outline the document and Task Expected Results: The team will create a reference manual for all future users to set up a wireless test using the J750. Subtask No. 6c: Create failure analysis Task Objective: If test of J750 to DUT is unsuccessful, develop documentation explaining why the test failed, which will be passed on to advisors and Teradyne. Task Approach: Document failed tests and reason for failed tests Task Expected Results: The team will create a document analyzing why the Teradyne failed to test a remote wireless chip and give the documentation to its advisor and Teradyne.

Task No. 7: End-product demonstration Task Objective: To demonstrate the completed project to the faculty advisors, clients and industrial review board. Task Approach: The team will plan the presentation using guidelines laid out in the class handbook, and create a presentation discussing the design problem, the design solution and the completed project. Task Expected Results: The completed project will meet or exceed the expectations of the reviewers.

Subtask No. 7a: Demonstration Planning Task Objective: To plan the demonstration for the faculty advisors, clients and industrial board. Task Approach: The team will use the class handbook to prepare a Power Point presentation that will keep the interest of our reviewers. The structure of – tell them what you’re going to tell them, tell them, tell them what you just told them should be used along with other presentation tips. Task Expected Results: Complete a custom tailored presentation for clients and industrial review board. Subtask No. 7b: Faculty Advisors demonstration Task Objective: To demonstrate the project to the faculty advisors with possible limitations and assumptions.

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Task Approach: Customize the demonstration to meet the faculty advisors needs. Present possible limitations and assumptions and other items outlined in course manual. Task Expected Results: To successfully demonstrate the project with its limitations. Also get more feedback for revisions on demonstration for client and industrial board. Subtask No. 7c: Client demonstration Task Objective: To present the completed project to the client Task Approach: The demonstration will be customized to the clients needs and modified from Faculty advisors suggestions. Task Expected Results: The completed project will exceed client’s expectations and will lead into further commercialization opportunities Subtask No. 7d: Industrial Review demonstration Task Objective: To present the completed project to the industrial review board. Task Approach: Demonstrate the project to the industrial review board with revisions made from faculty advisor’s feedback. Task Expected Results: The team will receive feedback for future business presentations.

Task No. 8: Project Reporting Task Objective: To effectively monitor project progress while giving the project clear direction Task Approach: Reporting shall begin with the project plan and project poster, continue with weekly project progress emails and finish with the end-product design and final project reports. Task Expected Results: The team will finish the project within the project constraints detailed in the initial project reports.

Subtask No. 8a: Project plan development Task Objective: To define the project purpose, approach, anticipated results and any other information pertinent to the project Task Approach: The team met to discuss the project direction. The results of these meetings were documented to form this report. Task Expected Results: A formal document detailing all foreseeable aspects of the project.

Subtask No. 8b: Project poster development Task Objective: To develop a poster to summarize the project in a given amount of space and to develop an efficient communication of the project scope Task Approach: The team will develop content and visuals and poster layout from the ground up. It will use the poster suggestions discussed in class and the course handbook to create the poster.

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Task Expected Results: The team will develop a poster summarizing the project that is both informative and aesthetically pleasing. Subtask No. 8c: End-product design report development Task Objective: To produce a report that documents the proposed end-product design in extensive detail Task Approach: The team will specify the intricate details of the end-product including schematics for any additional interface board, coding structure, direction and methods as well as detailed assembly instructions. Task Expected Results: A highly detailed end-product design capable of being implemented by multiple persons. Subtask No. 8d: Project final-report development Task Objective: To produce a report that will summarize the project Task Approach: At the conclusion of the project, the team will edit and expand upon the preceding documents to produce a final report that will contain an executive summary, approach and any lessons the team may have learned in development. Task Expected Results: An end-report that reflects the team’s efforts as well as the end-product itself. Subtask No. 8e: Weekly email correspondence Task Objective: To inform the project faculty advisor, client and the course instructor of recent project developments and overall progress Task Approach: Rotating tri-weekly, one team member each week will write a report for the preceding week detailing the project status, goals for the next week, and project costs to date, effort, and any existing problems. Task Expected Results: Anyone directly tied to the project will receive a full and detailed report of the current project efforts and anyone with an interest in the project will have web access to the report.

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3. Estimated Resources and Schedules

3.1 Personnel Effort Requirements

The total number of hours spent on each task will be as in Table 1. These are calculated based on the teams’ estimates of hours to be spent on each subtask throughout the semester along with other unforeseen time commitments. As seen below, these are broken down into problem definition, technology considerations and selection, end-product design, end-product prototype implementation, end-product testing, end-product documentation, end-product demonstration, and project reporting.

The problem definition has been greatly facilitated by the project plan, so the time allotted to finish it is minimal. Technology considerations will need to be researched, criteria determined and products evaluated. The end-product design will take a large portion of the time. Nathan and Adnan, the Electrical Engineers, will take a heavier role in this area due to the fact that it involves more circuitry and piecing together of components. The whole team will take an active part in both the implementation and the end-product testing however Dan and Kyle will spend a little bit more time coding as they are computer engineers. Kyle will also be the webmaster which will give him a higher role in the documentation aspect of the project.

Table 3: Estimated Personal efforts

Personnel

Pro

ble

m

Def

init

ion

Tec

hn

olo

gy

C

on

sid

era

tio

ns

an

d S

elec

tio

n

En

d-P

rod

uct

D

esig

n

En

d-P

rod

uct

P

roto

typ

e Im

ple

men

tati

on

En

d-P

rod

uct

T

esti

ng

En

d-P

rod

uct

D

ocu

men

tati

on

En

d-P

rod

uct

D

emo

nst

rati

on

Pro

ject

R

epo

rtin

g

Est

. T

ota

l

Nathan Gibbs

10 hrs

15 hrs

60 hrs

40 hrs

53 hrs

18 hrs

15 hrs

12 hrs

223 hrs

Dan Holmes

10 hrs

15 hrs

45 hrs

60 hrs

55 hrs

20 hrs

10 hrs

12 hrs

227 hrs

Adnan Kapadia

10 hrs

15 hrs

60 hrs

40 hrs

56 hrs

20 hrs

10 hrs

12 hrs

223 hrs

Kyle Peters

10 hrs

15 hrs

45 hrs

50 hrs

58 hrs

21 hrs

20 hrs

10 hrs

229 hrs

Total 40

hrs

60

hrs

210

hrs

190

hrs

222

hrs

79

hrs

55

hrs

46

hrs

902

hrs

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3.2 Other Resource Requirements

The teams other resource requirements will be fairly limited. The Teradyne tester is already donated to the Iowa State Campus and is available for us to use, without charge. The team will need to print its project poster and purchase the TI wireless LAN chip and DUT. A summary of these resources required is presented in table 4 below.

Table 4: Estimated additional resources

Item Team hours Other hours Cost

Printing of project poster 12 hrs 0 hrs $65.00

Teradyne Integra J750 Test System 0 hrs 0 hrs Donated

TI wireless LAN Chip (x1) 0 hrs 0 hrs $20.00

DUT 0 hrs 0 hrs $20.00

Total 12 hrs 0 hrs 105.00

3.3 Financial Requirements

The cost for the project can be viewed in Table 5 below. The calculation assumes that all team members hourly wage is 11.00 dollars per hour.

Table 5: Estimated Project costs

Item W/O Labor With Labor

Parts and Materials:

a. Printing of project poster $65.00 $65.00

b. Teradyne Integra J750 Test System Donated Donated

c. TI wireless LAN Chip (x2) $30.00 $30.00

Subtotal 95.00 $95.00

Labor at $11.00 per hour:

a. Nathan Gibbs $2,343.00

b. Dan Holmes $2,387.00

c. Adnan Kapadia $2,343.00

d. Kyle Peters $2,409.00

Subtotal $9,482.00

Total $95.00 $9,577.00

3.4 Project Schedule

The figures below are a Gantt charts representing the expected project schedule. The tasks and sub-tasks defined in the statement of work are represented. The schedule has built in a week of slack so if a task takes longer than expected, the team can still complete the project on time.

• Figure 5 is a Gantt chart of the tasks problem definition, technology implementation and end-product design.

• Figure 6 is a Gantt chart of the tasks end-product implementation, end-product design, end-product documentation and end-product demonstration.

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• Figure 7 is a Gantt chart of Project Reporting and Project Deliverables.

Figure 5: Gantt chart – part 1

Figure 6: Gantt chart – part 2

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Figure 7: Gantt chart – part 3

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4. Closure Materials

This section provides the client, faculty advisor and team member’s information and the closing summary.

4.1 Project Team Information

4.1.1 Client Information

Department of Electrical and Computer Engineering College of Engineering Iowa State University 2215 Coover Hall Ames, IA 50011

4.1.2 Faculty Advisor Information

Dr. Robert J Weber 301 Durham Ames, IA 50011 Office: (515) 294-8723 Fax: 515-294-1152 weber@iastate.edu

4.1.3 Team Members’ Information

The contact information for the members of the project team is below in table 6.

Table 6: Team member information

Nathan Gibbs 3279 Birch Stevenson Ames, IA 50013 (515) 572-3568 gibby711@iastate.edu

Adnan Kapadia 126 Beedle Dr. Apt. 206 Ames, IA 50014 (515) 451-4786 adnank@iastate.edu

Dan Holmes 113 State Ave. Ames, IA 50014 (515) 451-7215 choper@iastate.edu

Kyle Peters 4533 Steinbeck #4 Ames, IA 50014 (515) 292-0646 kylep@iastate.edu

4.2 Closing Summary

Wireless devices are ubiquitous in society, and every new wireless device must have its RF capabilities tested. The ISU ECpE department would like to use the Teradyne J750 tester to test wireless devices. This project will deliver a solid feasibility study into testing wireless systems using the Teradyne J750 digital circuit tester. The results of this study may deliver a digital wireless system capable of testing RF components and will serve as a supplement to the current capabilities of the J750. Faculty members and students alike will be able to use this system for further research and development for wireless testing.

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4.3 References

• Senior Design Team Spring 2004, “Teradyne J750 Tester Cookbook.”, February 2004.

• Teradyne, “Teradyne J750 software manual”, 2003.

• SearchNetworking.com, Radio frequency definitions, September 14th, 2004 <http://searchnetworking.techtarget.com/sDefinition/0%2C%2Csid7_gci214263%2C00.html>.

• Texas Instruments, TRF6901, September 14th, 2004 <www.ti.com.>

• Teradyne, Teradyne J750, September 14th, 2004 <www.teradyne.com>