Developing fast clock source with deterministic jitter

Midterm review

Yulia Okunev Supervisor -Yossi HipshHS-DSL Laboratory, Dept. of Electrical EngineeringTechnion Israel Institute of Technology

20.05.201412Background

In this project I designed fast clock source with deterministic jitter for high speed phenomena experiment.Jitter [1] is the deviation of a periodic signal, in this case, clock source, from its ideal period. Or in other words the period frequency displacement of the signal from its ideal location.System overview:Pulse generator is used to produce electrical input signal.This clock signal will be divided to 8 channels.Each signal passes through delays array and combined in the output.Using Scope we can measure the system output. Project Top Block diagram

3

Built-In-TestSolution algorithm

4Passive delays array:We created different length transmission lines which causes the signal to delay respectively to the line length.The lines will be printed on the top layer of the PCB (microstrip)

Passive clock divider/combiner:We created divider (combiner) for the clock signal using resistor divider (combiner)

Theory and calculations

56Transmission lines Parameters

8 high speed lines impedance 50, on top layer microstrip lines. The delay delta between each two lines is approximately 725psec

To create between each two transmission lines the required is: 0.12mWe chose to be smaller than the input signal period.This way the input signal contains the divided signal in one period as shown:

7Transmission lines Parameters-cont..

We can control by choosing different We can reduce the propagation time in each line by reducing its length

We can increase the propagation time in each line by increasing its length

8Schematic

Passive delays arrayPassive clock dividerPassive clock combinerJunction modelPassive clock dividerPassive clock combinerIs a mirror image ofJunction model9Passive delays array

Transmission lines Parameters:Transmission lines length to create equal between each two signals (ideal clock) are : 0.12m, 0.24m, 0.36m, 0.48m,0.60m ,0.72m, 0.84m, 0.96mIn order to create Jitter, we will use non ideal values for lines length :

Transmission lines length to create jitter are:0.12m, 0.22m, 0.38m, 0.48m,0.60m ,0.70m, 0.84m, 0.95m

Input signalIdeal outputJitter in output10Junction model

In simplified way we can think the junction is just a connection between 3 resistors. But each line should be modeled as a transmission lineThe calculation is as follow:

10

11Junction Schematic-Zoom in

Simulation

1213SimulationInput signal to output signal

Input signal data:T=30 nsecRise time=150 psecFall time=150 psecTime the signal is high =50 psecAmplitude=926.87mV

Output signal data:Amplitude=15.11mV

Attenuation between Input signal and Output signal: 35.7dBThis is sufficient for our needs

14SimulationOutput signal to undesired output signal

Zoom in on the output

Minimal signal amplitude: 11.67mV

Maximal noise amplitude: 4.04mV

Attenuation between Output signal and undesired signal: 9.2dBThis is sufficient for our needs

15Simulationoutput signal

Transmission lines length to create equal between each two signals: 0.12m, 0.24m, 0.36m, 0.48m,0.60m 0.72m, 0.84m, 0.96m

Zoom in on the output

Maximal signal amplitude: 13.022mVMinimal noise amplitude: 11.283mV

Delta: 1.25dBThis is sufficient for our needs

16Simulationoutput signal

Transmission lines length to create jitter:0.12m, 0.22m, 0.38m, 0.48m, 0.60m ,0.70m, 0.84m, 0.95m

As we can see from the simulation larger between two lines causes larger and vice versa

Maximal signal amplitude: 13.022mVMinimal noise amplitude: 9.522mV

Delta: 2.72dBThis is sufficient for our needs

Schematic

1718Schematic

Board stuck-up and Junction Layout

1920Stuck-up

21Transmission line calculations

22Components

Resistors:Value: 16.7, 50 ohm. Size: 0603Power consumption: 0.125W (maximal power in circuit: )

Connectors: BNC

Project Gantt

23StatusWeek

Examination and purchase of the required componentsDone4Examine the performance of the chosen power splitter\combinerDone4Examine the physical ability to integrate this component in a printed circuit.Done5Getting price and delivery time suggestionDone5Examination of the scope measuring capability to determine whether we need microwave amplifierDone6Preliminary high level design : Examination of the required support components such as: amplifiers (if needed), connectors, build-in test components etc.Project Gantt

24Week

System design, manufacture and verificationDone7Noise considerations (and SNR) in the systemDone8-9Simulation using Sig-Explorer. (Examination of system performance)10-11Built-In-Test and PCB design

12Final PCB review before manufacture

--Once boards will be manufactured-visual inspection and electrical examination Junction modelFurther details

2526Junction model

In simplified way we can think the junction is just a connection between 3 resistors. But each line should be modeled as a transmission lineThe calculation is as follow:

2627Impedance calculation

In order to have 66.7 impedance we need the line width to be 22MIL

In order to enter to the junction with thin line we will narrow the line close to the junction and expand the line further away from the junction to fit horizontally to a 0603 resistor.

2728Impedance calculation-cont..

22.5-7.5=15 mil22.5+7.5=30 mil24 mil29Junction layout

12 mil30Summary Junction model

31Reference

[1] http://www.antelopeaudio.com/

[2] http://il.farnell.com/

32Thank youYulia Okunev