DESl-LCA2 workshop - PMU presentation.pptx

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Advanced Phasor Measurement Units for the Real-Time Monitoring of Transmission and Distribution Networks

Paolo Romano

Distributed Electrical Systems LaboratoryÉcole Polytechnique Fédérale de Lausanne - EPFL

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Outline

Introduction PMU requirements Proposed synchrophasor estimation algorithm Algorithm implementation Experimental validation Conclusion

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Introduction (1)Power networks new paradigms

Evolution of distribution networks passive active

major changes in their operational procedures; need of advanced and smarter tools to manage the increasing

complexity of the grid; main involved aspect is the network monitoring by means of

Phasor Measurement Units (PMUs);

PMU definition (as stated in IEEE Std.C37.118-2011):“A device that produces synchronized measurements of phasor (i.e. its amplitude and phase), frequency, ROCOF (Rate of Change Of Frequency) from voltage and/or current signals based on a common time source that typically is the one provided by the Global Positioning System UTC-GPS.”

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Introduction (2)What is a Phasor Measurement Unit (PMU)?

PMU timeline:1988

1st PMU prototype

1992

1st commercial PMU

1995

1st PMU Standard

(IEEE 1344)

2005

New PMU Standard

(IEEE C37.118-2005)

1893

Introduction of “Phasor” concept

1980s

GPStechnology

2011

Latest version ofIEEE Std.

C37.118-2011

2012

1st PMU prototype at EPFL

PMU typical configuration:

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Introduction (3)PMU applications within transmission networks

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Introduction (4)PMU applications within active distrib. networks

= Phasor Measurement Unit

RT Power System State Estimator

Phasor Data Concentrator - PDC

Network in normal operation:• Voltage sensitivities computation• Power flows sensitivities computation• V/P real time optimal control• Real time congestion management

Network in emergency conditions:• Islanding detection• Fault identification• Fault location

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PMU requirements (1)IEEE Std. C37.118-2011 - Definitions

Synchrophasor definition:

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PMU requirements (2)IEEE Std. C37.118-2011 – Measurement compliance

Reporting rates:

Performance classes:• P-class: faster response time but less accurate• M-class: slower response time but greater precision

Measurement evaluation:

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PMU requirements (3)Active Distribution Networks applications

Peculiar characteristics of distribution networks:• reduced line lengths;• limited power flows values;• high harmonic distortion levels;• dynamic behaviors

Improved accuracy of synchrophasors

measurements

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synchrophasor #1

111 ,, QPI

1E 2E synchrophasor #2

222 ,, QPIjX

PMU requirements (4)Active Distribution Networks applications

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Proposed synchrophasor est. algorithm (1)State of the Art of DFT based algorithms

Considered error sources:1. Aliasing 2. Long range leakage

3. Short range leakage 4 Harmonic interference

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Proposed synchrophasor est. algorithm (2)State of the Art of DFT based algorithms

1. Aliasing 2. Long range leakage

3. Short range leakage 4 Harmonic interference

Correction approaches:

Introduction of adequate anti-aliasing filters

Increasing of the sampling frequency

Interpolated DFT methods

Use of appropriate windowing functions

Iterative compensation of the self-interaction

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Proposed synchrophasor est. algorithm (3)Structure of the proposed algorithm

I. Signal acquisition (voltage/current), within a GPS-PPS tagged window T (e.g. 80 ms, i.e. 4 cycles at 50 Hz) with a sampling frequency in the order of 50-100 kHz.

II. DFT analysis of the input signal, opportunely weighted with a proper window function.

III. First estimate of the synchrophasor by means of an interpolated-DFT approach.

IV. Iterative correction of the self-interaction between the positive and negative image of the DFT main tone.

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Proposed synchrophasor est. algorithm (4)Flow chart

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3-4 periods of the fundamental frequency tone

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Hanning window:

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Algorithm implementation (1)FPGA-optimized software implementation

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Process 1

Algorithm implementation (2)FPGA-optimized software implementation

GPS-synchronization process:• Time uncertainty of ± 100 ns

• Compensation of the FPGA clock drift

Pipelined signal acquisition:• 6 parallel channels (3 voltages 3 currents)

• Phase correction

Synchrophasor estimation algorithm:• Optimized DFT computation for power systems

typical frequencies• 32-bits fixed-point implementation

Process 2

Process 3

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Algorithm implementation (3)Phase correction

-0.001 0.000 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.009 0.010 0.011-1.2

-1.0

-0.8

-0.6

-0.4

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

1.2

s(k)PPS

Time [s]

k0 1 2

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Algorithm implementation (4)FPGA clock error compensation

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Experimental validation (1)Compliance verification platforms

Time-Sync accuracy ±100 nswith 13 ns standard deviation

18-bit resolution inputs at 500 kS/s, analog input accuracy 980 μV over ±10 V input range (accuracy of 0.01%)

Control and synchronization of the other PXI boards

HW - PXI based platform:

SW - Desktop based platform:• Generate the test signal in host according to each test item in IEEE C37.118,

2011 then run the FPGA algorithm in desktop.

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Experimental validation (2)Static tests – Signal frequency range

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Experimental validation (3)Static tests – Harmonic distortion

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Experimental validation (4)Dynamic tests – Amplitude-phase modulation

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Experimental validation (5)Dynamic tests – Frequency sweep

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Experimental validation (6)Dynamic tests – Amplitude step

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Conclusions (1)Future improvements

1. Design of a iDFT algorithm satisfying both class P and M requirements:• Sensitivity to algorithm parameters (Fs, N, w(n), interpolation scheme,

no. of iteration)• Out of band interference test compliance (signal pre-filtering)

2. Adaptation of the algorithm to specific hardware platform:• NI-9076 (SIL-nanotera)• Zynq

3. Integration of GPS-independent synchronization systems: • Autonomous clocks (e.g. Rubidium-Oscilloquartz) • External synchronization signals provided by telecom protocols (Alcatel)

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The end

THANK YOU VERY MUCH FOR YOU

ATTENTION

Documents

DESl-LCA2 workshop - PMU presentation.pptx