Designing Chargers and Adapters with

LinkSwitch®-LP

Slide# 2

Seminar Agenda

• Introduction– Power Integrations– The Opportunity

• Introducing LinkSwitch-LP– Features and Operation– LinkSwitch-LP Performance– Designing with LinkSwitch-LP– LinkSwitch-LP Hints and Tips– LinkSwitch-LP Design Examples– Additional Features of LinkSwitch-LP– LinkSwitch-LP Quick Design Checklist

Slide# 3

Power Integrations Overview

• Leader in high voltage monolithic power conversion ICs

• > 1.6 billion devices shipped

• Revolutionary products

• Proven quality and delivery performance

• Pioneers in energy efficiency (EcoSmart®)

Slide# 4

Global Applications Support

• Fully Equipped Applications Labs

• 55+ Application Engineers Worldwide

The Opportunity

Companies that get CEC/Energy Star/CECP compliant power supplies to market quickly

have a significant competitive advantage

Slide# 6

Energy Efficiency Drives Redesign

• Energy efficiency has become a key design requirement

• Up to 60% of existing solutions don’t meet new standards

• Harmonized EPS energy efficiency standards are here

• Power Integrations power conversion ICs enable compliance with all current and proposed standards

See appendix A for details on energy efficiency standards

Slide# 7

Existing Linears vs No-load Standards

Slide# 8

Existing Linears vs Active-mode Standards

0.09 x Ln(P OUT) + 0.49

Slide# 9

High Efficiency at Light Load is Critical• Active-mode efficiency is the average of POUT at 25, 50, 75 and 100% load

– Consistent efficiency over load range is more valuable than high full load efficiency– Control schemes that reduce frequency with load are optimal

Power supplies 1 and 2 are rated at 5 W output power POUT

Slide# 10

Power Supply Output Characteristics• PI has solutions for all VI characteristics

LOOSE CV/CC LOOSE CV ONLYVERY LOOSE CV/CC

TIGHT CV ONLY TIGHT CV / LOOSE CC TIGHT CV / TIGHT CC

Slide# 11

PI Device Selection for Chargers/Adapters

LinkSwitch-LP

Features and Operation

Slide# 13

LinkSwitch-LP Pin Function Descriptions

• DRAIN (D) Pin:– Power MOSFET drain and high-

voltage startup

• BYPASS (BP) Pin:– Connection point for 0.1 µF

external bypass capacitor

• FEEDBACK (FB) Pin:– Provides feedback to controller

and a reference voltage for bias winding feedback

• SOURCE (S) Pin:– Power MOSFET source and

controller ground reference

Slide# 14

LinkSwitch-LP Power Levels and Design Flexibility

• 1.9 W, 2.5 W or 3 W solutions can be made from one design

• Two standard transformers allow a VOUT range of 4–12 V

• Solutions that deliver up to 2.5 W can be Clampless™

Slide# 15

LinkSwitch-LP Device Family Features

• Easy-to-design, low parts count solutions

• Primary-side controller limits output current beyond the peak power point – no current sense resistors required

• Fully fault protected – thermal, short-circuit and open-loop

• Operates over universal input voltage range (85 – 265 VAC)

Slide# 16

LinkSwitch-LP System Cost BenefitsTight toleranced, low, current limit enables Clampless™primary winding

Low-cost, transformer derived feedback

Output voltage set by resistor divider and accurate FB pin

Switching frequency jitter enables simple EMI filter and the inductor to be used as a Filterfuse™

Internal, high-voltage, current source eliminates start-up circuitry

• Optimized for lowest cost, loosely regulated, CV/CC applications– Typical circuit diagram – not a simplified schematic

Internal current sense circuit eliminates sense resistor

ON/OFF control: no frequency compensation components required

Slide# 17

Start-up: Charging BP Pin Capacitor

BP pin capacitor is charged to 5.8 V from DRAIN via internal high voltage current source

• No external resistor string or start-up circuit required

Slide# 18

Start-up: Drain Starts Switching

Energy stored in BP pin capacitor powers the IC while the MOSFET is on. The current source recharges the BP pin capacitor while the MOSFET is off

Output voltage begins to rise

As output voltage rises, no switching cycles are skipped and current into the FB pin rises

When the BP pin reaches 5.8 V, the MOSFET starts switching

5.8 V

Slide# 19

LinkSwitch-LP Start-up Waveforms

BP pin voltage

LinkSwitch-LP skipping switching cycles to keep output voltage in CV regulation

Charging BP pin capacitor

Slide# 20

LinkSwitch-LP CV Operation• ON/OFF control regulates VOUT from no-load to rated load

• MOSFET current ramps to ILIMIT every enabled (ON) switching cycle– Each ON cycle delivers a fixed (maximum) amount of energy

• When > 70 µA flows into FB pin, MOSFET switching is disabled (OFF)– Effective switching frequency reduces proportionally with the load

• Fixed energy per cycle keeps no-load frequency & consumption low

Feedback signal sampled each clock cycle

Slide# 21

LinkSwitch-LP CC and Auto-restart

• From peak power point to auto-restart, falling FB pin voltage causes oscillator frequency to drop, limiting output current and power

• At auto-restart, FB pin voltage drops below the VFB(AR) threshold, limiting output power to ≈ 12% of peak power

1.69 V

0.8 V

Slide# 22

LinkSwitch-LP Auto-restart Waveforms

When FB pin voltage < VFB(AR) for > 100 ms, auto-restart initiates and MOSFET switching is disabled for ≈ 800 ms then re-enabled for ≈ 100 ms

Auto-restart ends whenever FB pin voltage > VFB(AR)

Fault removed

• Auto-restart limits average output current ≈ 12% rated output

LinkSwitch-LP Performance

Slide# 24

LinkSwitch-LP Output Characteristic

0

1

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3

4

5

6

7

8

9

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9Output Current (A)

Out

put V

olta

ge (V

)

85 VAC265 VAC

Auto-Restart

Slide# 25

LinkSwitch-LP CV Mode vs Unregulated Linear

Linear does not meet rated output power (6 V, 300 mA) below 115 VAC

1.8 W unregulated linear output envelope (85-132 VAC)

2 W LinkSwitch-LPoutput (85-265 VAC)

Unregulated linear line regulation (85-132 VAC): +15/–58% at rated output

LinkSwitch-LP line regulation (85-265 VAC):< ± 1% at rated output

Slide# 26

LinkSwitch-LP CC vs Unregulated Linear

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8

9

0 0.5 1 1.5 2 2.5 3 3.5

Output Current (A)

Out

put V

olta

ge (V

)2 W LinkSwitch-LP1.8 W Linear

Rated output power

Auto-restart limits overload current, protecting both supply and load.Input power ≈ 400 mW at auto-restart

Input power ≈ 28 W, protected by one-time thermal fuse

May be dangerous to the load

Slide# 27

LinkSwitch-LP Output Ripple vs Unregulated Linear

848 mV pk-pk 144 mV pk-pk

200 mV, 2 ms/div 200 mV, 2 ms/div

Unregulated Linear, 6 V, 1.8 W adapter 115 VAC, Full Load

LinkSwitch-LP 6 V, 2 W adapter115 VAC, Full Load

Measured with resistive load at end of output cable

Slide# 28

LinkSwitch-LP Active Mode Efficiencyvs Unregulated Linear

• Linear transformer design does not meet CEC requirement

Slide# 29

LinkSwitch-LP Conducted EMI Results

150 kHz 30 MHz

1 QPCLRWR

2 AVCLRWR

SGL

TDF

dBµVdBµV 1 MHz 10 MHz

-20

-10

0

10

20

30

40

50

60

70

80LIMIT CHECK PASS

EN55022A

EN55022Q

• Worst-case measurement on EP-85– No Y-capacitor used (adding improves unit-to-unit repeatability)

Designing with LinkSwitch-LP

Slide# 31

LinkSwitch-LP Input Stage Selection

• Half-wave rectified Filterfuse option may still be cost effective >1 W– Component value details provided in AN-39

Slide# 32

Filterfuse for Half-wave Rectification Only

Short circuit current

Standard (slow) Diode

Fast Diode (trr ~150 ns)

L1 provides no protection if any diode fails shorted

ACIN

L1 acts as a fuse if C1, DIN1 or DIN2 fail shorted

• Input inductor functions both as an EMI filter and a fuse– Only possible with half-wave rectification

• Field feedback: designs using Filterfuse have passed safety tests

Slide# 33

Filterfuse Requires a Fast Diode

2 x 1N40071N4007 & 1N4937

Increases EMI and variability at low frequencies

• Stops ringing caused by reverse current through inductor– Second capacitor normally prevents this in standard π filter configuration

• Reduces measurement variation due to LISN characteristics

Slide# 34

FilterFuse Inductor Selection

Temperature rise ~20°C at 90 VAC

• Select inductor current rating near to the calculated input RMS current– Reduces the amount of energy and current required to open circuit the inductor– Verify that inductor temperature rise is acceptable at low-line

• Sleeve inductor with heatshrink tubing in manufacturing– Tubing contains incandescent material at failure: required to meet safety

• Typical inductor specifications (often called radio frequency chokes)– Epcos BC Series: 3300 µH, 62 mA, 59.5 Ω, part # B78148-S1335-J

Slide# 35

LinkSwitch-LP Device Selection

• Select device based on output power and preferred core size– Limiting flux density to 1500 Gauss will minimize audible noise – Core power capability and audible noise both increase with flux density

Slide# 36

Designing Clampless LinkSwitch-LP Solutions

• Primary capacitance and bias winding provide clamping– Location of bias winding in winding order impacts effectiveness

LinkSwitch-LP Clampless™ Solutions

265 VAC

550 VPK

580 VPK

265 VAC

VDS

VDS

Increased leakage ringing without bias winding

Slide# 37

• Bias winding and CP clamp energy stored in leakage inductance

– Tight ILIMIT tolerance keeps peak drain voltage below 700 V (BVDSS rating of IC)

– Power limit of Clampless designs based on EMI results

Clamplessdesign without bias winding

Clamplessdesign with bias winding

Slide# 38

LinkSwitch-LP Design Flexibility

0

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11

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7Output Current (A)

Out

put V

olta

ge (V

)

7.5V 0.26A 90VAC6V 0.21A 90VAC4V 0.325A 90VAC6V 0.33A 90VAC

• Only feedback resistor and/or LinkSwitch-LP device changed– All other components were the same for all four designs

Slide# 39

LinkSwitch-LP Standard Transformer Selection

• For designs <2 W, select 1 of 2 standard EE16 transformers

• Standard transformers include E-Shield™ for reduced EMI– Full specifications in AN-39

Slide# 40

LinkSwitch-LP Standard Transformer

Slide# 41

LinkSwitch-LP Standard Transformer Sources

• Standard transformers available from– Falco Part #: E09077– Hical Part #: SIL6036– CWS Part #: CWS-T1-DAK85– Li Shin Part #: LSLA40342– Woo Jin Part #: SLP-2218P1

• See website for contact information– www.powerint.com/componentsuppliers.htm

• Custom transformer design instructions in AN-39

• Design spreadsheet tool available in PI Xls (version 6.1.1)– Can be used to design custom transformers for LinkSwitch-LP supplies

Slide# 42

LinkSwitch-LP Output Diode Selection

• Sample Schottky and Ultrafast diodes for use in LinkSwitch-LP designs– Diodes with lower reverse recovery times (trr) produce a steeper CC region– Output diode DC current rating should be ≥ rated output current

Slide# 43

LinkSwitch-LP Output Capacitor Selection

• Capacitor voltage rating must be > 1.25 x VO

• Capacitor ripple current rating > IRIPPLE (from PI Xls spreadsheet)– Output capacitor IRIPPLE ratings are inversely proportional to temperature

• Example: A 105°C capacitor working at 85°C has an IRIPPLE factor of 1.7 • Check manufacturer’s datasheet for specific factors

typical 2 W design

typical 3 W design

Slide# 44

Selecting Other Components

Default values calculated in PI Xlsdesign spreadsheet. R1 value may be adjusted to center output voltage

Low cost 0.1 µF 50 V ceramic

Low cost 330 nF 50 V ceramicSlow diode improves CC

part of output VI characteristic

Slide# 45

LinkSwitch-LP Design Tools

• Reference Design (Design Accelerator Kit) DAK-85:– An operational, tested 2 W

(EP-85) power supply

– A blank PCB and IC samples

– PI Expert Suite power supply design software

– LinkSwitch-LP datasheet

– Application Note AN-39 LinkSwitch-LP Design Guide

LinkSwitch-LP Hints and Tips

Slide# 47

Limiting Open Loop Output Voltage

x10 V, 0.5 mWZener diode

10.2 VOUT[PK]

VOUT

2 V, 200 ms / div

VIN: 265 VAC

• Auto-restart allows low cost 500 mW Zener for open loop protection– Required in some specifications– Auto-restart mode prevents Zener diode from overheating and failing– If Zener used, pre-load resistor (R3) typically not required

Slide# 48

Pre-load and Clamp Zener Selection

7

7.5

8

8.5

9

9.5

10

10.5

11

0 0.002 0.004 0.006 0.008 0.01 0.012 0.014Output Current (A)

Out

put V

olta

ge (V

)No pre-load100 mW no-load @ 265 VAC

10 V zener101 mW no-load @ 265 VAC

9.1 V zener106 mW no-load @ 265 VAC

575 uA / 16 k pre-load107 mW no-load @ 265 VAC

1 mA / 8 k pre-load112 mW no-load @ 265 VAC

4 mA / 2 k pre-load141 mW no-load @ 265 VAC (EP85)

2 mA / 4 k pre-load120 mW no-load @ 265 VAC

• Select pre-load for acceptable no-load voltage and input power

Slide# 49

Bias Winding Placement and Regulation

(a)

(b)

0

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0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9Output Current (A)

Out

put V

olta

ge (V

)

Winding Order (a) 90 VACWinding Order (a) 265 VACWinding Order (b) 90 VACWinding Order (b) 265 VAC

a

b

• Placing bias winding away from primary improves regulation

Slide# 50

Bias Winding Diode tRR Selection

0

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0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2Output Current (A)

Out

put V

olta

ge (V

)D3: 1N4005, 90 VACD3: 1N4005, 265 VACD3: 1N4936, 90/265 VACD3: UF4003, 90/265 VACD3: 1N4148, 90/265 VAC

Decreasing diode tRR

• Slow recovery diodes (1N400x) give best CC regulation– Reduces leakage inductance error in bias winding voltage

Slide# 51

Feedback Resistor Value Selection

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0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1Output Current (A)

Out

put V

olta

ge (V

)

• High values for R1/R2 produce poorer CC regulation

• Low values for R1/R2 produce better CC regulation

– Low values for R1/R2 also increase no-load consumption

Best R2 value is 3 k

R1/R2 values 2 x EP-85

R1/R2 values ½ EP-85 values

R1/R2 values same as EP-85

Slide# 52

LinkSwitch-LP Layout Recommendations

Keep drain trace short

Keep input stage away from IC DRAIN pin to minimize noise coupling

Maximize source area for good heatsinking

Keep secondary away from IC DRAIN pin

Keep output diode to output capacitor trace short

Place BP pin capacitor close to IC

LinkSwitch-LP Design Examples

Slide# 54

2 W Linear Replacement Using LNK564

Output Characteristic

900 mA

8.5 V

5.5 V

• Unregulated linear or approx CV/CC• No-load consumption: < 0.15 W• Average efficiency: > 60 %• Component count: 14• No Y-capacitor (< 1µA leakage current)

Slide# 55

1.3 W Linear Replacement Using LNK562

Same circuit as previous slide: only C1 and U1 where changed

Output Characteristic

750 mA

8.5 V

5.5 V

• Unregulated linear or approx CV/CC• No-load consumption: < 0.15 W• Average efficiency: > 60 %• Component count: 14• No Y-capacitor (< 1µA leakage current)

Slide# 56

Typical LinkSwitch-LP Production Variation

• 100 randomly selected production units EP-85– Data taken at 25 °C, at 85 VAC (blue traces) and 265 VAC (red traces)– Shows that raising the nominal VO would better center the distribution

Minimum specified power point

Slide# 57

LinkSwitch-LP Output CV/CC Tolerances

• High-volume manufacturing tolerances– < 15% VOUT tolerance at peak power point

– < 30% IOUT tolerance at peak power point*(dominated by transformer inductance tolerance)

– All component tolerances, including LinkSwitch-LP

*with ±10% primary inductance tolerance

Slide# 58

LinkSwitch-LP Variation with Temperature

0

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7

8

9

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9Output Current (A)

Out

put v

olta

ge (V

)0 C, 90 VAC0 C, 265 VAC25 C, 90 VAC25 C, 265 VAC40 C, 90 VAC40 C, 265 VAC

• Typical single unit variation of ≈ 5% over line and temperature– Measured at the peak power point on the EP-85 supply

± 2.5%

Slide# 59

Accurate CV with Optocoupler

• Optocoupler provides more accurate feedback in CV region

• Bias winding provides CC regulation through R1 and R2– Adjust the value of R1 to obtain optimum CC regulation

Slide# 60

Accurate CV Output Variation

• R1 values approximate variations of resistor and FB pin tolerance

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

0 0.1 0.2 0.3 0.4 0.5Output Current (A)

Out

put V

olta

ge (V

)R1 = 60.4 K (nom.) 85 VACR1 = 60.4 K (nom.) 265 VACR1 = 65.1K (+7.8%) 85 VACR1 = 65.1K (+7.8%) 265 VACR1 = 56.1K (-7.1%) 85 VACR1 = 56.1K (-7.1%) 265 VAC

Additional Features Of PI Devices

Built in features help you create a better, lower cost design

Slide# 62

IZ = IFB + IBIAS

• Overall ± 7% Vo tolerance with (± 2%) Zener feedback (saves cost)– Feedback current (IFB) independent of changes in Zener bias point

• Zener voltage change (∆VZ) is negligibly small with ON/OFF control

• Typical PWM controllers have >1 mA ∆IFB, so ∆VZ affects accuracy

ON/OFF Control Benefits

IBIAS

IFB

IZ

Slide# 63

Wide Creepage Distances

• Extended package and pcb creepage distances ensure adequate high voltage spacing for high humidity and high pollution environments– Industry standard 8 pin package with pin 6 removed

• Four SOURCE-pin configuration maximizes conductive heat-sinking

Compare to TO-92 type package < 0.9 mm package creepage

Slide# 64

Hysteretic Thermal Shutdown

• Fully specified and accurate under all fault conditions– Accurate threshold specification 142°C (± 5%)– Hysteresis (75°C) allows auto-restart when temperature has reduced– Linears have a one-time thermal fuse (safety) that cannot be reset– Discrete switcher circuits require extra components that do not directly

sense switch temperature, and usually require AC power cycling to reset

Slide# 65

PI Device Key Design Advantages

• Safety and reliability – protects supply, load and end user– Thermal Shutdown prevents overheating from all causes, including overload– Tight ILIMIT and FSW tolerances limit power delivery in overload conditions– Wide IC package creepage reduces likelihood of arcing related failures

• Lowest cost solutions– Lowest component count – keeps BOM and manufacturing costs low– Simple and rugged circuits shorten design and qualification cycle times– Manufacturability and performance consistency result in high production yields

• Very wide input voltage operation: <85 VAC to >300 VAC– EPS standards require compliance at 115 and 230 VAC for 85–265 VAC input

• Difficult for discrete designs to comply at both voltages – Universal input operation enables a single design to be used worldwide,

which results in significant logistics cost savings• Scalability – working designs are easily modified for new applications

PI Device Quick Design Checklist

Slide# 67

Quick Design Checklist

• Maximum (peak) drain voltage– VDS should not exceed 650 V at VINMAX and peak (overload) power.

• A 50 V margin to the 700 V BVDSS rating gives margin for design variation, especially in Clampless designs

• Maximum (peak) drain current– Observe drain current waveforms for signs of transformer saturation

At maximum ambient temperature, VIMAX and peak (overload) power – Peak drain current must remain below the specified absolute maximum

specifications, under all operating conditions• Leading Edge Blanking

– Observe the leading-edge current spike on the drain current waveform and verify that it is below ILIMIT(MIN) at the end of the tLEB(MIN)

• Pulsed Negative Drain Current– Observe drain current waveforms and verify that the peak of any negative

drain current is within the maximum limit specified in the datasheet

Slide# 68

Clampless Design Drain Voltage Example

265 VAC 265 VAC580 VPK 680 VPK

100 V/div100 V/div

Acceptable Design Margin Insufficient Design Margin

• Peak drain voltage should not exceed 650 V– Provides 50 V of margin to 700 V BVDSS for unit-to-unit variation

Slide# 69

Pulsed Negative Drain Current

VDCVDS100 V / DIV

IDS50 mA / DIV

VOR

2 µs / DIV

10 mA, 0.5 µs / DIV

Datasheet Maximum Clampless, 130 VOR, 70 VACDrain voltage clamped to source

Negative drain current

• Drain voltage may ring below the source in Clampless designs– Occurs if VOR > minimum DC bus voltage (VMIN)

• Verify that negative drain current is below datasheet maximum– Measure at lowest specified operating voltage and highest output voltage

Leading Edge Blanking Example (LNK362)

50 mA, 2 µs/div

ID at 265 VAC

tLEB(MIN)170 ns

ILIM(MIN)130 mA

Drain current well below current limit after tLEB(MIN)

Datasheet specifies minimum blanking time (tLEB)

Slide# 70

External Power Supply (EPS) Energy Efficiency Standards

Appendix A

Slide# 72

The Problem of Energy Waste

• Energy waste is a major concern around the world – Fossil fuel energy sources are finite – Fossil fuel consumption side effects: pollution, green-house gases– Energy costs are increasing, while alternative energy sources are not

mature enough to provide relief

• The growing demand for personal electronics has dramatically increased the number of External Power Supplies (EPS)

• How much energy do EPS actually consume each year?

Slide# 73

The Magnitude of Energy Waste

Estimated EPS sold annually: >1 billion units

Estimated EPS currently in use: >10 billion units

% of EPS that are inefficient linears: ~ 45%

Yearly EPS energy waste in the US: 30 – 60 B kW-hours

Cost of annual US EPS waste : 2.5 – 5 billion dollars

Although EPS waste is only 1-2% of annual US energy consumption, it equals the output of 26 average sized power plants!

Slide# 74

Regulations Emerge to Reduce Energy Waste

Slide# 75

CALIFORNIA CODE OF REGULATIONS, TITLE 20, SECTIONS 1601 - 1608

Note: Active-mode efficiency is the average of the 25%, 50%, 75%, and 100% load pointsIn 2008, the minimum active-mode efficiency for EPS > 51 watts will be 0.85, and the maximum no-load consumption for all EPS < 250 watts will be 0.5 watts

Slide# 76

Additional Energy Efficiency Programs

• US 1W Standby Executive Order

• Japan Top Runner Program

• Korea Energy Saving Office Equipment & Home Electronics Program

• Germany Blue Angel

• US Ecos Consulting 80-Plus Program

• European Group for Energy Efficient Appliances

• EU Directive 2005-32-EC (EuP Directive)

Slide# 77

Meeting Worldwide Requirements

• PI solutions enable conformance to ALL worldwide energy efficiency standards including standards with tighter no-load consumption limits

– European Union Code of Conduct requires < 300 mW– Some Japanese and European OEMs require < 150 mW– Other Japanese OEMs require < 50 mW

Slide# 78

Stay Informed with PI’s Green Room

• The PI Green Room contains information and links to the latest worldwide standards

– www.powerint.com/greenroom

– View regulations and standards for your design:

• By agency (ENERGY STAR, CEC, CECP, AGO, etc.)• By application (external adapter/charger, TV, DVD player, etc.)• By region (China, Asia, Europe, US, etc.)

Slide# 79

Links to Key Documents

• Current version of the CEC Appliance Efficiency Regulations http://www.energy.ca.gov/appliances/

• US EPA ENERGY STAR power supply efficiency specificationhttp://www.energystar.gov/index.cfm?c=prod_development.power_supplies

• US EPA test method for calculating the efficiency of single voltage external AC-DC and AC-AC power supplieshttp://www.energystar.gov/ia/partners/prod_development/downloads/power_supplies/EPSupplyEffic_TestMethod_0804.pdf

• EU Code of Conduct external power supply efficiency web page http://energyefficiency.jrc.cec.eu.int/html/standby_initiative_External%20Power%20Supplies.htm