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Rochester Institute of TechnologyRIT Scholar Works
Theses Thesis/Dissertation Collections
5-28-1976
Design, Construction, and Testing of SequentiallyFlashing Led Array to Study Angular CameraMotion in Hand Held Camera SystemsRandall Hube
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Recommended CitationHube, Randall, "Design, Construction, and Testing of Sequentially Flashing Led Array to Study Angular Camera Motion in Hand HeldCamera Systems" (1976). Thesis. Rochester Institute of Technology. Accessed from
. DESIGN, CONSTRUCTION, AND TESTING
OP SEQUENTIALLY PLASHING LED ARRAY
TO STUDY ANGULAR CAMERA MOTION IN
HAND HELD CAMERA SYSTEMS
ABSTRACT
This project deals with the construction of a device
to determine the actual angular motion in a hand held camera
system caused only by the holder. An array of LEDs (8x8)
is flashed so that one LED flashes at a time in sequence.
This sequence is photographed by a system suffering from
motion effects and this is compared with the image of the
array when no motion effects are present. The displacements
of each"blip"
with respect to time is used to determine
the motion of the camera system.
by
Randall P.. I.ule
Photo -ra'jhic Scitiac*. and !ustrur;e:itationv'
'
x
Rochester Institute of Technology
Nay 78. 1.L7o
ACKNOWLEDGEMENTS
The author wishes to thank the many technical rep
resentatives of the Monsanto Company for providing infor
mation on their Light Emitting Diodes. Gratitude is also
expressed to Bruce Binns for his- suggestions on attacking
electronics problems along with William Ross and Dana
Dudarchik for their help in photographing the array.
Thanks is also given to Dr. Schumman for his instruction
on methods of research. Special thanks is given to Prof.
Carson who suggested the project and helped advise through
out the project. Most of all, thanks is given to Marc
Viggiano for the many hours he spent designing and testing
electronic circuits. His knowledge in the area of elect
ronics and his willingness to lend assistance was much
appreciated.
II
INTRODUCTION
Cameras have become a very common item in the world
today. Millions of pictures are taken each day by everyone
from a child with a box camera to a professional photographer
with much more sophisticated equipment. Most of these pic
tures, no matter what the subject is, are taken by a person
who is holding the camera in his hands in anyone of many
possible positions. This makes for a very unsteady system.
Although some people are able to hold a camera steadier than
others, all people"shake"
a little while the picture is be
ing taken.
Many factors contribute to the shake of a camera system.
Many vibrations occur when the camera shutter is triggered.
The action of a person pressing the shutter release button
causes the camera to shift somewhat depending on the position
of the button, the force needed, and the skill of the oper
ator. Once the shutter is triggered this starts all kinds
of mechanical motions internally to move the shutter, no
matter whether it is a leaf of focal plane shutter. Mirrors
bouncing arround in an SLR camera is another source of vib
ration. These mechanically initiated vibrations can be min
imized with careful engineering using techniques such as
using light mass parts for those that must move, not using
excessive force to move each part, and using dampening at
the end of each parts travel. Another major factor in the
shake of camera systems is that of the operator himself.
Many test? have been performed on images from hand held
///
camera systems to determine quantative values that indicate
the degree of degredation of the image because of vibrations.
Vibrations cause edges to lose sharpness and fine detail to
be lost. Resolution and MTF analysis has been performed on
images, taken under many conditions, to put numbers to what
is good, acceptable, and poor in the way of degredation.
The trouble with this information is it only shows the
time averaged effect of camera motion along with other factors
which degrade the image. In the time the picture was taken
it could have moved up and down, sideways, and any number
of other directions any number of times.
A test proposed in Modern Photography's May 1971 issue
("How Shaky Is Your Camera", p. 90-93) made an attempt to
demonstrate camera motion but again it only showed the time
averaged effect. The idea was to fasten a snail mirror to
the front of a camera and bounce a narrow beam of light
off it and photograph the image of the reflection as the
camera shutter was triggered. The size of the beam pattern
reflected showed how much shake occurred and sometimes in
dicated in which axis most of it occurred.
If more information was known as to the exact nature
of the vibrations, steps could be taken to minimize them.
The best way to study a multitude of vibrations like these
is to seperate the individual effects.
For all intents and purposes the motion of a camera
will be considered to be of a rotational or angular nature.
This is opposed to that of the camera moving back and forth
on the Z axis (see Figure A) or in either the planes of the
IV
Figure A
X or Y axis. These motions do
not create much effect on images
under normal circumstances. Motion
in the Z plane changes the image
magnification. For an object at
5 meters, moving the camera in the
Z plane 1mm causes the image mag
nification to change by about
2/l00ths of 1%. This means a 50
micron dot will reduce to a size of 49.99 microns if the
camera is shifted backward. This smearing is not worth
speaking of in normal situations. Motion of the camera in
either the X or Y planes causes the object to shift by a
corresponding amount while taking a picture. A 2mm shift
in the camera results in a 2mm shift of the object. If
the object is photographed at 5 meters with a 50mm lens
the image shift is about 20 microns according to the
following calculations.
Image shift = Magnification x Object shift
where: Magnification = s'/s
s'
= image distance = l/(l/f-l/s)
s = object distance
s'= l/( l/.05m-l/5m) =
.0505
Magnification =.0505/5
=.0101
Image shift =.0101 x 2mm = 20 microns
This is no larger than the resolution limit of moat
films so again this effect can Le ceasicercdi i
However, an angular shift of about .5 degrees results in
an image shift or smear of about 400 microns by triangulation
(see Figure B).
Image shift =.0505 x tan9 = tan(,5) x .0505
= 440 microns
Image
shift
Angle of
Image distance =. 0505m
Figure B
The purpose of this research project is to build a
device that can show the precise angular vibrations in a
hand held camera system, caused solely by the operator.
These vibrations, whether it be periodic and of one fre
quency, purely random, or some combination of these, can be
best determined by breaking time dov/n into little pieces
and studying the motion during each small piece.
It may be found that all people vibrate the camera in
a similar way so that steps could be taken to minimize this,
DESIGN OF SEQUENTIALLY FLASHING LIGHT ARRAY
To'find motion information for short pieces of time a
sequentially flashing light array is used. This array of
lights flashes one at a time in a sequence. The lights are
on for very short durations, just long enough to produce an
image on film, but short enough so as to create a sharp dot
even when photographed by a badly vibrating system. A
delay between lights allows some camera motion to occur in
that time and the second light"blip" is in a position that
is shifted from where it would be if no motion had occurred.
Ey recording the shift of successive"blips"
a study of
angular camera motion vs. time can be made.
The method of measuring motion caused displacements of
blips was to flash the light array twice while a hand held
camera system recorded the images on a piece of film, the
camera being with the shutter held fully open in a dim or
dark room. The first flashing sequence would instantaneously
image all the lights of an array onto the film to create a
matrix of dots on the film corresponding to the location of
the light in the array. The image on the film is a"perfect"
matrix which doesn't show any effects of motion since there
was no time lapse between the lights in the array flashing
through their positions. (example: 1,1; 1,2; 1,3; 2,1; 2,2;...)
The second time the lights are sequenced slowly through the
array so that there is a pause between light 1,1 and 1,2;
1,2 and 1,3; and so on. The images of the second sequer.ee
of flashes is thrown right on top of that of the firststeady-
array images. This slower sequence suffers from camera motion
+,
FINAL IMAGE
represents image
location of steady
array light
+ represents image
location of motion
effected array light
Figure 1
and is reflected in an image ., , +.
displacement of corresponding
light blips from the first
steady array and the second
motion effected array (see
Figure 1 ) .
The light sources also
needed to be rather small so
that v/hen they are photo
graphed they image as very
small dots on the film ( about
20-50 microns) so that small
shifts in motion can be detected between the imaged dots of
a light v/hen flashed in the instantaneous and slow sequence
modes. By using small dots small displacements of the images
can be measured allowing a finer measurement of camera motion.
Many ideas were investigated to produce this sequence
of quickly flashing lights. Mechanical shuttering was ruled
out because a large number of data points (lights) was desired.
This also required an extremely bright, continuous light
source behind the shutters to record an image on the film
during such a short duration of each blip. (It is thought
that a blip should last no longer than 100 microseconds to
image sharply under adverse motion conditions.) The next
idea considered was flashing individual miniature light ruibs
but because of the nature of the filiment they tend to have
slow rise and fall times making it difficult to pulse
quickly.
SELECTION OF LEDS
The light source selected for the array was a light
emitting diode (LED). The characteristics of an LED are that
it can be pulsed for very short times since it has quick rise
and fall times and the light source is small so as to yield
a small image on the film without requiring a large distance
between the camera and light array for a normal camera sys-
tem(SLR or box camera).
A typical diffuse LED (light scattered evenly from the
LED) has a physical si^e of about 5mm diameter which is the
same as the diameter that the light emerges from. This
would image in a 35mm camera system with 50mm lens located
at a distance of 5 meters from the target array at a size
of about 50 microns on the film as calculated from the
following formulas;
1/f = 1/s +1/s'
where: f = focal length
l/.05m = l/5m +1/s'
s = object dist.
s'=.0505m
s'= image dist.
Magnification = s'/s = i/o i = image height
M =.0505/5m
= i/.005m - o = object height
i = 50 microns
A question that needed to be answered before selecting
an LED was, would it put out enough light in such a short
pulse time so as to expose the film to a sufficient density?
An experiment to determine this answer was done by photo
graphing a variety of LEDs that were being lit Ly a voltage
source with a current that was at the upper limit of what
that LTD could reliably handle without damage when on for
long continuous periods.
It was found that one particular LED could, at normal
currents, deliver enough light to expose Kodak Tri-X film
when photographed at f/16 for 1/1000 second. This is roughly
equivalent to a 1/16,000 second exposure at f/4, a good
simulation of the quantity of light from a pulse. This
result can be proven by calculations. This LED (Monsanto1s
MV5352, data sheet in Appendix) is listed as having an
intensity of 45 millicandelas at 20mA. From this v/e can
calculate its luminance.
L = Intensity/Area of source where; L is the
luminance
Where the area is the area of the actual chip as seen
through the lens of the LED.
Projected size = Magnification x actual size
M = n>s'/npS where: n.= index of lens
n./s +n?/s'
= n?-n./r n2= index of air
1.52/. 158 +1.00/s'
= -.52/-. 100 s'= image dist.
s'= -.226inches s = object dist.
M = 1.52/1.00 x -.226/. 158 = -2.176 r = radius
Projected size = 2.176 x =
Projected area =..008 sq. in. =
L = 45mcd/.005cm2
= 9stilbs
This is then converted to radiance since it must be
considered at a specific wavelength, (about 535nm)
Radiance = L/680 x I.E. where: L.E. is the
luminous eff-
Radianee = 9/630 x ( . 7)
=
=.017 x
107
erg:/m2sr(sec)
Exposure through a camera system is calculated using
the following formulas:
H = Ee x t =/tL-T- t/4N2(l+M) where: L = radiance
'
= ir(.Ol7x107)(.9)(lO"4) T = transmittance
4(5.6)2(H.01)of lens
=.38 lux seconds
t = time of
exposure
Sensitivity = 1/H =2.63 . ,, ,
^N = f/# of lens
M = magnification
Tri - X film has a sensitivity of about 10 at 535nm
(read from curve of spectral sensitivity, Kodak data book
"Plates and Films for Science and Industry", p21d). This
means that an exposure level of . 1 lux seconds is enough to
expose the film to yield a density near .6. This LED had
the light output needed.
The only trouble with the KV5352 LED was that it did
not actually project the image of its chip nicely. It had
much background light which v/ould have caused problems when
the image was inspected since it would have been non-distinct
and hard to locate precisely. Also, it had a narrow beam
of light that was sufficient to expose the film. The LEDs
at the edges of the board would have been observed far
enough off axis so that the light fall off would have seen
a problem.
The next step was to test another, less powerful, I. I.D
of Konsanto's that was diffuse. m'753 54 (data sheet ir
Appendi ::) was not considered a point source LED like the
previous one. It does not have a leas that projects aa
image of the chip. Instead it has a diffusing lens that puts
light out in a scattered manner. Its cone is such that the
intensity falls to half when it is observed 10 degrees off
axis. This is a suitable cone of light for the LED array
to be used. This LED was rated at 10 med but like all LEDs
it was capable of putting out much more if it was duty cycled.
This means the LED is only on for a small time and then off
for much longer times. This can be done at much higher
current flows than the LED could handle if it were on constantly.
This LEL v/as experimentally pulsed and photographed
while operating at 150mA and was found to create a suitable
density on the film. The image of this LED was somewhat
larger than the other but had a much more even illuminance
off-axis. This LED could be masked to a smaller size if
needed.
An array of lights dimensioned in 8 columns and 8
rows was decided on as the number of lights to use(64)-
This number yielded a significant number of data points and
was easiest to control because of binary coding used in
electronic devices selected to control these LEDs ( This
will be explained later ).
Now that a light had been found, the next step was
to find a way to power it. in the manner desired.
f1
CONSTRUCTION CF led driver -card
These LEDs are sequenced by controlling transistors-
that flash the LEDs in a motrix like fashion. Append ix p
shows a part of the LED array as it is connected to the
controlling transistors. These transistors
switches. For the PNP transistors used (2N2374) the trans
istor is off (no current flows across the collector and
emitter connections) when the base (see Figure 2) is at
a level within .7 volts of the emitter. If the voltage of
the base Is brought to a level
lower then .7 volts from the
emitter then it is turned on.
The current that is allowed to
flow from emitter to collec-tor
is about 100-200 times that
flowing through the base, this
is called the transistor gain.
large
current
emitter
^\, small
\ % nit n-r'CJcurrent
base t
collector
Figure 2
The NPN transistor used (2N3052) is similar to the PNP.
It is off v/hen the base voltage is within .7 volts of the
emitter, but since the current flows from collector to
emitter, the base must be pulled to a voltage of at least
.7 volts higher then the emitter. Current flow is again
regulated by the current in the base.
As mentioned before the transistors in Appendix I
control the LEDs in matrix fashion. The 1st column tran
sistor connects all the anodes (+ side) of the 1st column
LEDs to the voltage supply by v/ay of a current limiting
resistor. The 1st row transistor connects the cathode
ae .-.-. in the 1st r; to ground. se(-side) ot
transistors are boih on then current can pass through the
first LED (position 1,1) from the voltage source to ground,
no other LED has a complete path for current to follow.
Zo light the second LED in the first row, the 2nd co.
transistor is turned on. This is continued column by column
down through the rows until the end of the rows is reached.
One more "groundingtransistor" is thrown into the
current paths of all the LEDs, just in front of ground, and
is used td interrupt the ground connection so that a more
precise control of the LED's"on"
time can be made. This
transistor can be controlled so that a ground connection
is only made for a short duration of time, therefore the
LED in sequence is only pulsed for a short duration of time.
An LED will not light if only its column and row transistors
are on and the grounding transistor is off.
Using this method of firing the LEDs required only a
total of 8 column, 8 row, and 1 grounding transistors to
control each one of the 64 LEDs.
The 1K ohm resistor connecting the base of the column
transistors to the voltage supply (+5volts) is what keeps
the base within .7 volts of the emitter or in the transis
tor:'s off mode. To turn it on the base is pulled to ground
through a 820 ohm resistor. This grounding causes 5 volts
to drop across the 1K and 820 ohm resistors in series. This
means only about 2.4 volts drops across the 820 ohm resistor
and 2.6 volts drops across the 1K resistor. Since the base
of the transistor is connected between these it too is at a
voltage of 2.4 volts or about 2.6 volts below the emitter
which is being maintained at a voltage near that of the
supply, thus turning it on.
The bases of the NNN transistors are left at a near
to ground level which is the level of their emitters thus
they are off. To turn them on a high voltage signalto-
their
bases will turn them on. The resistors on the NPNs are used
to limit the current in the base.
This circuit is designed to run a current of .about 150
mA through the LED when it is on. The 5 volts drops across
the 6 ohm, current limiting, resistor, the 3 transistors,
and the LED until it reaches ground level. The current
limiting resistor drops about .9 volts across is when the
current is 150mA.
V = I R where: V = voltage drop
V =.150amps x 6ohmsa I = current flow
V =.9 volts R = resistance
About .3 volts drops across each transistor when it
is on. This leaves about 3.2 volts to drop across the LED
which is about what it is designed to drop when it is oper
ated at 150mA.
These transistors and their respective resistors are
all mounted on the LED Driver Board shown in Appendix II.
Instead of using a 6ohm current limiting resistor it was
necessary to use two 12ohm resistors in parallel. These 2
resistors add in such a way as to give a total resistance
of 6ohms.
1/RT=
1/R1+ 1/R2
RT = 1/12 + 1/12 = 1/6
Finally two capacitors C1 and C2 have been connected
fiom the voltage supply to ground. 01 is an electrolytic
capacitor of 250 microfarads and C2 is a mylar capacitor of
.01microfarads. The purpose of C1 and C2 is to stop
10
!'gliches". Gliches are little
negative spikes in the voltage
that occur when a voltage supply
is asked to quickly deliver a
large current such as that
across an LED v/hen it is turned on.
voltage of supply
I glich
time
Figure 3
(Figure 3 shov/s an example of a glich) It takes a split
second for the voltage source to adjust to this new demand
and there is a small amount of time when it is unable to
satisfy the demand and their is a dip in the output. The
purpose of C1 and C2 is to fill this hole. A capacitor
can store a charge in such a way that large amounts can
be called upon quickly but only for a short time. This is
just long enough to cover for the power supply^. They also
keep these gliches from getting in to other parts of the
control circuit and causing unwanted signals to confuse the
counters, timers, and switches.
A list of values for the components in the LED Driver
Board can be found in Appendix III.
In the Circuit Diagram of the LED Driver Board the
inputs are A,E, and C. The 8 inputs at A control the column
transistors 1-8. The 8 inputs at B control the row transistors
1-8. Input C controls the grounding transistor. 27.e P.
outputs go to the anode? of their respective column LEDs and
the S outputs go to the cathodes of their respective row
LEDs .
//
CONTROL CIRCUIT
The next task was to design a control circuit that would
switch the LEDs on for the proper length of time and in the
desired sequence. In order to image as a sharp dot on the
film each.LED is to be flashed for about 1/10,000 of a sec.
The array is to be scanned in a sequence that goes from
left to right, moving to the next row down after all the
LEDs in the previous row have been flashed. Finally, this
array must be scanned through exactly twice, an instantaneous
scan to establish a reference dot matrix and a slow scan to
show angular camera motion.
A simplified Block Diagram of the Control Circuit shown
in Appendix IV can be used to explain its operation. The
blocks themselves are simplified representations of more
complex circuits which will be explained In detail later.
In the Block Diagram of the Control Circuit the blocks
functions are simple. The Switch, Trigger Pulse, Flip Flop,
and individual Nand gate only serve to start the 2 scanning
sequences of the LEL array. This individual Nand gate serves
to pass square wave pulses to a series of counters. When
"on" it passes a reversed square wave at T compared to the
square wave input at P. When the Nand is"off"
no pulses
pass.
The pulses that the Nand gate passes come from 2 clocks
used only one at a time that control the frequency of the
counters thereby the rate at which the LEDs are scanned.
The high frequency clock is used to scan through the array
very fast to simulate an"instantaneous"
scon. The low
frequency clock is used to scan tho array .'it spif
IZ
will detect camera motion.
The cluster of 3 Nands outlined serves as a device
which allows the pulses of only one clock to pass at any
one time. It can then be controlled to switch over to pass
the pulses of the other clock. Using the output F of the
row Einary Counter and the Inverter between AA and AA.
The clustered Nands are controlled to pass 64 pulses from
the high frequency clock first to scan the array at high
speed and then to switch over and pass 64 pulses of the low
frequency clock to scan the array at low speed.
The clock pulses passed by the individual Nand gate
are turned into signals that turn on the LEDs in the correct
order. A Binary Counter converts the pulses into a binary
representation of 0-7 or 8 counts which is then input into
a Binary to Decimal Converter. This converter has 8 outputs
which are turned on one at a time in a sequence through
all 8 which corresponds to the binary code input from the
Binary Counter. Once this system has counted through 8
counts it starts over again if the clock pulses continue
ot arrive. This ouput A is used to switch on the column
transistors in sequence.
Once the column Binary Counter goes through its count
of 8 a signal from its Most Significant Eit (MSB) output
increments a similar system of counters which control the
row transistors.
A row Biliary Counter and a ""inary to Decimal Converter
(along with an Inverter to be explained later) turns onone-
row transistor at a time un. til it has hod a chance to p-'Ss
/3
through all 8 rows once. Once all the rows have been trig
gered the signal is sent to switch the clocks and the array
is scanned for the second time.
After the second scan is complete a Reset Pulse is
generated &nd sent back to the reset (R) input of the Flip
Flop which in turn shuts off the clock pulses at the Nand
gate.
While the row and column transistors control which
LED is to be lit at any one time a final groundingtran-
sis tor controls the much smaller time that the LED is
actually on. A Delay and Pulse V/idth Timer is used to con
trol the grounding transistor's on : time (output C) which
is delayed a small amount into the clock cycle. This
delay allows all the other devices in the circuit and
the transistors to achieve a stable level before actually
flashing the LED. The input of this timer (T) is the
clock pulse emerging from the Individual Nand gate.
Before analyzing the circuit, it is necessary to under
stand a little about digital terminology. We are only
concerned with"high"
and"low"
signals which are either
close to the voltage of the supply or to ground respectively.
A pulse is usually taken to mean a voltage that sharply rises
and falls from a"low" level to a
"high"level and back. A
negative pulse is the reverse of this.
As mentioned before, the blocks in the Ploek Diagram
represent more detailed circuits usually made of integrated
circuits (ICs) and discrete components (resistors, capacitors,
etc.). A long explanation of e:;ch TC*:: mahe up will not be
II
given here since it would be quite long and it can be con-
viently found in any digital or linear (for 555 only) data
book (copies shown in Appendix).
Going back to the beginning, the activation of the
whole circuit starts with the switch. This switch can be
either the camera X sync, or a manually triggered switch.
This switch is closed to start the double sequence of the
array. It causes point A to be pulled to the voltage of
the supply instead of its normal ground level maintained
by a 1K ohm resistor connected to ground.
A Trigger Pulse divice is used only to clean up the
messy switching action of any mechanical switch. No mech
anical switch can be guaranteed to switch on cleanly without
bouncing up and down a few times causing multiple signals.
The output of this device is a single negative pulse to the
Flip Flop.
The Trigger Pulse is a
monostable multivibrator usually
numbered as 74121. Figure 4orpuT
q .
TT
shows the complete circuit
which uses what is called the
Schmitt-trigger input (pin 5)
of the IC. This is the best
input for a switch that may not
have a sharp "on". "he output
(pin 1 ) is normally at a high
level until the input voltage
goes high at which point it
74 121
Figure
/S"
puts out a low signal for a length of time controlled by
the capacitor between pins 10 and 11 and then returns high.
A 100pf capacitor gives a pulse time of about 3 microseconds.
The R S Flip Flop used has two outputs, Q and (J which
are the opposite of each other. Q is the output used here.
It starts out low with bith inputs (R and S) at a high level.
It sv/itches to a high level
output when a negative pulse
arrives at S (set) from the.
74121. Q returns low when a
negative pulse arrives at R
(reset) from the Reset Pulse
device.
A Flip Flop consists of
tv/o Nand gates connected in
the manner shown in Figure 5.
+&V. o
reset
n
o
tT
i 2
5 df< 6
x4l
n
/op
t
r-63 U 3 ]/?fl
Lc n //p
CLOCK fiVUe
--
output
1H00
Figure 6
Figure 5
A package of 4 Nand gates
is used to cover both the job
of the Flip Flop and the in
dividual Nand gate. This Quad
2-input positive Nand gate
(7400) is shown in Figure 6
connected so as to do both.
Pin 5 is the input f-c::: the
74121 trigger, pin '. is the
reset ^Zze input from the
Reset Nulce device shown later
The clock pulse is 'npat into
li
pin 10 and the inverted pulse is output from pin 8. Pins
12 and 13 are tied together to be used as the inverter,
which is located between AA and AA, whose output is pin 11.
The frequency controlling
clocks 555 timers in a cir
cuit such as that in Figure 7.
A steady DC voltage input of
about 5v. results in a square
wave output of a frequency
controlled by the values of R,
R, , and R and C, where R rep-
d'
c' r
555 Timer
Figure 7
resents resistor and C represents
capacitor.
The timing of either clock is calculated by the follow
ing formulas.
Time of high level output =.685(RQ+R-,+R)C
Time of low level output =
.685(C)Rb
Frequency = 1 .46/( (Ra+Rc+2Rb)C )
where: 1K ohms ^ R, 5M ohms
The values selected for the low frequency clock v/ere
as follows:
C =. 1 microfarads
R,= 18Kb
R = 560K variable resistor
a
R = 12Nc
This results in a frequency that can be varied from
about 20-250 cycles/ second.
n
The values selected for the components of the high
frequency clock were as follows:
C =. 1 microfarads
Rb= 390 ohms
R* = 10K ohms variable resistora
R = 680 ohmsc
This results in a frequency range of about 1250-9000
cycles/second.
The cluster of 3 Nand gates pass first the pulses of
the high frequency clock and then switches over to the low
frequency clock. One input of each of the left 2 Nand gates
is connected to opposite sides of an inverter. The other
side of each Nand gate is connected to one of the two clocks.
Since only one of the connections (AA and AA) to the Nands
can be high at anyone time, only one clock pulse gets past
and is inverted. The other
Nand sends out a high thereby
allowing the final Nand to pass rt i I1U'
fifl*....- Ha 'J 6
the clock signal re-inverted.
+Sv
Reversing the input to the
inverter switches control to
the other clock.
Figure 8 shows a Quad
2-input Positive Nand gate
connected so as to perform the
task in the outlined box.
PINS l X
FRST CUCK3
O Q tf
,.*_ SlOU CLOCK
70 1H00
PtH 10
7400
Figure 8
'-Tit T-i n ar v Counter (749a) ie the IC whici coi
ailse (see Figure 9 for complete circuit) i.iC CSC.-. i'ui
'e'
/sr
+S
count D c p
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
7493
Figure 9 Figure 9A
from the Nand gate is counted when input into pin 1. A
binary representation is output onto 4 output pins, of
which, we only need 3> since these pins (B;pin 9, C;pin 8,
D;pin 11) can give us the binary representation of 0-7
or 8 seperate counts. The output can be seen in Figure 9A.
The output of D Is called the most significant bit (MSE)
since it is low for 0-3 and high for 4-7 counts. A con
nection from the MSB can be used to increment the row
counter one count if it comes from the column counter
( The MSB will trigger the row counter on the negative edge
or when the count goes from 7 back to 0.) An output is
taken from the MSE of the row counter and is used to switch
the clocks by connecting pin 11 to pin 14 and connecting
pin 1 2 to the reset pulse timer and to the AA side of the
Inverter.
The binary to Decimal Converter is actually a PCD to
Decimal Decoder (7-42) Ic in a circuit sue}; os that in
rr 10. It is a device that siraly coi.vcr': a binor-;T -
If
7112
Figure 10
count to a decimal count. The
three inputs connect directly
to the 7493 mentioned above.
Pins 1 through 7 and 9 are the
outputs for a 0-7 count. Their
output is normally high except
for the pin that is presently
being pulled low. In other
words, one pin at a time is
drawn low in sequence. The
outputs of the 74 42 for columns were hooked through
resistors to the base of each PNP transistor v/hich is
normally off when the signal is high and on v/hen pulled
low (at least .7 volts below the high level). The 7442 row
outputs are run into the inputs of 2 Hex Inverters (2 are
used since 1 only has 6 inverters and 8 are needed) which
simply turns a high signal into low and a low into a high.
The outputs of the Hex Inverters are run through resistors
to the base of the NPN transistors controlling the rows.
These transistors are normally off at low level and on at
high level.
The LED on time is controlled by the Delay and Pulse
V/idth Timer as mentioned before. Figure 11 shows the cir
cuit with a Petriggerable Nonostable Multivibrator with
clear (74123 ) v/hich can give a very short poise which e tarts
after a delay from v/hen the input pulse arrives. Tse input
pulse is the clock pulse from tne individual "and gnlc wL oi:
goes in at pin 1. Tine delayed, but fast, output pulse comes
zo
out pin 5. The pulse width
and delay are both controlled
by the resistors R and R, .
a_
b
The time of the pulse
width and.thetime of the
delay width can be calculated
from the following formulas:
INPUT*
7V/23
IK
^OUTPUT
, o/-,f_jc S
Sir
-ri
/
I
3
VS"
I
1
U
/$&
IO
j
//1
f f/oJl
[Cf \
* *IOOH
Figure 1 1
Time of pulse width or delay =
.32RC( 1+.7/R)
where: R = R = R,a b
C =.01 microfarads
^a=
R-3= 100K ohm variable resistors were used.
This gives the delay and pulse v/idth ranges of about
2 x10~5
to 3 x10~4
seconds.
The final circuit to cover
is the Reset Pulse clock which
is another 74123 shown in Fig
ure 12 modified to a different
purpose. Pin 1 is the input
from pin 12 of the row counter.
When the array has been sequenced
twice the input drops from high
to low and a negative pulse will
emerge from pin 4 v/hich is used
to turn off tine Flip Plop. Its
duration is about 100 nanose cc r.ds
*5V
o
c tit
4output ts <2i
tc - Jt y ">-
1
m
/JO 19pf
7i/iZ
Fifiure -
21
A 250 microfarad electrolytic and a .01 microfarad
mylar capacitor were connected from the voltage supply to
ground to control gliches similar to that used in the
Driver Circuit Board. Four .01 microfarad capacitors were
also put in the circuit adjacent to individual ICs across
their 5 volt and ground connections for further control
of stray signals.
A detailed diagram of the v/hole Control Circuit Board
is shown in Appendix V.
MOUNTING FOR LEDS
The LEDs are mounted on a wooden mount such as that
shov/n in Appendix I&. The LEDs are spaced 8cm apart so as
to allow enough distance between images of dots so that the
motion effected dot at any one location won't be confused
with that dot of an adjacent location. This rig is self-
standing and can be used on any table. The base has cross
members spaced so as to allow mounting space for the circuits,
The LEDs are supplied with a clear plastic mount which
is designed to hold the LED in a i inch hole 1/8 inches
deep. The mount shown in
Figure 13 is typical of that
used. It has a retaining ring
that clamps both tine LED into
the mount and the mount into
the board. It was necessary
to color the front end of the
mounts black with a permanent
stray light to the image.
vrr
ty
fRONT RBftR
17: gu re 1)
marker so that it didn't add
7X
POWER SUPPLY SELECTION
At this time a specific power supply has not been
selected to power the LEDs and the control circuits. A
power supply was borrowed for testing purposes. All that
is needed. is a supply that is of good quality (lab grade).
The type needed is one that delivers 5 volts at at least
1 ampere and is regulated. These cost anywhere from 50
to 100 dollars. If modifications are made in the LEDs used
and higher currents are used it might be wise to use two
seperate supplies, one for the LEDs and one for the Control
Circuit, to keep stray signals from feeding back from the
LEDs to the Control Circuit.
X--
SAMPLE TESTING OF THE ARRAY
The array was tested by photographing it with a
popular SLR camera. Pictures were taken by standing in
front of the array at a distance of 5 meters. The camera
was hand held. The exposure was made with the room lights
at a very low level. The camera shutter was operated on
the bulb setting, being held open by the holder while
another person manually triggered the array. Once the scan
ning was complete the shutter was closed.
In the particular test performed the fast clock was
cycled at a rate of 8000 cycles/second which means that
the whole array was scanned in a time of 1/125 of a second.
This is a fast enough time in a normally exposed picture
to yield a sharp image, an image relatively free of camera
motion. The slow clock was cycled at a rate of 50 cycles/
second which v/ould scan the whole array in about 1.28 sec.
The film used was 35mm Tri-X since it has a high
sensitivity in the red end of the spectrum good for use with
the yellow LEDs used.
The film was processed in a reel developing tank in
D-72, 1:1, at 68 degrees Fahrenheit for 2 minutes. The
film v/as then fixed, washed, and dryed in a normal fashion.
The images were placed in an enlarger and enlarged orDo
a fine grid. Horizontal and Vertical (>:,'.') displacements
of each LED flash with respect to its steady matrix flash
were made and recorded. Appendix VIII is a lis4ing ef tho
coordinates. Tae grid magnification was such that. 85 div
isions on the grid equalled5' cm displacement on the origa.ai
sy
array- One division is therefore equal to a displacement
of ,66cm on the original array. The magnitude of the
displacement was calculated from the Pythagorean theorem.
y2 2x + Y
The magnitude was also listed in Appendix VIII. It
was also plotted against time (or LED number) in Appendix
VII.
The results show a complicated function which to be of
use should be broken down into individual component frequen
cies, but this requires more samples and some computer
analysis. It is only the intention of this project to
demonstrate that the device does work.
For a rough calculation, the graph shows that the
image has strayed about an average of .4 units per 1/50th
of a second. This is equivalent to an angular motion of
about .03degrees per l/50th of a second as calculated by
the following formulas.
1Angle = (displacement/ target distance)
=
Tan-1
((.4 x ,66)/500)
=.03
degrees =.0005 radians
2S
RECOMMENDATIONS FOR FUTURE USE
1) This device should be used to test different people
and camera systems of different. weights or focal lengths,
This collection of data should be reduced by computer
by methods of auto-correlation or such to find what
the components of vibration are. Do people usually
vibrate at specific frequencies?
2) The LEDs should be masked down to a smaller size to
yield finer images on the film for more accurate
measurements.'
3) The fast clock speed should be increased to insure no
motion occurs during the first scan.
4) Some experiments should be done by triggering the array
with the camera to study mirror and/or shutter effects.
5) The switching of the first LED should be adjusted to
keep it from mistaking no signal for a 0,0 signal which
causes it to glow when the array is not being sequenced.
note: presently, a dead LED is in this position.
ftPPZNPIX X
2N2374
PNP &
820
OHMS
> 2N2374
PNP
1K OHMS
820
OHMS
2N2374
PNP
6 OHMS +5v.
o
o
o
1K OHMS
TO OUTPUTS OF COL. COUNTER
820
OHMS
1K OHMS+ 5v.
;&/
2N3053NPN 3^
2N3053NPN Ja^
2N3053NPN
ROW COUNTER
AAA/ o
330
OHMS
ROW COUNTER
V\A/ o
330
OHMS
'2h^ROW COUNTER
AAAr
330
OHMS
DRIVER CIRCUIT FOR LED ARRAY
MONSANTO LED MV5154
2N3053NPN
TO PULSE WIDTH TIMER
220
OHMS
GROUND
note: symbolizes connection
tt co
o
m
ca
cn
a
p
Hi
tio
> pin ^+ ci>
PQ o
resistors :
capacitors :
transistors:
APPENDIX III
Component Values
R1 6
R10-17 = 1K
R18-25 = 820
R26-33 = 330
R34 220
C1 250mf
C2 .01mf
Q1-8 = PNP 2N2374
y max. current
gain: 100-175 ,150 xyp.
Q1 1-18, 21 = NPN 2N3053
.7 max. current
gain: 100-175 ,150 typ.
o
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PiEH
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P
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pM ptt ttEH
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^h pq pi<$ P co Eh pqP fe P P Stt <JJ tt H H
P tt 3= en
/"L.
' -
rrt <I1 8
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tt EH C
y p- ttpq p o
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<_ /
5H
^
pi>-i pqtt en
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gptt
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tt
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pi
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Resistors:
Capacitors
APPENDIX VI
Component Values
R1 = 1K
R2 = 56OK vari.able
R3 = 12K
R4 =
18K"
R5 = 1K
R6 = 10K
R7 - 1K
R8 = 100K vari.able
R12 == 10K vari.able
R13 := 680
R14 =-
390
R15 =- 1K
R16 == 100K variable
C1 =.01mf
C2 =.01mf
C3 =.01mf
C4 =.01mf
C5 =.01mf
C6 = 250mf
C7 = 100pf
C8 =. 1mf
C9 =.1mf
C10 == 10pf
C1 1 ==.01mf
C 1 ?-
=
APPENDIX VIII
Data
Calibration: 56 cm = 85 divisions
LED # Coordinates Magnitude LED // Coordinates Magnitude
1 > 33 3.0,-3.8 4.84
2 0,0 0 34 2.8,-3.5 4.43
3 0,0 0 35 2.7,-3.4 4.34
4 0,0 0 36 2.5,-3.8 4.55
5 -.2, .2 .28 37 2.3,-4.4 4.96
6 -.4, .4 .57 38 2.2,-4.5 5.01
7 -.8,0 .8 39 2.0,-4.2 4.65
8 -1.2, -.3 1.24 40 2.2,-4.3 4.83
9 -1.5, -.3 1.53 41 2.5,-4.3 4.97
10 -1.2, -.5 1.30 42 2.5,-4.2 4.89
11 -.7,-1.0 1.22 43 2.3,-4.1 4.70
12 -.4,-1.1 1.17 44 2.5,-4.0 4.72
13 -.4,-1.0 1.08 45 2.6,-4. 1 4.85
14 -.3, --9 .95 46 2.8,-4.2 5.05
15 .1,-1.51.50 47 2.8,-4.3 5.13
16 .3,-2.7 2.72 482.5,-4.0-'
4.72
17 .3,-3.33.31 49 2.4,-3.6 4.33
18 0,-4.0 4.0 50 2.4,-3.0 3.84
19 .3,-4.0 4.01 51 2.7,-2.9 3.96
20 1.0,-3.6 3.74 52 2.8,-3. 1 4.17
21 1.2,-3.8 3.98 53 2.4,-3.3 4.08
22 1.4,-4.5 4.71 54 1.7,-3.3 3.71
23 1.7,-4.5 4.81 55 1.3,-3.3 3.55
24 2.3,-4.2 4.79 56 1.1,-3.5 3.67
25 2.5,-4.4 5.06 57 1.0,-3.3 3 .4 5
26 2.5,-4.0 4.72 58 Q _-Z O 3.8".
27 2.4,-3.6 4.33 59 .4,-4.1 L. '2
28 2.3,-3.6 4.27 60 .3,-4.4 4 .- 1
29 2.1,-3. 5, 4.08 61 .5,-4.3 4.33
30 2.0,-3M 3-77 62 p _ / ,t
, : . -iL.L 7
31 2.2,-3.5 4.13 63 .7,-4.6
/ (2- TL
7 O 2.6,-3.6 4.44 641 J Qi,~
<i O 4. M
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J
.0 0
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0
0
0 0 0 ~ 00'
-Hsk i0 0 0 0 ol
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ftX)0
lo 0 0 i :o-*-o 0 0 01
s 1CO O j
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MV5153,MV5154,MV5253,MV5254,MV5353,MV5354
ELECTRO-OPTICAL CHARACTERISTICS
PARAMETER TEST COND. UNITS MV5153 MV5154 MV5253 MV5254 MV5353 MV5354
Forward voltage (VF) 20 mA V
Typ.nJ / 2.0 2.0 2.2 2.2 2.1 2.1
Max. 3.0 3.0 3.0 3.0 3.0 3.0
Luminous intensity(see Note 1) /Typ. 20 mA / med 4.0 1.5 3.0 6.0 10.0
Peak wave length 20 mA / nm 635 635 565 565 585 585
Spectral line 20 mA nm 45 45 35 35 35 35
Half width
Capacitance
Typ.
lR= 100/jA*- <-
45 45 45 45 45 45
Reverse voltage (VR)
Min. V 5 5 5 5 5 5
Typ. V 25 25 25 25 25 25
Reverse current (lR) VR= 5.0V
Max. juA 100 100 100 100 100 100
Typ. nA 20 20 20 20 20 20
Viewing angle (total) See Fig. 3 & 4 degrees 65 24 65 24 65 24
TYPICAL ELECTRO-OPTICAL CHARACTERISTIC CURVES(25 C Free Air Temperature
Unless Otherwise Specified)
100%
r*
!. SO-,
D
O 60%
>
H
K
20*.
/ \
YE I LOW
ijREE.
A3ra,\CE
J
f
w 1
/ V \/ A \/
' \ \<t
100%
90-=
SO.
70-,
XXVVr60-.
yf^%ty&yy,
FORWAROVOLTAGE (V,l VOLT3 CI063
Fig. 1. Forward Current vs.
Forward Voltage
520 540 560 580 600 620 6^0 660 680
WAVELENGTH IM - nm C106J
Fig. 2. Spectral Response
50-. JO-. 30*. IO". !&- 0
Fig. 3. Spatial Distribution (Note 2)
(MV5353, MV5253, MV5 153)
0 10 20
too*.
90 .
80-.
70.
9yyyc *>/60-
7
LvvOk
50 . 40'. 30'. 2IX IO*. 0
Fig. 4. Spatial Distribution (Note 2)
(MV5354, MV5254, MV5154)
- 280 DIA.
I-.2S0DIA.'
I
I y =2 1.265
025
I ,
n
'/
A'/, y-.310 OIA '
\
A F
NOTES TOLERANCE 010
MATERIAL CLEAR POLYPRO OR EQUIVALENT
FOR MOUNTING DRILL A HOLE
Fig. 5. Mounting Crommet
(supplied on request only)
l 282 OIA ]
SECTION B B
NOTES
/. As measured with a Photo Research Corp. "SPECTRA"
Microcandela Meter (S/N 1015).
2. The 3*es of spatial distribution are typically within a10
cone with reference to the central axis of the device.
3. The leads of the device were immersed in molten solder, at 26(fC, to a point 1/16 inch from the body of the device'
per MIL-S-750..
-i-,.-.
*:-"*
-
wv , x - -r-* "(Tvy*-.
JYMin ."fA
spc citicaii ::_. SI.'BJfc'C r TO CHANCE LITHO IN U.C A. IONIAN IO COMI'ANY 20MB M
MV5152, MV5252, MV5352, MV5752
ELECTRO-OPTICAL CHARACTERISTICS
PARAMETER TEST COND. UNITS MV5152 MV5252 MV5352 MV5752
Forward voltage (VF) 20 mA V
Typ. 2.0 2.2 2.1 2.0
Max. 3.0 3.0 3.0 3.0
Luminous intensity(see Note 1)Typ. 20 mA med 40.0 15.0 45.0 40.0
Peak wave length 20 mA nm 635 565 585 635
Spectral line 20 mA nm 45 35 35 45
Half width
Capacitance
Typ. V = 0 pF 45 45 45 45
Reverse voltage (VR) lR= 100 /iA
Min. V 5 5 5 5
Typ. V 25 25 25 25
Reverse current (lR) VR= 5.0 V
Max. JUA 100 100 100 100
Typ. nA 20 20 20 20
Viewing angle (total) See Fig. 3 & 4 degrees 28 28 28 28
TYPICAL ELECTRO-OPTICAL CHARACTERISTIC CURVES
(25C Free Air Temperature Unless Otherwise Specified)
1MV5152
i'
f
MVS352
j
ft/-MWm
JA
1 1YELLOW
3REEn/"\|/\
l\RAN ,-c
-\
A
y\
V1 T \
\ A \/ ) \
\V
5
IV5352 j
/,
7/? VST52
V5I52t.
fV
////
/MV ?52
C-1 --
11 4 1.6 18 20 22 24 26 28 30
FORWARD VOLTAGE IV 'I- VOLTS C1063A
Fig. U Forward Current vs.
Forward Voltage
520 S40 560 580 600 620 W0 660 680
WAVELENGTH (X) - run C106*
Fig. 2. Spectral Response
FORWARD CURRENT llFl - mA C11BO
Fig. 3. Brightness vs.
Forward Current
trio* 20"
100%
90%
SO%
70%
60%
itJ?V2
50% 4tf* i?* 2<?% 10% 0
Fig. 4. Spatial Distribution (Note 2)
(MV5352. MV5252, MV5152, MVo752)
NOTES TOLERANCE *010"
( 2Wmm|
MATERIAL POLYPRO OR EQUIVALENT
FOR MOUNTING DRILL A (6 3S"-ml HOLS
U 782"
+-4
(? I&rj-i| D1A360"
(9 14mmDlA.
~T165"
(4 19nvn|
_1
TWO PIECE POP IN
Fig. S. Mounting Grommet
(supplied on request only)
NOTES
/. As measured with a PhotoResearch Corp.
"SPECTRA"
Microcandela Meter (S/N 1015).
2. Th axes of spatialdistribution are typically within a
10
cone with reference to the central axis of the device.
3. Th* leads of the device were immersed inmolten solder, at
230
C, to a point 1/15 inch from the body of the device
perMIL-S-750.
lW|'-.j.
SPLCincAi
miMSsui-
ct to r.u- LITHO I TJ U '".A. .AN IO COMPANY t '.t U.i,
a
A^W^S:
SOLID
STATE
LAMPS
titling.&*+&*.:
orange MV5153 MV5154)
green MV5253 MV5254-! J-. t
yellow MV5353 MV5354-
$
PRODUCT DESCRIPTION
These solid state indicators offer a variety of lens effects and color availability. The orange and yellow devices are made
with gallium arsenide phosphide, and the green units are made with gallium phosphide. All are encapsulated in epoxy
lenses.
PACKAGE DIMENSIONS
FLAT DENOTES
CATHODE
(1.91mm) MAX
0.50"
(12.7mm)
(,051mm)
(SQUASE)
(2.54mm)
TOLERANCES.010"
(.254 mm)
FEATURES
Low cost
High intensity light source with, various lens
effects.
Orange, green, and yellow colors available. (See
MV5050 series for red sources.)
Versatile mounting on P.C. board or panel
Snap in clip available on request
Longlife
solid state reliability
Low power requirements
Compact, rugged, lightweight
High efficiency
= Ultra high brightness
ABSOLUTE MAXIMUM RATINGSv
Y,;:7
Maximum power dissipation @ 25 C ambient 105 mVV
Derate linearly from 25C .
1-14 mW/QC
Maximum storage and operating temperatures-55 C to 100 C
Maximum lead solder time @ 260C (see Note 3) 5 sec
Maximum currents and voltages
Continuous forward current @ 25 C .35 mA
Continuous forward current @ 100 C 10 rnA
Peak forward current (1 psec pulse, 0.1% duty cycle) 5.0 A
Reverse voltage 5.0 V
PHYSICAL CHARACTERISTICS
TYPE
MVS153
MV5154
MV5253
MV-j;'54
MVr-353
ViVM54
source
COLOR
Orange
Oronge
Green
Green
Yellow
Yellow
CIRCUIT
LENS LENS POP-IN BOARD
COLOR EFFECT MOUNTING MOUNTING
Orange diffused Wide beam X X
Orjnqe diffused Nairow beam X X
Green diffused Wide be.im X X
Green diffused Norrow beam X X
Yellow diffused Wide beam X X
Yellow diffused Noriovv bojm X X
SOLIDi P'/ J )
J^^^'
l/f^^Z^'ft**** hi'yi-^r --,*
\Wvi>ralw(3 :
STATE
4 LAMPS
ORANGE
GREEN
YELLOW
MV5152 :
MV5252 .0
MV5352fI
IMPROVED RED MV57o2 !
A*i6m*hmU&t.mttiitetfr*i^w>Aas*Jj*AiAnifrl^irfturttf"
tfaw'h i iraii iiiiiifooAiH*5irii^ iWto*.-->- -f .- < rWra8*^^*W*&bJij^'**uijtt^i^c^^j^lj^yjiUtoAWMfiwau%LJt^t^4^j^-h-
,-
%-**rlJ*JS-j
PRODUCT DESCRIPTION
These solid state indicators offer high brightness and color availability. The orange, red, and yellow devices are made
with gallium arsenide phosphide, and the green units are made with gallium phosphide. All are encapsulated in epoxy
lenses.
PACKAGE DIMENSIONS
FLAT DENOTES
CATHODE
0.50"
(12.7mm)
TOLERKCESi.010"
I.2S4 mm)
FEATURES
Low cost
Ultra high intensity light sources
Orange, green, yellow, and red colors available.
(See MV5050 series for other red sources.)
Versatile mounting on P.C. board or panel
Snap in clip available on request
Long'lifesolid state reliability
Low power requirements
Compact, rugged, lightweight
High efficiency
ABSOLUTE MAXIMUM RATINGS
Maximum power dissipation @> 25 C ambient 105 mW
Derate linearly from 25C 1.14 mW/C
Maximum storage temperature -550C to1 c
Maximum operating temperature-55 C to 100 C
Maximum lead solder time @ 230C (see Note 3) 5 sec
Maximum currents and voltages
Continuous forward current @ 25 C 35 mA
Continuous forward current @ 100 C 10 mA
Peak forward current (1 ptsec pulse, 0.1% duty cycle) 5.0 A
Reverse voltage 5.0 V
PHYSICAL CHARACTERISTICS
TYPE
MV5152
MV5252
MV5352
MV5 7 52
SOURCE
COLOR
Orange
Gicen
Yellow
Orange
,S
CIRCUIT
LENS LENS POP-IN ROARD
COLOR EFFECT MOUNTING MOUNTING
Clear orange Narrow beam; point source X X
Clear green N.irrow beam; point source / X X
Clear yellow Nanow bo jm ; point source X X
Clc-.ir red Narrow be.irii; point source X X
: *
to "* "in
y ri
< ?
/
^., P- fi t 41* f
., |*l I,-.'tj
ft.
n
GROUND [T
trigger rr
output nr
RESET |_4_
V
\
ZI vccM _
~7] DISCHARGE
~C~] THRESHOLD
s] CONTROL VOLTAGE
V/
NC [T
NC[T
GROUND [F
TRIGGER
IT"
OUTPUT [IT
RESET
|T"
NC|T\
\
X
TT] ncs
TLT| nc
IH vcc
TT] DISCHARGE
To] THRESHOLD
TJ CONTROL VOLTAGE 1
T] NC
*V
14 PIN HERMETIC DIP
GROUND rr) (7^ I DISCHARGE
TRIGGER^? J) THRESHOLD
OUTPUT
i
(T) _f5
RESET
}CONTROL VOLT
\TO 99
\ FIG.
V
1-PIN CONNECTIONS
for Ihe 555 timer.
PIN CONNECTIONS (TOP V1EWI
^
Lit Lts'53 Ua Qi
re
T/)/s series of articles will describe the operation of the
555 andpresent various applications including
automotive, photographic and test equipment, among other,
FOR SEVERAL YEARS, IT APPEARED THAT THE
709 op-amp would remain unsurpassed
as the most useful and versatile integrated
circuit; especially for electronics hobbyists. Now, it looks like that honor may
have passed to the 555 family of timers.
Basically, the 555 timer is a highlystable integrated circuit capable of func
tioning as an accurate time-delay gen
erator and as a free-running multivibra
tor. When used as an oscillator, the fre
quency and duty cycle are accurately
controlled by two external resistors and
a capacitor. This device originated with
Signetics and is now available from such
manufacturers as Exar, Motorola, Na
tional, RCA, Raytheon, Telcdyne and
Texas Instruments. The typical data sheet
for this device lists the following features:
Timing from microseconds to
hours
o Monostable and astable opera
tion
Adjustable duty cycle
Output compatible with CMOS,
DTL and TTL (when used
with a 5-volt supply)
High-current output can sink or
source 200 mA
Trigger and reset inputs are
logic compatible
Oulput can be operated nor
mally off
Precision timing
Time-dc-l:iy generation
Sequential timingPulse generation
Pulao shaping
w
o
2
occ1
o ApplicatUJ
0_1
m
6o
<cc
by ROBERT F. SCOTT
TECHNICAL EDITOR
Pulse-position modulation
Pulse-width modulation
Clock generation
Missing-pulse detection
Appliance timing
Frequency division
o Voltage-to-frequency conver
sion
Linear sweep generation
We will examine the make-up and op
eration of the 555 family and then we
will see how the various features and
applications can be developed into prac
tical circuits you can use in the home,
car, lab and service bench.
The 555 is available in 8- and 14-pin
DIP packages and in a circular TO-99
metal can with eight leads. The base con
nections are shown in Fig. 1. The device'
is available from most makers in at least
two grades. The precision type gener
ally maintains its essential characteristics
over a range of C to C
while the general-purpose type operates
reliably only over a range of0"
C to
70
C. Type numbers for the precision
and general-purpose types are as follows
(the piecision types are listed first):
SK555 /NF.555 (Intersil and Signetics),
KM555/R055 (Raytheon), MC1555/
MC 14555 (Motorola). 1 M555/I.M555C
(National). SN52555 SN72555 Clevis
Instruments) and C A555/CA555C
(RCA).
(Many of the manufacturers listed also
offer the 556 which is basically two 555's
in a single package. Most dual timers f.''556'"
in the type number. An except
is the D555 for dual 555 made
Telcdyne. There are several quad tin
available. Both dual and quad types r;
have specific limitations that do not apto the 555. More about this later.
How the 555 operates
A functional block diagram of the 5
as a monostable timer is shown in F
2 and the equivalent schematic of the
is shown in Fig. 3. Timing is deterr.iir,
by external components U, and Ct. '1
IC timer consists of a flip-flop, a hi;.-
current output stage, discharge and re-
transistors and two comparators. (A cm
ptimior is an op-amp ilia! compares <
input voltage to a reference voltage a-
imlicales whether ihe input is higher ,
loner than the reference potential. Wh.
the input swings slightly ahote the n
erence value, the op-amp's output swin
into saturation. Al the instant thai t,
input drops below tin reference lev.the op-amps output swing* into revers
saturation. The output chnng, s slate wh,
the input ii-.es above o: diops below ll:
reference voltage level by only u few hit;ill fit microvolts.)
Ihe relerence voltages foi ihe two con-
paralois inside the55"
aie de. elope
across a voltage divider consisting o
three 5K resistors. 1 lie threshold cm;
paiator is referenced at ?. t V.. and th
trigger cornp irator is referenced at'
V,,. Ihe tuo comparators conirol lh
flip-Hop. which, in turn, controls the st-,i.
of Ihe oulput. When the timer is in th.
-te.-jif1'5;v'
<>o-
RT |
6 1
- R > 5K
LL^M^
I VTHii *
1 1 O-
"f
THRESHOLD
COMPARATOR
5K
CT
TRIGGER
COMPARATOR
1)& Q1
REF
I CONTROL
VOLTAGE
FLIP-.
FLOP
o
TRIGGER
'Rl :
OUTPUT
STAGE
RESET
OUTPUT
J
2-FUNCTIONAL block diagram.
THRESHOLD
'yy
: RESET o
i(7>DISCHARGE ?
. -;. . . j I -va
-555 TIMER schematic diagram.
cent state, internal transistor Ql is
Jcting so it represents a short circuit
s timing capacitor CT. The level of
utput terminal is low.
most practical circuits, the voltage
n 2 is held above the trigger point
resistor connected to V,t.. When a
ive-going trigger pulse on pin 2
s the potential at this point to fall
Vs V,,, the trigger comparator
les the flip-flop, cutting olT Ql and
ig the output level high to a value
Or below V,,.
Otfilor Ci- now starts to charge and
i/orfific across it rises exponentially
f. leaches -A V,.. At this point the
told comparator resets the Hip-flophe output returns to its low state
just slightly above ground. Transistor Ql
is turned on, discharging Ct so that it
is ready for the next timing period. Once
triggered, the circuit cannot respond to
additional triggering until the timed in
terval has elapsed.
Figure 4 shows the waveforms associ
ated with the 555 when operated as a
monostable timer. The delay period the
time lh;.t.lhe output is high- in seconds
is l.IRiCi, where R is in ohms and C is
in farads. Figure 5 shows how delays run
ning from 10 microseconds to 10 seconds
can be obtained by select ing appropriate
values of d- and RT in Ihe range of .001
to 100 F and IK lo 10 megohms. In
practice. Rr should not exceed 20 meg
ohms. When you use an electrolyticca-
1
pacitor for Cr, select a unit for low leak
age. The time delay may have lo be
adjusted by varying the value of Rr to
compensate for the very wide tolerance
of electrolytics.
J.1KI
Cr
= C).0 ^ RL= IK
II IIl"
OLTAGE
,r
OUTPUT VOLTAGE
A / A_v
r/ / 7
_ (
CAPACITOR VOLTAGE
TIME-0.1 ms/DIV
FIG. 4-555 TIMER WAVEFORMS when it is
operated as a monostable.
100
a. 10
m
<)Tr 1 0<y-
CJ 01<a.
<0.01
0.001
i/ \// A/ / ,/
A- s
&/ <py Jy.Sy*>
'
//
/ // /
Z /L Z10 100 1.0ps fis ms
TIME DELAY (s)
10
ms
100
ms
1.0 10 TOO
FIG. 5-DELAY TIMES for different values of
capacitors and resistors.
Note that the 555, unlike most RC tim
ers, provides a timed interval that is
virtually indepedent of supply voltage
Vcc. This is because the charge rate of
Ct and the reference voltage to the thresh
old comparator are both directly piopor-
tional to the supply voltage. Operatingvoltage can range from 4.5 volts to a
maximum of 18 volts for premium timers
and 16 volts for general-purpose types.
Feeding the load
We have seen how the timed interval
or delay is obtained. Nowlets'
see how
we can use it. A look at the output cir
cuit (Q3 and Q4 in Fig. 3) shows it to
be a quasi-complemenlary transformerless
arrangement similar to many audio out
put stages. Furthermore, we know that in
this type of circuit, one side of the load
goes to the emitter-collector junction of
the output transistors and the other side
of the load can be connected to either VC1-
or to ground. The same applies to the
load connected to the 555. Output pulses
developed across load R,. can be obtained
directly from pin 3.
When the load is connected to Vro,a considerable amount of cm rent flows
through the load into terminal 3 when
the oulput is low. Similiarly, when the out
put is high, the current through the load
is quite small. Conditions ale reversed
when the load is lettirned to giound. ln
this case, output current through the load
is maximum when the output potential is
high and minimum when the output is
low. The maximum cur i cut al leiniin.il
3 is 200 mA when it is used as a cut rent
source or a current sink.
J>
m
ro
3J
CZ
>
41
cn
o
oCE1-
OUJ
_l
Ul
6n
<
Driving a relayA relay can
be'
substituted for Rt. in
applications where the delay or timed in
terval is longer than 0.1 second. The
relay should he a DC type wilh a coil
operating at about Vc.., and not drawingmore than 200 mA. Figure 6 shows a
OtlGV
TO
NORMALLY
ON LOAD
TO
NORMALLY
OFF LOAD
FIG. 6-RELAY TIMER showing two optional
connections.
simple manual timer with the two op
tional connections for the relay. With
the R/C values shown, the timing range
is approximately 1 second to 1 minute.
You must be careful when connecting
an inductive load such as a relay to the
output of the 555 or any other solid-state
device. When the current through an in
ductive load is interrupted, the collapsingmagnetc field generates a high reverse
emf (transient voltage) that can damage
the device. The solution to this problem
is to connect a diode (Dl) across the
relay coil so it conducts and absorbs the
transient. Note that the diode must be
connected so it is reverse biased in normal
operation.
Diode D2 must be inserted in series
with the relay coil when it is connected
between the output terminal and ground.
Otherwise, a negative voltage equal to one
diode-junction drop will appear at p'm 3
and cause the timer to latch up.
TriggeringWe stated earlier that in most practi
cal circuits, the trigger terminal is gener
ally returned to VCc through a resistor
of about 22K. However, the simplest
method of triggering a 555 is to momen
tarily ground the terminal. This is OK
as long as the ground is removed before
the end of the timed interval. Thus, if the
device is used in a photo-timer applica
tion, as in Fig. 6, tapping pushbutton
MINIMUM TRIGGER
PULSE WIDTH
150
y> c
^
u ,v.
^
25 .
0 01 0'1 03 01
LOWfSI VOI.1AGF lfvel
OF lKICGI tl HUM IX Vcc)
FIG. 7-TPIGGER PULSF: WIDTH requirement
varies with temperature and Vcc.
I'
It':.SI is sufficient to trigger the circuit and
start the timer.
In many applications, the 555 must
be triggered by a pulse. The amplitude
and minimum pulse width required for
triggering are dependent on temperature
and supply voltage. Generally, the cur
rent required for triggering is about 0.5
pA for a period of 0.1 us. Triggering-
voltage ranges from 1.67 volts when Vcc
is 5 volts to 5 volts when V.c is 15 volts.
Figure 7 shows how trigger pulse width is
related to temperature and Vcc
The triggering circuit is quite sensi
tive and can be activated by simply touch
ing the terminal with a finger or bringingyour hand close to a length of wire fast-
/.:.-
Ch'
3 C '/*<:<>i
tage divider is brought out to pin 5Ihe
control terminal. The timing cycle can
be modified by applying a DC control
voltage to pin 5. This permits manual or
electronic remote control of the timed
interval.
The control terminal ir. seldom used
when the timer is operated in the mono-
stable mode and should be grounded
through a 0.01-p.F capacitor to prevent
the timed interval from being affected by
pickup of a stray AC or RF signal.
When the timer is operated as an os
cillator in the astable mode, the generated
signal can be frequency modulated or
pulse-width modulated by applying a vari
able DC control voltage to pin 5. We'll
AUTO.
BATTERY.
-w-
1N4001
DELAY
ADJ
J T< 1 MEG
.001
i
SN52/72555
isi sr.47,iF
'(TAN
<y> </a?
EAOLIGHTS
500S!
12V
HEADLIGHTS
FIG. 8-AUTOMATIC HEADLIGHT turn-off circuit.
10K .
0.1fiF:
1K
-wv-
2-O-
5
L
MC1555
MC1455
6 R>
o- <l
i,if:
X0.01
"F
20
MEG
4.0 A (RMS)
[LOAD}&
MT2
2N6071
OR EQUAL
10V 3.5K
e Wv o-
1N5347 ^OR EQUI
r \rr
V. rP 10pl
250V
-H-
.
c_ 1N4004
ufr ~n OR EQUIV.
o
FIG. 9555 TIMER used in a solid-slate time-delay relay circuit.
eneel to pin 2. Thus, we have the makings
of a crude capacitance relay.
ResettingOnce a timed cycle has been initiated
by a negative-going pulse on pin 2. the
circuit is immune to further triggering
until the cycle has been completed. How
ever, the timed cycle can be interrupted
by grounding the reset terminal (pin 4)
or applying a negative-going reset pulse
to it. The reset pulse causes timing ca
pacitor Cl to be discharged and Ihe out
put to return to its quiescent low state.
Reset voltage is typically 0.7 volt and
reset current is 0.1 mA. When the reset
terminal is not being used, it should be
connected to V,. .
The control terminal
Ihe As \,r point on the internal \ol-
have more on this in the next part of this
series.
Gadgets you can build
There is still quite a bit of practical
technical information you will need to de
sign your own circuits and to take full
advantages of the potential of the 555-
family. We hope to complete the techni
calities in the next issue and get down to
practical circuits you can use. In the
mcanlime. here are a couple of circuits
for you to tiy :
Automatic headlight turn-offanyone
who has stumbled around in a dark gar
ageafter-
leaving his car for the ni;!it
will appreciate this automatic headlight
switch (Fig. S.) that was de
scribed in a Texas Instruments applica
tion note, ll is to be inst died in the car
(eonlini.r-.l on page 102)
42
6l6HETTCtS P-kri-TfiLsy
7Yoo para &ook
2-fKPUT POSITIVE
IAND GATE
S5400-A,F,W * N7400-A.F
DIGITAL 54/74 TTL SERIES
f- K"
/! (: ' ^
*k* ifcjr tl V
"
v;'
v>
SCHEMATIC (each gate) PIN CONFIGURATIONS
NOTE: Component values shown are nominal.
W PACKAGE
14 13 II 11 10
n n n n n n n
UqU l^J
u u u u u u ij1 2 3 4 s e }
A,F PACKAGE
1* 1] 12 11 10 9 a
n n n n n n n
{zby\yj
u u u u u u u12 3 4 5 6 7
RECOMMENDED OPERATING CONDITIONS
Supply Voltage Vcc: S5400 Circuits
N7400 Circuits
Normalized Fan-Out from each Output, N
Operating Free-Air Temperature Range, TA: S5400 Circuits
N7400 Circuits
MIN NOM MAX UNIT
4.5
4.75
-55
0
5
5
25
25
5.5
5.25
10
125
70
V
V
C
C
ELECTRICAL CHARACTERISTICS (over recommended operating free-air temperature range unless otherwise noted)
PARAMETER TESTCONDITIONS*
MINTYP"
MAX UNIT
Vjn(}) Logical 1 input voltage
required at both input
terminals to ensure
VCC=MIN 2 V
logical 0 level at output
^in(O) Logical 0 input voltage
required at eitner input
VCC-MIN 0.8 V
terminal to ensure
logical 1 level at output
vout(1) Logical 1 output voltage VCC= M1N, Vin
= 0.8V,
l|oadli-'1--^A
2.4 3.3 V
Vout(C) Logiccl 0 output voltage VCC-MIM, Vm= 2V,
sink= 1SmA
0.22 0.4 v
'in(O) Logical 0 level input
cunont (eaji input)VCC
= MAX, Vin= 0.4V -1.6 ,v,A
I,,,(])
LcQic."l 1 level input
current (>\ich input)
VC(- MAX. Vin--
2.4V
VCC'-MAX, V, 5.5V
10
1
/\
,,A
lo~ Shoit ciicuit output
cui ri.'nt'
VCC" MAX
55^00
Ny.'.OO
-?0
-13
-55
- W~ii -.A
i
Gr
SIGNETICS DIGITAL 54/74 TTL SERIES - S5400 * N7400
ELECTRICAL CHARACTERISTICS (Cont'd)
PARAMETER TESTCONDITIONS*
MINTYP"
MAX UNIT
'CC(O) Logical 0 level supply VCC= MAX, V|n
= 5V 12 22 mA
current
'CC(I) Logical 1 level supply Vcc=
MAX, vin.= o 4 8 mA
current
. .... .
SWITCHING CHARACTERISTICS, Vcc= 5V, TA
25
C, N = 10
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
*Dd(0) Propagation delay time
to logical 0 level
t.pd(1)Propagation delay time
to logical 1 level
CL= 15pF, RL=400fi
CL= 15pF. RL
= 400fl
7
11
15
22
ns
ns
*For conditions shown as MIN or MAX. use tha appropriate value specified under recommended operating conditions for the applicable
device type.
** All typical values are at Vcc- 5V, TA 25C
t Not more than one output should be shorted at a time.
10
J/6-NET1CS PIGITRL. Sc//'/</00 DrtT/r Ooo/<;
m mrntR
atic ;...-h I,,,, ,\:-)
L
NOTE: Component /slues cho-.vn ^re nominal.
SS4G4-A,F,W .- N7404- A.f
DitllAL 54/74 TTL SERIES
PIN CONFIGURATIONS
-"
r
fr-t-
p
\ Hi I
VV PACKAGE
p_n n n n n r;i
u u u u mrix
A,F PACKAGE
nnnn n n nTD r
U LJ U U UTJTJ
RECOMMLKDED Oi-TRA PWC CD^DlTiCNS
Sj .,j'-/ v/cllage Vr,..: S540.1 Circuits
\7404 Circuits
Normalized Fan-Out fiom Oulput, iM
MIN NOM MAX UNIT
4.5 5 5.5 V
4.75 5 5.25
10
V
S5404 Circuits -55 25 125 C
N7404 C'ncuits 0 25 70 C
ELECTRICAL C' '
;.:-' ACTER 1ST!CS (over reco.-amenr'ed operating free-air temperature range unless otherwise noted)
PARAMETER TESTCONDITIONS*
MINTYP"
MAX UNIT
V-n(1) Lo^icjl 1 ir.p-.jt volt;: 30
required at input
tprtriinr ! to ensi.it logi-
o.l 0 I _ v.. I c-i output
VCC-!V!IN 2 V
V;.-,!0) Lrry-.-l 0 Input -. olinjc
r :-,,:;> r .: J :t ,.',y ir.puT
::r<: in 1 u, :n---/re
VCC- MIN 08 V
'-...:.]'
.<,!-....!
''cr-.AJ!, v,n-.--o.r.v,
',, X-'
-4 00,-A
2.4 3.3 V
/; :
1 ;-. 1 0-.:u:i m:
i . ir-nA
0..-- 0 1 V
'1 1
' ''
'-,, :,
.;.;-. 1 U '.- ; , . -ji ".c a. V,., -o/.v
v.-,- ''';<. v, .-..iv OO
<n.\
'L.c <
'-';- 5 sv -, n: -.
7:,,:,:.,,!
M;, v.iAX
;i.-.-:c-i
:.-'i>4
-'.cl V-,
17
SIGNETICS DIGITAL 54/74 TTL SERIES - S5404 N7404
ELECTRICAL CHARACTERISTICS (Cont'd)
PARAMETER
'CC(O) Logical 0 level supply
current
Iced) Logical 1 level supply
current
TEST CONDITIONS
VCC-MAX,
Vcc= MAX,
Vin= 5V
Vin=
MIN TYP MAX
18 33
6 12
SWITCHING CHARACTERISTICS. VCc- 5V. TA= 25C, N = 10
PARAMETER
xpd0
rpd1
Propagation delay time
to logical 0 level
Propagation delay time
to logical 1 level
TEST CONDITIONS
CL= 15pF,
CL= 15pF,
RL=-400n
RL= 400H
MIN TYP MAX
8
12
15
22
UNIT
mA
mA
UNIT
For conditions shown as MIN or MAX, use tho appropriate value specified under recommended operating conditions for the applicable
device type.
"
All typical values are at Vrp= 5V, TA
= 25 C.
t Not more than one output should be shorted at a time.
5I6NETICS P/&lTfiL S<//7</00~pftrft &0O/<(
ItfOKQSTABLE MULTIVIBRATOR K741c.-s
7
DESCRIPTION
This monolithic TTL monostable multivibrator features d-c trigger
ing from positive or gated negative-going inputs with inhibit facility.
Both positive and negative-rjoing output pulses are provided with
full fan-out to 10 normalized loads.
Pulse triggering occurs at a particular voltage level and is not directlyrelated to the transition time of the input pulse. Schmiu-triggerinput circuitry for the B input allows jitter-free triggering from
inputs with transition times as slow as 1 volt/second, providing the
circuit with an excellent noise immunity of typically 1.2 volts. A
high immunity to Vcc noise of typically 1.5 volts is also provided
by internal latching circuitry.
Once fired, the outputs are independent of further transitions on
the inputs and are a function only of the timing components. Input
pulses may be of any duration relative to the output pulse. Output
pulse lengths may be varied from 40 nanoseconds to 40 seconds by
choosing appropriate timing components. With no external timingcomponents (i.e., pin (?) connected to pin @ ,
pins (10) ,
(1_1) open) an output pulse of typically 30 nanoseconds is
achieved which may be used as a dc triggered reset signal. Output
rise and fall times ate TTL compatible and independent of pulse
length.
Pulse width is achieved through internal compensation and is vir
tually independent of Vcc an" temperature. In most applications,
pulse stability will only be limited by the accuracy of external
timing components.
Jitter-free operation is maintained over the full temperature and
Vcc range for more than six decades of timing capacitance (10 pF
to 10/jF) and more than one decade of timing resistance (2kH to
40k2). Throughout these ranges, pulse width is defined by the rela
tionship tp(out)=
Ct Rt loge 2.
TRUTH TABLE J60 A 1^ ^0,000 I*
Q
N74121-A.F
DIGITAL 54/74 TTL SERIES
Circuit performance is achieved with a nominal power dissipation of
90 milliwatts at 5 volts (50% duty cycle) and a quiescent dissipation
of typically 65 milliwatts.
Duty cycles as high as 90% are achieved when using Rt- 40kJ2.
Higher duty cycles are achievable if a certain amount of pulse-width
jitter is allowed.
PIN CONFIGURATIONS
A,F PACKAGE
' 13 12 11 10 9 I
u n n n n n n
P
Ll U U LJ U Ll LJ1 2 3 S 6 7
1. A1 and A2 are negative-edge-triggered logic inputs, and
. INjPUT '.,
INPUT 1will trigger the one shot when either or both go to logical
OUTPUT 0 with B at logical 1.
Al A2 B Al A2
M'VA 1
B is a positive Schmitt-trigger input for slow edges or level
y 1 1 detection, and will trigger the one shot when B goes to
\y logical 1 with either A1 or A2 at logical 0. (See Truth
0 X 1 0 /1x
! n
0'
1
luhih'l y <-
3.
Table)
External timing capacitor may he connected between pin
X 0 /*
1
0 1OO) (positive) and pin m) . With no external capac
0 X 0 /( X 1 Of".- Shot itance, an output pulse width of 30ns is obtained typical
ly.
To use the internal timing resistor (2kl2 nominal), conX 0 0 X 1 0 1 O Su.. I
4.
1 1 1
i: n 1 O.'i- Shol
5.
nect pin (9) to pin (14)To obtain variable pulse width connect external variable
1 1 1 0' X 1 n. si.ui resistance between pin (9) and pin d4) .No external
i current Iistii . nj is needed.
; x 0r
0 X 11. 1. 1, t
6. For acciir.'te lepcatable pulse widths connect an extuinil
1
! 0 / 0 l > u "'" renistor between pin -^J) and pin (To) with pin
(?) opL-nni. uit.
1X
i
0 t1
1 1 . I.I
7. tn tnr.e l.. d-ie input transit .,n.
!i
11
i ,
/
1
1
i
0
0
i
<
0
1 1
i
I 0
1 x
1.
1
II
O
I'.l. I.ll
I.I-!i.i
8.
9
tI( . -j
tin..-
.if ;<'r input tr,,nvtion
n inri^cativs in. it either a logical 0 or 1. ivtijy lie prt-M. :.t
1 -
v,d --2V 0 V, -v
i -.......
1 1!
SIGNETICS DIGITAL 54/74 TTL SERIES - IM74121
RECOMMENDED OPERATING CONDITIONS
Supply Voltage Vq;
MIN MOM MAX UNIT
V
N74121 Circuits 4.75 5 5.25 V
Normalized Fan-Out from each Output, N 10
Input Pulse Rise/Fall Time: Schmitt Input (B) 1 V/s
Logic Inputs (A1, A2) 1 V/Ms
Input Pulse Width 50 ns
External Timing Resistance Between PinsMl) and (14) (Pin (9) open) 1.4 kn
External Timing Resistance: S54121 30 kn
N74121s
40 kn
Timing Capacitance 0 1000 PF
Output Pulse Width 40 s
Duty Cycle: RT= 2kn 67%
RT= 30kn (S54121) or 90%
RT-40kn (N74121)
ELECTRICAL CHARACTERISTICS (over recommended operating free-air temperature range unless otherwise noted)
PARAMETER TESTCONDITIONS*
MINTYP**
MAX UNIT
vT +
Positive-going threshold
voltage at A inputVcc
= MIN 1.4 2 V
vT-
Negative-going threshold
voltage at A inputVcc
= MIN 0.8 1.4 V
vT +
Positive-going threshold
VCC= MIN 1.55 2 V
voltage at B input
vT-
Negative-going threshold
Vcc= MIN 0.8 1.35 V
voltage at B input
Vout (0) Logical 0 output voltage Vcc= MIN, lsink=16mA 0.22 0.4 V
Vout(1) Logical 1 output voltage VCC= MIN'
l|oad--400MA 2.4 3.3 V
'in(O)
Logical 0 level input
current at A-j of A-VCC
= MAX- Vin= 0.4V -1 -1.6 mA
'in (0)
Logical 0 level input
current at B
Vcc= MAX, Vin= 0.4V -2 -3 2 mA
Logical 1 level input Vcc= MAX, Vin
= 2.4V 2 40 "A
'in IDcurrent at Aj of A2 Vcc
= MAX, Vin-2.4V 0.05 1 mA
Logical 1 level input VCC= MAX- V,n
= 2.4V 4 80 "A
'in (1)current at B VCC
= MAX- Vjn^5.5V 0.05 1 mA
Short circuit outputS54121 -20 -25
-55 m\
'oscurrent at Q or Q*
Vcc= MAX
N74121 -13 -25-55
mA
'cc
Power supply current in
Vcc=-1AX
13 25 mA
quiescent (unfired) state
'cc
Power supply current in
VCC" MAX 23 40 mA
fired state
i11G
SIGNETICS DIGITAL 54/74 TTL SERIES - N74121
SWITCHING CHARACTERISTICS. Vcc= 5V, TA
= 25 C
PARAMETER TEST CONDITIONS MIN TYP MAX'
UNIT
Propagation delay time to
lpd1 logical 1 level from B input
to Q output
Propagation delay time to
CL= 15pF. CT
= 80pF 15 35 55 ns
*pd1 logical 1 level from A1/A2
inputs to Q output
Propagation delay time to
CL 15pF, CT= 80pF 25 45 70 ns
lpdO logical 0 level from B input
to Q output
Propagation delay time to
CL= 15pF, CT= 80pF 20 40 65 ns
TpdO logical 0 level from A1/A2
inputs to Q output
CL=15pF, CT
= 80pF 30 50 80 ns
'plout)
Pulse width obtained using
internal timing resistor
CL 15pF,
R-p= Open,
CT= 80pF
Pin 0 toVcc
70 110 150 ns
lp(out)
Pulse width obtained with
zero timing capacitance
CL= 15pF,
Rj= Open,
cT= o.
Pin 0 toVcc
20 30 50 ns
Vut)
Pulse width obtained using
external timing resistor
CL= 15pF,
RT= 10k P.
CT= 100pF.
Pin 0) Open600 700 800 ns
Tp(out)
Pulse width obtained using
external timing resistor
CL"--
15pF,
RT= 10kn
CT- 1i"F,
Pin(0Open6 7 8 ms
*ho!d
Minimum duration of
trigger pulse
CL=15pF,
Rj= Open,
CT= 80pF,
Pin 0 toVcc
30 50 ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable
circuit type.
*All typical values are at Vcc
- 5V, TA 25C.
t Not more than one output should be shorted at a time.
TYPICAL CHARACTERISTICS
VARIATION IN OUTPUT PULSE WIDTH
VERSUS
SUPPLY VOLTAGE
-
s.
1',<-
J -:'J"V
y9v"
"- " "~
!
,11,1.
. 1
-*'A'
.1?) ^!
1 -i
j
VARIATION IN OUTPUT PULSE WIDTH
VERSUS
FREE-AIR TEMPERATURE
-- ---
- -
X^'2?J
t'
/
ii
i-
rrw -
117
SIGNETICS DIGITAL 54/74 TTL SERIES - N74121
n
TYPICAL CHARACTERISTICS (Cont'd)
SCHMITT TRIGGER THRESHOLD VOLTAGE
VERSUS
FREE-AIR TEMPERATURE
OUTPUT PULSE WIDTH
VERSUS
TIMING RESISTOR VALUE
VL
.
Ibal:
vcc
1KLASH
- SV
i
ivT.i IVT .
"A
^L>L
'o
-*- ~ N7412 - *-
l
1 i I|.
.
\ .
"TT r:
yf
>""c7 'i
itf",: -.-.
:" 7.--K-
i 1
-^-
"jlzr
__._.
t-'ir
"
yf:-i-^-r-.-.
J^iHt-7;
-^yv5>L..^
?y-r
,
1~
~
--jMJ^"\D'ov-
t*^*"^c
*
i-*
-
"X.
L v"(~.^7-
-TA- 25
C-
. . 1
-75 -SO -25 0 25 50 /S 100 125
TA - FREE-AIR TEMPERATURE - I.
A 7 10 20 40 70 100
RT - TIM\G RESISTOR VALUE -.'.'.
PROPAGATION DELAY TIME TO LOGICAL 1 LEVEL PROPAGATION DELAY TIME TO LOGICAL 0 LEVEL
(B INPUT TO Q OUTPUT) , ..-,(B INPUT TO Q OUTPUT)
VERSUS VERSUS
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
2 M
I IvCc sv
;cT - eoPF jBj lnte-n-l
I
r LfI
.^^---
C^- ISpF
I l^-- '
I i I
I I I
I
Y~ N74121
I I i
80
70
60
50
40
30
20
to
VCC -5V
0pf
q.- ioopF
Iq..
c- -
Sopf
l~-~-
i ^~Tu
1I5pf i
_
~ i77y1
e
Is
1
1 L|
N74I21
' !i
ii
11i 1
-75 -SO -25 0 2S 50 76 100 125
T>--Fro#-Arr Terip^'Mura-'C
VARIATION IN INTERNAL TIMING RESISTOR VALUE
VERSUS
FREE-AIR TEMPERATURE
-75 -50-25 0 2-- 50 75 100 125
TA-F~-Ai> T.mpB.iTtt.i-'C
30%
11
i
i i
20%-4-
i- --
nmL-
i-
*5X -
-S- -
0--
-s\
-
i
i
(m.
118
SIG-NE.TIC5 DlGJTftL Si/ifQO PRW DOOK
IRIGGERABLE MONOSTABLE IULTIVIBRATOR WITH CLEAR
^
A/
K
DESCRIPTION
These monostables are designed to provide the system designer withcomplete flexibility in controlling the pulse width, either to lengthenthe pulse by retnggering, or to shorten by clearing. N74122 has aninternal timing resistor which -allows the circuit to be operatedwith only an external capacitor, if so desired. Applications requiringmore precise pulse widths and not requiring the clear feature can
best be satisfied with N74121.
The output pulse is primarily a function of the external capacitorand resistor. For Cext > 1000pF. the output pulse width (t.) isdefined as:
N74122-A.F SE?4123-B,F,W N?4123-B.F
DIGITAL 54/74 TTL SERIES
PIN CONFIGURATIONS
tw- 0.32 RTCext ^ + OJ)
where
Rt is in kll (either internal or external
timing resistor)
Cext is in pF
tw is in ns
For pulse widths when Cext *t lOOOpF, see Figure B.
These circuits are fully compatible with most TTL or DTL families.
Inputs are diode-clamped to minimize reflections due to transmission-
line effects, which simplifies design. Typical power dissipation per
one shot is 115 milliwatts; typical average propagation delay fme
to the Q output is 21 nanoseconds. The N74122 and N74123 are
characterized for operation from 0C to70
C.
TRUTH TABLE (See Note A)
54/74123 B,F,W PACKAGE
vcc b-.iC..i c. ,0 fa ciiflH ;b ja
it n u ) i: n io-
nnnnnnpin
r^ U.U,a
1
&i
U U U U U LJ U U
74122 A,F PACKAGE
u~\h \hlh ih u u
TPin assignments for these circuits are the same for all packages.
N74122
INPUTS OUTPUTS
A1 A2 B1 B2 Q Q
H H X X L H
X X L X L H
X X X L L H
L X H H L H
L X t H J~L "Lr
L X H t n i_r
X L H H L H
X L t H n i_r
X L H t J""L i_r
H t H H u
| 1- H H r\"u"
H H H n i_r
S54123.N74123
INPUTS OUTPUTS
A B Q Q
H 'X L H
X L L H
L T JT. TJ
i H Jl "LT
NOlfcS
A. H hioh le.i.-l istr..(ly st.it.-), t. low level I'-hmiIv stjt.'l.
transition Irom limv to hitjh Irvi I. i
li.-iiisitlc.n from hrr;h to lo-./ If-'el. -PT oiw ti qll I..- ?! pu".r',
IJ"
line loo; lti.-1'l puke. < ititlevcint (.my input. in.:Kn:ni'j
Ujnsitrons).
B. :iC Ni-) irilein.,1 .voimi-ction.
C. To ut,o theint.-rn.il trminij f(.-i,i-.Tor ol N '<'. 1 ?1? { 1 O - ! 2 n, -,.-..
i.tmno-l n,n, tn V(;c.
D. An t^Terri.-l trrm,n r.-ip.^L i tor n..iv t-e cent ^n d b-;.\. -t C,.
at, .J Rcxl'C,,,t (|.n;itn a).
119
SIGNETICS DIGITAL 54/74 TTL SERIES - N74122 o S54123 N74123
RECOMMENDED OPERATING CONDITIONS
Supply Voltage V^c
Normalized Fan-Out from each Output, N
Input data setup time, tsetup (See Note 3)
Input data hold time,t-
dd (See Note 4)
Width of Clear Pulss, tw(c|ear)External Timing Resistance
External Capacitance
Wiring Capacitance at Rext^ext Terminal
Operating Free-Air Temperature, T^
High Logic Level
Low-Logic Level
S54123, N74122, N74123UNIT
V
MIN MOM MAX
4.75 5 5.25
20
10
40t ns401"
ns
40tns
5 50 kfi
No Restriction
50 pF
0 25 70 C
^These conditions are recommended for use at VCq= 5V, TA
=
25
C.
NOTES: 1. Voltage values, except intermitter voltage, are with respect to network ground terminal.
2. This is the voltage between two emitters of a multiple-emitter transistor. For the N74122 circuit, this rating applies to each A input
with respect to the other and to each B input with respect to the other.
3. Setup time for o dynamic input is the interval immedia'tely preceding the transition which.constitutes the dynamic input, duringwhich interval a steady-state logic level must be maintained at the input to ensure recognition of the transition.
4. Hold time for a dynamic input is the interval immediately following the transition which constitutes the dynamic input, during
which interval a steady-state logic level mustbc maintained at the input to ensure continued recognition of the transition.
5. Ground Cext to measure Vqh at Q. V0i_ at Q. or 'OS at Q- cext is Pen to measure Vqh at Q. voLat Q. or !OS at Q6. Quiescent l^c is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs open.
cext= 0.02mF, and Rext
- 25kn. of S54122/N74122 is open.
Ice is measured in the triggered state with 2.4V applied to all clear and
Cext= 0.02mF, and Rext
= 25kf2. Rint of S541 22/N74122 is open.
B inputs, A inputs grounded, all outputs open.
ELECTRICAL CHARACTERISTICS (over operating free-air temperature range unless otherwise noted)
PARAMETER TEST CONDITIONS*MIN
TYP**MAX UNIT
V|H High-level input voltage 2 V
V|L Low-level input voltage 0.8 V
V| Input clamp voltageVcc= MIN, l|
=-12mA -1.5 V
V0H High-level output voltageVcc= MIN,
See Note 5
Iqh=-800-A
2.4 V
vol Low-level output voltageVcc
= MIN,
See Note 5
Iql= 16mA,0.22 0.4 V
i|Input current at maximum
input voltage V~C= MAX> V|
= 5.5V 1 mA
'IH.,.,,,.
.
.data inputs
High-level input currentclear input
Vcc= MAX, V(
= 2.4V40
80MA
l|Ldata inputs
Low-level input currentclear jnput Vcc
= MAX, V| =0.4V-1.6
-3.2
mA
'os Short-circuit output current^ Vcc= MAX, See Note 5 -10 -40 mA
Vcc= MAX,
See Notes 6 and 7
N74122 23 28
cc Supply current (quiescent or triggered) N74123 46 66mA
0
SWITCHING CHARACTERISTICS, Vcc= 5V, TA
= 25C, N = 1C
PARAMETER
Propagation delay time,low-to-
tpLH high-level Q output, from either
A input
Propagation delay time,low-to-
tp|_H high-level Q output, from either
B input
Propagation delay time,high-to-
tp|_|L low-level Q output, from either
A input
Propagation delay time,high-to-
tpH[_ low-level Q output, from either
B input
Propagation delay time,high-to-
tpm low-level Q output, from clear
input
Propagation delay time,low-to-
tpL(-| high it -el Q output, from clear
input
t,_.tni,n)
Minimum width of O output pu'se
i.. Width of Q output pulse
TEST CONDITIONS
Cext~ .
CL 15pF,
Ctxt- lOOOph.
CL 15pF,
Rext'-ka.
RL -40011,
10'. S!
4U0U
MIN
3 08
TYP
22
19
30
27
30
45
3 42
MAX
33
?S
40
3G
27
40
65
3.76
UNIT
120
SIGNETICS DIGITAL 54/74 TTL SERIES - N74122 * S54123 o N74123
For conditions shown as MIN or MAX, use the value specified under recommended opeiotinrj conditions for tho applicable device tvp>
All typical values ore at Vj-C 5V, TA=
25'
C.
t Not more than one output should be shorted at o time.
DESCRIPTION
These monolithic TTL retriggerable monostable multivibrators fea
ture dc triggering from gated low-level-active (A) and high level-
active (B) inputs, and also provide overriding direct clear inputs.
Complementary outputs are provided. A full fan-out to 10 normal
ized Series 54/74 loads is available from eech of the outputs at the
low logic level, and in the high-level state, a fan-out of 20 is avail
able. The retrigger capability simplifies the generation of output
pulses of extremely long duration. By triggering the input before the
output pulse is terminated, the output pulse may be extended. The
overriding clear capability permits any output pulse to be
terminated at a predetermined time independently of the timing
components R and C.
Figure A illustrates triggering the one-shot with the high-level-active
(B) inputs.
TYPICAL INPUT/OUTPUT PULSES (Figure A)
_n n.
_r
_^OUTPUT WlTWOuT RtlKIGGE*
OUTPUT PULSE CCllHOL USING Hl-WIGGCR PIAE
s\
.. Q
"J CI
OUTPUT WITHOUT O.EAR
1
I
OUTPUT PULSE CONTROL USi'tG ttlARmnll
TYPICAL CHARACTERISTICS (Figure B)
OUTPUT PULSE WIDTH
vs /
EXTERNAL TIMING CAPACITANCE .
r
T
I 10 20 40 100 200 *Q0
CaM-Eat'ma>Timin-
Cip*:>t -rvce-pF
T-C, ToR -C
NOTE:
When using electrolytic capacitor,
insure that minimum rating is 20
volts so that 5% reverse voltage
rating is 1.0 volt or greater.
121
SICNET/CS PHrlTftL ^V/l^DO DftTfi Boo^
BCD-TO-DECIMAL DECODER
S5442-B.F.W N7442- B
DIGITAL 54/74 TTL SERIES
> -
a t.o. t r-_ a* a M *-? Vi'"
'? **
r f. f
as-f /?w I /: i'i
DESCRIPTION
The 54/7442 BCD-to-Decimal Decoder is a TTL MSI array utilized
in decoding and logic conversion applications. The 54/7442 decodes
a four bit BCD number to one of ten outputs.
LOGIC DIAGRAM
PIN CONFIGURATIONS
B,F,W PACKAGE
16 IS 14 13 17
n n n n n h n n
A B C 0
01 J J 4 5 i J I 9
ooooo 6 'op99'
r n
UUUUULJUU1 2 1 b 6 J I
TRUTH TABLE
S5442/N7442
BCD
INPUT
D C B A
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
ALL TYPES
DECIMAL
OUTPUT
RECOMMENDED OPERATING CONDITIONS
Supply Voltage Vcc: S5442 C.ic.uits
NV-1.',? Circuits
Nornnli -ed Fan-Out fiom o.ich Output, N
MIN
4 !i
4./5
NOM MAX
~yy
b.:jj
IO
UNIT
V
49
tz
SIGNETICS DIGITAL 54/74 TTL SERIES - SG442 o N7442
ELECTRICAL CHARACTERISTICS (over recommended operating free air tumper.iture range unless othe.wise noted)
PARAMETER TESTCONDITIONS'
MINTYP**
f
Input voltage required to
Vin(1) ensure logical 1 at any input
terminal
Input voltage required to
Vcc= MIN 2
Vin(0) ensure logical 0 at any input
terminal
Vcc= MIN
Vout(1) Logical 1 output voltage
VCC-
MIN,Vjn(1)72V,Vin(0)-
0.8V.
'load=
"400mA
2.4
Vout(0) Logical 0 output voltage
Logical 1 level input
Vcc= MIN, Vin)1)
= 2V.Vin(0)- 0.8V,
lsjnk= 16mA
VCC= MAX, Vjn
= 2.4V
'in(Dcurrent (each input) Vcc= MAX, Vin" 5.5V
'm(O)
Logical 0 level input
current (each input)Vcc
=
MAX, Vjn= 0.4V
'os Short-circuit output current*S5442
Vrr= MAX,l-1-N7442
-20
-18
'cc Supply currentS5442
Vrr= MAX,
^N7442
23
18
max ; unUNIT
0.8
0.4 v
40 MA
1 mA
-1.6 mA
-55 mA
-55 mA
41 mA
55 mA
SWITCHING CHARACTERISTICS, Vcc= 5V, TA
- 25"C, N = 10
PARAMETER TEST CONDITIONS MIN
*pd0
Propagation delay time to
logical 0 level through
two logic levels
CL" 15pF, R L= 400P- 10
*pd0
Propagation delay time to
logical 0 level through
three logic levels
CL 1DpF, RL- 400n
lpd1
Propagation delay time to
logical 1 level through
two logic levels
CL 15pF, RL= 400-Q 10
lpd1
Propagation delay time to
logical 1 level through
three logic levels
CL" 15pF. RL= 400n
TYP MAX I UNIT
23
30 i ns
35 ns
25'
ns !
35 n=
'For conditions shown as MIN or MAX, use the appropriate value sc
device type.
"All typical values are at Vcc- 5V, TA
- 25 C.
t Not more than one output should be shorted at a time.
-Tier recommended operating conditions foi the opplicable
.SlCrNETlCSPIG1TRL ^/l^OO <}ftTft &00/(
DESCRIPTION
The S5493/N7493 is a high-speed, monolithic 4-bit binary counter
consisting of four master-slave flip-flops which are internallyinterconnected to provide a divide-by-two counter and a divide-by-
eight counter. A gated direct reset line is provided which inhibits the
count inputs and simultaneously returns the four flip-flop outputs
to a logical 0. As the output from flip-flop A is not internallyconnected to the succeeding flip-flops the counter may be operated
in two independent modes:
1. When used as a 4-bit ripple-through counter output A must be
externally connected to input B. The input count pulses are
applied to input A. Simultaneous divisions of 2, 4, 8, and 1 6 are
performed at the A, B, C, and D outputs as shown in the truth
table.
2. When used as a 3-bit ripple-through counter, the input count
pulses are applied to input B. Simultaneous frequency divisions
of 2, 4, and 8 are available at the B, C, and D outputs.
Independent use of flip-flop A is available if the reset function
coincides with reset of the 3-bit ripple-through counter.
The S5493/N7493 is completely compatible with Series 54 and
Series 74 logic families. Average power dissipation is 32mW per
flip-flop (128mW total).
4-BiT BINARY COUNTER
S5493-A,F,W N7493-A.F
DIGITAL 54/74 TTL SERIES
S54*
an
4 .
PIN CONFIGURATIONS
W PACKAGE
i'.r-il
i rC i 0 G\3 H C
' M 1/ 11 -D.
* n
n n n n n n n
i L
l\rUiij- i
>~. r=- I u
'r
u U LJ U U LJ U'ii>-n h. 1 1 R0.r, nc v1( nl %c
a - ,' *".
A,F PACKAGE
V
I'
~+2f~~\ G\D 8 C
fi n n ri n nn-
ill 1
J=F-"=
i.r-
V
r-
-yU U U U U U LJ
INPUl Roll, "o.D NC V M: \C
B
TRUTH TABLE (See Notes 1 and 2)
LOGIC
COUNT
OUTPUT
D C B A
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
COUNT
OUTPUT
D C B A
9 1 0 0 1
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
NOTES:
1. Output A connected to input B.
2. To reset all outputs to logical O,
both R()(i) anc* R0(2) inPuts
must be at logical 1.
SCHEMATIC DIAGRAM
.
-iv
'V; W ' r<* \ ~ -
I
y
rl-
i- i1'- - f y * j
i-'-Mi :1 mi7'
I- !
sruT . OUTPUT
1
Mv- ,.
- 4
C OUTPUT D OUTPUT
*-
'"li l :.._,.
iCf- rt* _^-l_^r-. -
' 'l T. . s
ao~l
-OA*j tA * -~
~
-3
" -IK- *^"*
-1;- -- ""! \\"'" ' -
:\
'
-' rs:
'-, r- i \' '
fV;
- 'tt
I
'A '
>
103
SIGNETICS DIGITAL 54/74 TTL SERIES - S5493 . N7493
RECOMMENDED OPERATING CONDITIONS
Supply Voltage Vcc: S5493 Circuits
MIN NOM MAX UNIT
4.5 5 5.5 V
N7493 Circuits 4.75 5 5.25 V
Operating Free-Air Temperature Range, Ta: S5493 Circuits -55 25 125 C
N7493 Circuits 0 . 25 70 C
Normalized Fan-Out from each Output, N 10
Width of Input Count Pulse, tp(|ni
Width of Reset Pulse, CpWcsel)
50 ns
50 ns
ELECTRICAL CHARACTERISTICS (over recommended operating free-air temperature range unless otherwise noted)
PARAMETER TESTCONDITIONS*
MINTYP"
MAX UNIT
Vin(1) Input voltage required
to ensure logical 1 at
any input terminal
Vcc= MIN 2 V
vin(0) Input voltage required
to ensure logical 0 at
any input terminal
Vcc= MIN
0.8 V
Vout(l) Logical 1 output voltageVcc
= MIN, l|oad---400MA 2.4 V
vout(0) Logical 0 output voltage Vcc= MIN, 'sink= 16mA 0.4 V
'in(D Logical 1 level inputVcc
= MAX, Vin= 2.4V 40 ^A
current at Ro(i) or Vcc= MAX, V,n
= 5.5V 1 mA
. R0(2) inputs
'in(l) Logical 1 level input Vcc=-
MAX, Vin= 2.4V 80 MA
current at A or B inputsVcc= MAX, v,n- 5-5V 1 mA
'in(O) Logical 0 level input
current at Rod) or
R0(2) inputs
Vcc=MAX, Vln
= 0.4V -1.6 mA
'in(O) Logical 0 level input
current at A or B inputs
Vcc= MAX, Vin= 0.4V -3.2 mA
'OS Short circuit output Vcc= MAX, V0ut = 0 S5493 -20 -57 mA
current^ N7493 -18 -57 mA
'cc Supply currentVcc= MAX, Vin
= 4.5V S5493 32 46 mA
N7493 32 53 mA
SWITCHING CHARACTERISTICS, Vcc= 5V, TA
= 25C, N= 10
PARAMETER
fmax Maximum frequency of
input count pulses
tpdlPropagation delay time
to logical 1 level from
input count pulse to
output D
tpdOPropagation delay time
to logical 0 level from
input count pulse to
output D
TEST CONDITIONS
CL= 15pF,
CL= 15pF,
CL= 15pF,
RL =400.r2
40on
RL= 400n
MIN TYP MAX
10 18
75
75
135
135
UNIT
MHz
For conditions shown as MIN or MAX. uso the appropriate value specified under recommended operating condition, <or tne aopl.cablc
device type
All typical values are at Vcc' 5V, TA
- 25 <-.
I Not more than one output shouldbe shorted at a time
T
104
i,y
tUfll
WJ.
a-
1 ?^
Dli
cISI
t
r I - n
?:
fTl
TO
yw
-'a
i
i ~
SPSCTF!At. SENSITIVITY
SPECTRAL SENSITIVITY
Sensitivity "is defined as the reciprocal of exposure, expressed in ers/cm2
requtred to produce a Density (D) above gross fog when the material isprocessed as recommended. The curves shown for the Kodak Spectroscopicmaterials are representative of each sensitizing class.
,
- KODAK SWR IStvrrwj..-BA,w,l FJit.
3M 300 IM *CO
KODAK Sp*tfrxeo<>< Plot* w>J rim, typ* lOs-0
D-0.t Ai. c~s
i 1 1
|tO0.-
D-'(,t4f>
j I0-OA Abo-* G.(^
i \
1 \ 11
i \
i
1
\. i
W^MliENGtH 0"#)
*ll
iii
lilLli 1
a
ft
13
if
21d
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