7/24/2019 Design and Implementation of a Highly Efficient VLSI Architecture for Discrete Wavelet Transform

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Design and Implem entation of a Highly Efficient VLSI Architecture

for Discrete Wavelet Transform

Chu Yu, Chien-An Hsieh

n d

Suo-Jie

Chen

Qe pa r tm e n t

of

Ele c t ri c a l E ng ine e r ing

Na t iona l T a iwa n Un ive rs i t y ,

Ta ipe i . Ta iwa n ,

R.O.C.

Abstract

Since the discrete wavelet transform (DWT) is a kind of

multi-rate transform, it is difficult to design an optimal

computation-time architecture for the DWT. In this paper,

we propose a highly efficient

VLSI

architecture for the 1-D

DWT decomposition. This architecture contains two stages

of systolic decimation filter banks to guarantee a high

throughput and an optimal computation time. Using this

architecture, N-point samples with

J

resolution levels can be

computed in clock cycles spending only

JL

registers,

where denotes filter length. Due to its regular structure,

this architeawe can be easily scaled up with the tap size of

the. filters and the number of octaves. The performance of

the proposed architecture will be verified by the successful

implementation of a 4-tap 3-octave DW T VLSI chip.

1.

Introduction

The discrete wavelet transform provides a new method for

signal processing 111-[2]. It decomposes data into

components of different frequencies, such that we can have

good time resolution at high frequencies and goo d frequency

resolution at low frequencies. The wavelet transforms are

well suited for analyzing physical situation where signal

contains discontinuities and sharp spikes. Recent

developments have led the DWT into many applications

such as audio and image compression, image recognition

system, transient signal analysis, com puter graphics, and

so

on.

For real-time and high-speed applications, a dedicated

DWT hardware device is needed and several VLSI

architectures have been proposed [3-61. Knowles [3]

proposed the f i r s t VLSI

a r c h it e c t ur e f o r t h e I - D B W T .

La ter , P a r h i a nd N i sh i t a n i [ 4 ] p r opose d a f o lde d a nd a

digi t - se r ia l a rchi tec tures for the I -D DWT. The Pa t te r

two a r c h i t e c tu r e s ha ve f ixe d - s i z e D WT oc ta ve , a nd a r e

no t de s igne d to s c a l e up w i th t he num be r o f oc t a ve s

a nd the s i z e o f t he f i l t e r s . The r e f o r e , F r idm a n a nd

M a no la kos [ 5 ] p r opose d a m u l t ip r o j e c t ion ba se d

sys to l i c a r c h i t e c tu r e f o r t he 1 - D DWT. I n a dd i t i on ,

Vishwanath

et al. [ 6 ] pr opose d th r e e r ou t ing - ne twor k

based sys to l ic a rchi tec tures for the

I - D

D W T . T h e s e

This work was supported by National Science Council, unde

grants NSC 86-221 5-E002-034 and NSC 86-2221-E002-066

11.

1- D DWT a r c h i t e c tu r e s [ 5 ] - [ 6 ] a r e s c a l a b l e . bu t t he i r

inpu t s e que nc e ha s to i n t e r l e a ve . t hus de r iv ing lowe r

th r oughpu t .

I n t h i s pa pe r , we p r e se n t a s c a l a b l e VLSI archi tec ture

wh ic h c a n c om pu te da t a on - the - f ly , i .e ., t he i npu t da t a

c a n be p r oc e s se d a t t he r a t e o f one sa m ple pe r c loc k

c yc le . I n ou r de s ign , a l l t he c om pu ta t ions o f DWT.

e xc e p t t hose o f t he f i r s t oc t a ve , a r e f o lde d in to t he

c om pu ta t ions o f t he s e c ond oc t a ve . Thus , t h i s fo lde d

a r c h i t e c tu r e c a n p r ov ide a n ide a l h igh th r ough pu t a nd

st i l l r e ta in i t s sca labi l i ty . In addi t ion , a 4- tap 3-oc tave

DWT c h ip ha s be e n im p le m e n te d to ve r i f y t he

pe r f o r m a nc e o f the p r opose d a r c h i t e c tu r e .

2. Discrete Wavelet Transform

The wavelet transform (WT) is a kind of time-scate

decomposition of signals. The WT and Short-time Fourier

transform (STFT) differ in their time-frequency

representations. The WT processes data with different

window widths at different scales (frequencies), which

overcomes the limitation of fixed time-frequency resolution

of STFT.

The discrete wavelet transform of a signal

x t )

is given by:

W h . o ) = - Y )

h

3

where

b

is the time factor,

is

the scale factor,

h t ) is

the

wavelet basis function. Properties

of

wavelet transforms are

heavily dependent on their basis w avelet functions.

l:

* l4

Fig.

1 A

3-octave filter bank tree for the I -D DW T

The DW T can also be viewed as a kind of m ultiresolution

decomposition of a sequence. By exploring the subband

scheme recursively,

a

fast DWT can be constructed. Figure

shows a three-octave filter bank tree for the I-D DWT,

where

H z )

and

G(z)

represent a low-pass and a high-pass

filters, respectively; and k2 represents subsampled by

2,

by

4.1

0-7803-3669-0 $5.00 997 IEEE

237

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7/24/2019 Design and Implementation of a Highly Efficient VLSI Architecture for Discrete Wavelet Transform

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dropping one every two samples. Assume an input sequence

~ ( n )ontains samples, then the output sequence length

should also be

N

he first octave computes NI2 samples, the

second octave computes NI4 samples, ..., and

so

on.

UX

3.

VLSI

Architecture for DWT

UX

As mentioned above, a scalable architecture is our design

goal. Therefore: in this section we present a novel and

efficient

VLSI

architecture for the 1-D DW T decomposition,

which performance is comparable with other previously

proposed scalable architectures [ 5 ] - [ 6 ] . The overall

architecture is given in the following subsection and the

decimation filter scheme is described in Subsection 3.2 .

3.1

Overall Architecture

As

shown

in

Fig. 1 we need to compute N-point samples

in the first octave, then generate NI2 output samples.

Similarly, in the second octave, we need to compute

NI2

input samples and generate

NI4

output samples. For an nz-

octave DW-T. tile total num ber o f samples to c omp ute is:

Ri

+

(+>

+ +) A + . . .+ +) -

N =

2N 1 - 2 - )