Design and Fabrication of MEMS Test Socket

for BGA IC Packages

1Sangwon Kim, 1Daeyoung Kong, 2Chanseob Cho, 3Jaewoo Nam, 4Bonghwan Kim and 1Jonghyun Lee

1Kyungpook National University, School of Electrical Engineering and Computer Science, Daegu, Korea 2Kyungpook National University, School of Electrical Engineering, Sangju, Korea

3CoreMEMS Inc., Milpitas, CA, USA 4Catholic University of Daegu, Electronics Engineering, Gyeongsan, Korea

Email :bhkim@cu.ac.kr and chocs@knu.ac.kr

Abstract—We developed a novel ball grid array (BGA) test socket for an integrated circuit (IC) package test. The fabricated test socket has a cantilever array structure based on a silicon-on-insulator (SOI) wafer. We used micro-electro-mechanical systems (MEMS) technology to fabricate the test socket, which has a simple structure, an easy fabrication process, low contact force, rapid prototyping and low cost. We optimized the length, width and thickness of the cantilever for application to a BGA IC package test. We verified the deflection under applied force, contact resistance and characteristics of the signal path resistance. The contact force was 1.3 gram force per each cantilever beam which was 425 μm long, 150 μm wide and 10 μm thick, with a deflection of 100 μm. The contact resistance ranged from 0.7 to 0.75 ohm and the signal path resistance had a maximum value of 18 ohm. The test socket could be applied to actual BGA package tests.

I. INTRODUCTION

Test sockets are used as an interface between automatic test equipment and the IC package [1-6]. High performance and high density devices continue to be implemented in the semiconductor packaging industries. For this reason, it is essential to develop test devices, such as test sockets, of high performance and high density. The BGA IC package generally uses a socket with an assembly of pogo pins [3,4]. The pogo pin type test socket has some disadvantages, such as pitch limitation, high cost, low reproducibility and the potential to cause serious ball damage. To overcome these drawbacks, a silicone rubber connector was developed and used as a test socket [5,6].

TABLE I. STRUCTURES AND PROPERTIES OF SEVERAL TEST SOCKETS

(a) Pogo pin (b) Silicone rubber connector (c) MEMS cantilever

High cost High contact force

Ball damage Hard to assemble

Pitch limit Hard to apply high speed test

High cost Ball damage

Poor reliability

Low cost Low contact force No ball damage Easy fabrication

Fine pitch Good reliability

Rapid prototyping

978-1-4244-8168-2/10/$26.00 ©2010 IEEE 1896 IEEE SENSORS 2010 Conference

However, this connector is hard to manufacture due to its high cost and low reliability. This paper presents a MEMS test socket using a cantilever arrayed structure and cantilever fabrication technologies [7-12]. The MEMS test socket has a fine pitch, easy design and fabrication, low cost, low contact force, high reliability and does not cause ball damage. The fabricated test socket is suitable for testing BGA packages, and can be used for high frequency tests and burn-in tests. TABLE I shows the properties of several test sockets.

II. DESIGN AND FABRICATION We used a square BGA IC package with a 650 μm pitch and

an 11×11 ball array (121 balls). The diameter of each ball was 300 μm for the package under test. To determine the optimum deflection versus applied force characteristic, we performed a numerical analysis for different cantilever dimensions [7]. On the basis of the simulation results, we fabricated cantilevers with lengths of 300 and 425 µm and widths of 200 and 150 µm, and a thickness of 10 µm. The deflection under applied force was calculated theoretically as well as measured. Figure 1 shows the BGA package and the MEMS test socket layout. The signal path length between the cantilever beam end and the pad is 4–8 mm and the width of the metal line was around 100 µm.

(a)

(b)

Fig. 1 The BGA package and the proposed test socket. (a) A picture of the 11 × 11 BGA package. (b) The MEMS test socket layout.

Fig. 2 The process flow of the cantilever arrayed MEMS test socket. The test socket was fabricated using simple MEMS

fabrication technology. Figure 2 shows the overall processes for the cantilever arrayed test socket. The starting substrate was a 4 inch p-type silicon-on-insulator (SOI) wafer with both sides polished; the top silicon layer was 10 μm thick, the buried oxide layer was 1 μm, and the base was a silicon layer 500 μm thick. We performed initial cleaning to remove the organics or fine dust from the surface(Figure 2(a)). The wet oxidation was conducted in a furnace to grow a 1µm thick SiO2 layer on both sides of the silicon wafer (Figure 2(b)). The cantilever was defined with AZ 5214 using a MA6 mask aligner and an AZ300 developer for the photoresist (PR) (Figure 2(c)). The metal evaporation was conducted using an E-beam evaporator. A thickness of 0.1 μm nickel was evaporated in order to increase the adhesion between the SiO2 and the metal to a thickness of 0.12 μm. Au was evaporated on the nickel layer as an electrode (Figure 2(d)). The wafer was soaked in acetone solution to lift off the PR and metal. After the acetone process, the wafer was cleaned with methanol and de-ionized (DI) water (Figure 2(e)). After the metal evaporation, the second and third photolithography were conducted. The PR pattern was defined with AZ1512 to remove the top of the SiO2 layer, and with AZ9260 to remove the bottom SiO2 layer using a double sided aligning process (Figure 2(f)). Then, both sides of the 1 μmSiO2 layer were etched with buffered oxide etch (BOE) solution for 12 minutes (Figure 2(g)). The 10 μm thick top Si layer was etched with deep reactive ion etching (deep RIE) silicon etcher and the 500 μm base Si layer was etched subsequently (Figure 2(h)). Finally, the buried oxide layer was etched with BOE solution for 12 minutes (Figure 2(i)) and the PR was removed (Figure 2(j)). The SEM images of the fabricated

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MEMS test sockets showing the cantilevers are shown in Figure 3.

(a) (b)

Fig.3 SEM images of the cantilever arrayed test socket. (a) Sample A: L = 300 µm, w = 200µm. (b) Sample B: L = 425 µm, w = 150 µm.

III. RESULTS AND DISCUSSIONS

A. Mechanical properties of the cantilever We verified the mechanical properties of the cantilever using the STROKE force measurement system (WILL tech, co., Seoul, Korea). Figure 4 shows the STROKE force measurement system and the image results of the tests. Figure 5 shows the result of the deflection under applied force test as well as the theoretical values. The result of the deflection of the cantilever beams under applied force, shows a linear characteristic. However, the maximum deflection of cantilever beam did not reach the theoretical value. During the contact force test, the effective length of the cantilever is shortened because the testing probe is wider than the cantilever width, therefore it is difficult to make contact accurately with the end point of the cantilever.

(a)

(b)

Fig 4 The deflection under applied force test. (a) STROKE force measurement system. (b) Optical image of force measurement.

B. Electrical properties of the cantilever To measure the contact resistance between the test probe and the cantilever end point, we obtained the I-V characteristics using a 4156C probe station. The contact resistance was measured from the test resistance pattern with a length of 1000µm, a width of 150µm, and a metal thickness of 0.1 µm Ni and 0.12 µm Au. The contact resistance measurement principle is shown in Figure 6. Our results show that the contact resistance was 0.7–0.75 Ω for all the cantilever beams. Figure 7 shows the average signal path resistance between the cantilever end and the metal pad. The path resistance decreased slightly as the deflection increased and was below18 Ω.

(a) Sample A : L = 300 µm, w = 200µm

(b) Sample B : L = 425 µm, w = 150 µm Fig. 5 The deflection under applied force measurement results (M) as well as their theoretical value (T: dashed line). The number indicates the cantilever length.

A B

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Fig.6 The contact resistance measurement (Metal length : 1000 µm, metal width : 150 µm, metal thickness : Ni 100nm , Au 120nm)

Fig. 7 The path resistance measurement results.

IV. CONCLUSIONS In this paper, we have developed a cantilever arrayed MEMS test socket. We used semiconductor fabrication technology such as metal lift off and deep RIE. The proposed MEMS test

socket has good mechanical and electrical properties with a simple structure, easy fabrication and low cost. High performance chip tests could be applied to the developed MEMS type test socket in the future. It is necessary to further research the design of the proposed test socket for packages like MEMS chips, printed circuit board (PCB)s and housings.

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