Design and DSP-chip implementation of a novel bilinear-LDI digital Jaumann filter

1-

c

Circuits Syst., vol. 1, pp. 207-216, Nov. 1977. (See IEE J. Electronic Circuits Syst., vol. 2, p. 88, May 1978, for corrigenda.) C. Eswaran and V. Ganapathy, “On the stability of digital filters designed using the concept of generalized immittance converter,” IEEE Tram. Circuits Syst., vol. CAS-28, pp. 745-747, July 1981. A. Antoniou and M. G. Rezk, “A comparison of cascade and wave fixed-point digital filters,” IEEE Trans. Circuits Syst., vol. CAS-27, pp. 1184-1194, Dec. 1980. A. Fettweis, “Some principles of designing digital filters imitating classical filter structures,” IEEE Trans. Circuits Syst., vol. CAS-18, pp. 314-316, Mar. 1971. S. Chakrabarti, B. B. Bhattacharyya, and M. N. S . Swamy, “A?; proximation of two-variable filter specifications in analog domain, IEEE Tmm. Circuits Syst., vol. CAS-24, pp. 378-388, July 1977. K. Manivannan and C. Eswaran, “Direct synthesis approach for GIC digital filters,” Electron. Lett., vol. 24, pp. 624-626, May 1988. A. Fe!yeis and K. Meerkotter, “On ada tors for wave digital filters, IEEE Trans. Acoust., Speech, & n u l Processing, vol. ASP-23, pp. 516-525, Dec. 1975. S . Chakrabarti and S . K. Mitra, “Decision methods and realization of 2-D digital filters using minimum number of delay elements,” IEEE Trans. Circuits Syst., vol. CAS-27, pp. 657-666, Aug. 1980. D. S . K. Chan. “A simule derivation of minimal and near-minimal realizations of 2-D trinsfer functions,” Proc. IEEE, vol. 66, pp. 515-516, Apr. 1978. A. Antoniou. Dieital Filters: Analvsis and Desien. New York:

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. 37, NO. 6, JUNE 1990

C. Eswaran received the M. Tech. and Ph.D. degrees in electrical engineering from the Indian Institute of Technology, Madras, India, in 1968 and 1974, respectively.

He worked as a Humboldt Fellow at Lehrstuhl fur Nachrichtentechnik, Bochum, West Ger- many, during 1976 to 1978 and later as a Post- Doctoral Fellow at Concordia University, Mon- treal, P.Q., Canada. He is currently with the faculty of electrical engineering, at the Indian Institute of Technology. During the period from

July to December 1988, he was with the Department of Electrical and Computer Engineering, University of Victoria, Victoria, B.C., Canada, as an AS1 Fellow. His teaching and research interests are in the areas of digital techniques and microprocessors, and one- and two-dimensional digital signal processing.

8

McGraw-Hill; 19%. D. M. Goodman, “Some stability pro erties of two-dimensional linear shift-invariant digital filters,” I E l E Trans. Circuits Syst., vol. CAS-24, pp. 201-208, Apr. 1977. P. K. Rajan, H. C. Reddy, M. N. S . Swamy, and V. Ramachan- dran, “Generation of two-dimensional digital functions without nonessential singularities of the second kind,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-28, pp. 216-223, Apr. 1980. H. C. Reddy and E. I. Jury, “Study of the BIBO stability of 2-D recursive digital filters in the presence of nonessential singularities of the second kind-Analog approach,” IEEE Trans. Circuits Syst., vol. CAS-34, pp. 280-284, Mar. 1987. P. K. Rajan and H. C. Reddy, ‘On the necessary conditions for the BIBO stability of n-D filters,” IEEE Trans. Circuits Syst., vol. CAS-33, p. 1143, NOV. 1986. M. N. S . Swamy, L. M. Roytman, and E. I. Plotkin, “On stability properties of three- and higher-dimensional linear shift-invariant digital filters,” IEEE Trans. Circuits Syst., vol. CAS-32, pp. 888-892, Sept. 1985. G. V. Mendonca, A. Antoniou, and A. N. Venetsanopoulos, “Design of two-dimensional pseudorotated digital filters satisfying prescribed specifications,” IEEE Trans. Circuits Syst., vol. CAS-34, pp. 1-10, Jan. 1987. M. Ahmadi, A. G. Constantinides, and R. A. King, “Design techni ue for a class of stable two-dimensional recursive digital filters: in Proc. 1976 IEEE Int. Conf. Acoust., Speech, Signal

”

T. Venkatemvarlu received the B. Tech. and M. Tech. degrees in electronics and communication engineering from Sri Venkateswara University, Tirupati, India, in 1979 and 1981, respectively.

After working a short period (1981-1982) at K. S . R. M. College of Engineering, Cuddapah, he joined the faculty of the Department of Electrical and Electronics Engineering, S . V. University College of Engineering. During 1986-1989, he was a Quality Improvement Pro- gramme Research Scholar at the Department of

Electrical Engineering, Indian Institute of Technology, Madras. His teaching and research interests are in the areas of digital systems, communications, and multidimensional digital filters.

Andreas htoniou (M’69-SM’79-F‘82) for a photograph and biography,

8

Processing, pp. 145-147. please see page 46 Jan. 1990 issue of this TRANSACTIONS.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. 37, NO. 6, JUNE 1990 695

Design and DSP-Chip Implementation of a Novel Bilinear-LDI Digital Jaumann Filter

BEHROUZ NOWROUZIAN, NORMAN R. BARTLEY, MEMBER IEEE, AND LEONARD T. BRUTON, FELLOW, IEEE

Absfract -This paper presents the design and implementation, on a digital signal processing (DSP) chip, of a novel high-quality recursive digital filter. The proposed digital filter is derived from an equally resistively-terminated lossless Jaumann two-port network by using the bilinear-LDI design technique. It has the important practical property that all the inductor-based states can be computed simultaneously and all the capacitor-based states can be computed simultaneously, thereby permitting a fast parallel processing speed which is virtually independent of the order of the filter. This digital filter can be made minimal in the number of multipliers, requiring n multipliers for the realization of lowpass and bandpass filters, and n + 1 multipliers for the realization of highpass and bandstop filters, where n is the order of the continuous- time prototype reference filter. It is shown that when implemented using modern DSP chips, such a filter exhibits very high-quality performance characteristics.

I. INTRODUCTION HERE ARE many different techniques available for T the design and implementation of recursive digital

filters. These design techniques tend to fall into two broad categories. The first category includes methods that proceed by assuming the existence of a corresponding analog doubly resistively-terminated lossless two-port network having a voltage transfer function which is known to meet the required discrete-time frequency-domain characteristics after a suitable transformation from the s to the z domain, where s denotes the continuous-time and z the discrete-time complex frequency variable. Typical examples are wave-digital (WD) [l] ladder [2] and lattice [3], [4] filter design techniques, as well as lossless discrete integrator (LDI) ladder [5], and bilinear-LDI ladder [6-101 and lattice [ 111 digital filter design techniques. Such methods rely on the vast body of the existing literature (see, for instance, [12]-[14]) for the design and synthesis of classical passive LCR filters to arrive at the so-called s-domain prototype reference filrer. They are referred to here as indirect methods because the synthesis of the discrete r-domain input-to-output transfer function is not performed directly in the z domain.

The second design category consists of methods for which an s-domain reference filter is not required and

Manuscript received July 11. 1989. This work was supported in part by the Natural Sciences and Research Council of Canada under Grant A671.5. This paper was recommended by Associate Editor T. T. Vu.

The authors are with the Department of Electrical Engineering, University of Calgary, Calgary, Alta., Canada T2N 1N4.

IEEE Log Number 9034907.

where the digital filter synthesis is carried out in the z-domain directly from the discrete-domain description of the required transfer function. They are referred to as direct methods. The Gray and Markel lattice and ladder digital filter design techniques [151 and the design of the general class of lossless bounded real (LBR) digital filter structures [ 161 are examples of direct methods.

This contribution is concerned with the implementation of LDI digital filters using a novel approach. It is known that direct methods can be used to design high-quality LDI digital filters 1171-[19]. The resulting digital filters have many important practical advantages, including low passband sensitivity to multiplier coefficient quantization errors and good dynamic range properties. Moreover, they often have an important advantage that is not shared by other previously mentioned methods, which is that all of the even and odd states may be simultaneously determined, thereby permitting a fast two-cycle parallel processing operation independent of the order of the filter. This advantage has been fully exploited in the implementation of two-phase analog discrete-time switched-capacitor versions of LDI ladder filters [20].

The bilinear-LDI method [8-101 (see also [61, [71) has been proposed as an indirect method for realizing LDI digital ladder filters, making possible the exact implementation of certain elliptic transfer functions by means of the bilinear transformation

2 z - 1 T z + 1 (1) s=--

where T denotes the sample period. The bilinear-LDI method requires that a suitable precompensated version [81, [9] of the continuous-time analog LCR reference filter be derivable from the reference filter. This precompensated filter structure has the essential properties that, after the bilinear transformation (I), the resulting z-domain structure is exactly an LDlfilter and has the same transfer function as that obtained by bilinear transformation of the original LCR reference filter. The resulting bilinear-LDI digital filters are of high quality 191 when compared to filters designed using other methods; however, they can only employ LCR prototype reference filters for which a suitable precompensated version can be derived. Moreover, elliptic transfer functions generally cannot be realized

OO98-4094/90/0600-0695$01 .OO 0 1990 IEEE

696 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. 37, NO. 6, JUNE 1990

using LDI filters without the use of additional feedfor- ward and feedback transmittances that inherently destroy the fast two-cycle property of the LDI structure.

In this contribution, an equally resistively-terminated lossless Jaumann two-port network [3], [12, p. 2021 is proposed as a continuous-time reference filter for the bilinear-LDI design method, leading to novel high-quality digital filters being capable of realizing elliptic transfer functions and having structures that lend themselves to two-cycle operation in a parallel processing and/or digital signal processing (DSP) chip environment. The synthesis of the continuous-time prototype Jaumann-structured reference filter is discussed in Section 11. In Section 111, a method is developed for the derivation of the precompensated version of the Jaumann-structured reference filter suitable for a bilinear-LDI digital filter realization with a minimum number of digital multipliers. Section IV is concerned with the development of a voltage-current signal-flow graph (V-Z SFG) of the precompensated reference filter. This is performed in such a manner that the V-Z SFG incorporates continuous-time integrators as the only frequency-dependent transmittances, to facilitate a corresponding direct LDI discrete-time realization. This is followed by the digital filter realization of the continuous-time V-Z SFG in Section V. Finally, an example is discussed in Section VI to demonstrate the design and DSP-chip implementation of an ultra nawowband digital

4

" elliptic bandpass filter.

11. DERIVATION OF THE JAUMANN-STRUCTURED CONTINUOUS-TIME REFERENCE FILTER

Consider a doubly resistively-terminated lossless two- port network N as shown in Fig. l(a), where E ( s ) denotes a Laplace-transformed excitation voltage source, and R , and R , denote the source and load resistances, respectively. Moreover, V,(s), Z,(s) are the transformed voltage-current variables at port 1 of the two-port network N , and V2(s), Z2(s) are the corresponding voltage- current variables at port 2. The terminated network in Fig. l(a) can be characterized by the relation

["""'I V 2 ( 4 - - [ z21(4 zll(s) 2 2 2 ( 4 Z 1 2 W ] [ I 2 ( s ) w ] ( 2)

which describes the operation of the two-port network N in terms of its short-circuit port impedance parameters zij(s) (for i, j = 1,2), together with the relations

Vds) = E ( s ) - R A 4 (3a)

V2(s) = - R212(S) (3b)

which describe the constraints imposed on the operation of N by the source and load terminations. By using (2) and (3a), (3b), the voltage transfer function H ( s ) s V, ( s ) /E(s ) of the terminated network is obtained as

(4)

III I- (a)

IZZCS) 1 (C)

Fig. 1. (a) A doubly resistively-terminated two-port network N . (b) The two-port N as a symmetrical lattice network. (c) The two-port N as a Jaumann network.

In what follows, it is assumed that

R I = R , R . (53) c

Furthermore, it is assumed that the two-port network N is composed of passive LC elements only. Then,

because the two-port N is a reciprocal network. Finally, it is assumed that the two-port N is a symmetrical network. That is,

z21(s) = z12(s) (5b)

z22(s) = z11(s). (5c) In accordance with the above assumptions, the voltage

transfer function H ( s ) satisfies a relationship of the form [211

1 4 H ( s ) H ( - s) = (6)

1-[%12

where P ( s ) is an odd polynomial, and Q(s) is an even polynomial in s. Let sli, (for i, = 1,2; * e , n,) denote those roots of

P(s) + Q ( s > = 0, (7) which have negative real parts, and let s,~, (for i, = 1, 2; . ., n,) denote those roots which have positive real parts. Moreover, let

" 1

f'i(s) + Qi(s) = FI ( s - sii,) (sa) i, = 1

697 SOHROLZIAS er al.: A BILISEAR-LDI DIGITAL. JAUMANN FILTER

and transformer presents certain implementation problems. However, for a digital realization the implementation of the transformer in the corresponding I/-I SFG does not cause any practical problems. (The Jaumann structure has

" 2

i, = 1 f'2(s) + Q2(s) = II (s + s z i , ) (8b)

where P,(s), P2(s) are odd polynomials, and Q,(s>, Q2<s> are even polynomials in s. Then, the two-port N can be represented by a symmetrical lattice network as shown in Fig. l(b), where the series arm impedance Z, ( s ) and the lattice arm impedance Z 2 ( s ) are realizable LC driving- point impedance functions given by

or

Note that the normalized impedance function Z,(s)/R (where k = 1,2) for each of these two cases is the same as the normalized admittance function R/Z, (s ) for the other case. This implies that the corresponding impedances in the two cases are duals of each other.

The symmetrical lattice two-port network N in Fig. l(b) yields

L

and

L

By using (4). (5a)-(5c), and (9a), (9b), the voltage transfer function H ( s ) can be expressed more explicitly as

. (10) 1 W , W - Z,(s)I

H ( s) = - 2 R' + R [ Z,( s ) + Z,( s ) ] + Z,( s)Z,( s )

The order of this transfer function is n = n , + n,, where n , is the order of the impedance function Z,(s) defined above.

Let the symmetrical lattice in Fig. l(b) be replaced by the equivalent (unbalanced) Jaumann structure in Fig. l(c). Clearly, this has the advantage of exchanging half of the LC elements of the symmetrical lattice for an ideal transformer of turns ratio 1 : - 1. The Jaumann structure is a lossless two-port, and when substituted for the two- port network N in Fig. l(a). retains the low-sensitivity properties associated with maximum power transfer from the source to the load [22]. This structure has received very little attention for the development of prototype reference filters for the realization of active-RC and switched-capacitor filters, probably because the floating

. . successfully been exploited for implementing WD filters [ 3 ] and WD lattice filters [4].)

The number of LC elements required to realize the terminated Jaumann network can be limited to n , + n,, which is the same as the order n of the transfer function H ( s ) . This stems from the fact that, if realized in their canonical forms, each of the two impedances a k Z k ( s ) requires n k LC elements only, where CY, = 2 for k = 1, and ak = 1/2 for k = 2. That is, the network can be made canonical insofar as the number of LC elements is concerned.

In the following, the terminated Jaumann two-port network is used as the continuous-time reference filter for the development of a corresponding bilinear-LDI digital filter realization and implementation.

111. PRECOMPENSATION OF THE JAUMANN-STRUCTURED CONTINUOUS-TIME REFERENCE FILTER

In this section, a precompensated version of the terminated Jaumann-structured continuous-time reference filter is derived. The precompensated filter leads to an LDI digital filter realization which preserves the bilinear frequency transformation of the voltage transfer function of the original Jaumann-structured reference filter.

The precompensation of the reference filter is best facilitated by extracting the two impedances a k Z k ( s ) as ports, resulting in the network shown in Fig. 2(a) where the constituent four-port network M is as shown in Fig. 2(b). In what follows, it is assumed that the LC impedances a k Z , ( s ) are realized in their second Foster canonical forms [23] as shown in Fig. 2(c), where m , = n , / 2 for even n, and mk = ( n , + 1)/2 for odd n,. This form of realization of the impedances a,Z,(s) has the advantage of making the filter in Fig. 2(a) canonical in the number of LC elements. Moreover, it is assumed that at least one of the two impedance functions a,Z,(s) has a zero at infinity, implying that the capacitance element C,, is present in the second Foster canonical form of the realization of the respective impedance function. This condi- tion can always be satisfied by a judicious choice of the impedance functions Z k ( s ) or their duals in accordance with the opportunities provided by the cases A and B in Section 11. This makes possible the development of a corresponding precompensated network with a minimum number of LC elements.

A. Application of the Bilinear-LDI Precompensation Method The precompensation of the prototype reference filter

in Fig. 2 amounts to a modification of the voltage source E(s) , the source and load resistances R , and the impedances a k Z k ( s ) such that the LDI-transformed output voltage response of the precompensated version is the same as the bilinear-transformed response of the original


-0 +

(a)

0 1 1 I

(C) Fig. 2. (a) Jaumann-structured continuous-time reference filter. (b)

The constituent four-port network M. (c) Impedance akZk(s) realized in its second Foster canonical form.

reference filter. This is achieved [8], [91 by modifying the voltage source E(s ) in accordance with

1-- 2

Moreover, the source and load resistances R are modified to

( 12) R’ = &1/2

and two capacitance elements of the same value T / 2 R are connected across the ports 1 and 2 of the four-port network M. Then, the precompensated network can be obtained as shown in Fig. 3(a), where the impedances a&(s) represent the precompensated versions of the LC impedances a&&), and where R , denotes an impedance scaling parameter (to be defined in Section W. The precompensated impedances akZ;(S) are given by the “non-Foster” LC impedances shown in Fig. 3(b), and are obtained by placing a capacitance element of vdue T * / ~ L ~ , , across each inductance element Lkl, of the Foster LC impedances akZk(S), where 1, =

I

(b) Fig. 3. (a) Precompensated version of the continuous-time reference

filter. (b) Impedance a k Z / ( s ) / R o obtained from precompensation of a,Z,(s) /R, .

1,2; - a , mk. This completes the application of the precompensation scheme [81, [91.

B. Derivation of a Minimal-LC Precompemated Network Unfortunately, the important property of being canoni-

tal in the number of LC elements has not been preserved in the derivation of the precompensated network in Fig. 3. The key point in restoring this property is to employ the capacitor relocation scheme in Appendix A to replace the precompensated network in Fig. 3(a) by the equivalent network in Fig. 4(a), where each function Z;(s) represents the composite impedance formed by connect- ing a capacitance element of value T / ( 2 a k R ) across the impedance akz,$s) in Fig. 3(b). It is also important to recognize [ 101 that each composite branch consisting of the inductor Lkl,, the capacitor Ckl,, and the capacitance element of value T 2 / 4 L k I k in the (non-Foster) LC impedance (Ykz/(s) has the equivalent branch shown in Fig. 4(b) [13]. The application of this equivalence to the composite branches of the impedances (Ykz,$s) leads to the equivalent canonical (precompensated) second Foster LC impedances Z;(s), as shown in Fig. 4(c), having the following element values:

#

Li l = L,,

+ + mk c

I , = 2

T 2 C k l k

k l k

T 2 CkIk + -

4Lklk

NOWROCZIAF~ et al. : A BILINEAR-LDI DIGITAL JAUMANN FILTER 699

I I

(a)

(C)

Fig. 4. (a) Application of capacitor relocation scheme to the precompensated filter. (b) Composite branch equivalence in the impedance akZi(s). (c) Impedance Z l ( s ) / R , obtained as a second Foster canonical equivalent of a,Z,$s) /R, ( R O C / , is present even if Ckl has zero value).

and

for 1, = 2,3; . . , m k . It G important to observe that the precompensated network in Fig. 4 has the same topology as well as the same element &pes as the original filter in Fig. 2. The only exception is that the capacitance elements Ci1 are always present in the constituent precompensated impedances Z;(s), whereas one of the capacitance ele-

ments c k ] may not be present in the second Foster canonical form of the realization of the corresponding impedance function akZk(s). Consequently, the precompensated version of the Jaumann-structured continuous- time reference filter may be obtained with a minimum number of L C elements, simply by modifying the L C element values in accordance with (13a)-(13d).

The voltages T(s) (for p = 1,2,3,4) in the precompensated filter in Fig. 4 are related to the voltages Vp(s) in the original filter in Fig. 2, in accordance with

V; ( s 1 I s =(I, TX,?'/Z -*-1/Z) = vp( s) I s = ( 2 / T X z - I)/(,? + 1) ( 14)

provided that the bilinear frequency transformation in (1) is used to map the precompensated source voltage E'(s) . This essentially implies that the LDI realization of the precompensated filter in Fig. 4 implements the bilinear- transformed response function of the filter in Fig. 2, as desired.

IV. CONTINUOUS-TIME V-Z SFG REALIZATION OF

THE PRECOMPENSATED JAUMANN NETWORK This section is concerned with the realization of the

precompensated Jaumann-structured network in Fig. 4 as a V-Z SFG such that it incorporates continuous-time integrating one-pair transmittances as the only frequency- dependent branches. This is achieved by using the relationships

I Vi( s) - Vi( s) - Vi( s) = 0

V / ( s ) + V,(s) -2V-&4 = o Z~(s)-Zi '(s)+2Z; '(s)=O

Zf( s) + I;( s) + ZJ( s) = 0

which characterize the operation of the constituent four- port network M , to simulate M as a V-Z SFG four-pair. Moreover, the relationships

R' V,l( s) = E'( s) - -ZT( s)

RI3

which characterize the operation of the terminations of the network M , are used to simulate each of the four terminations as a V-Z SFG one-pair.

There is a variety of ways in which this SFG realization may be carried out such that each of the voltage variables VCs) and current variables Z$s) appears as a distinct node variable in the SFG. However, there are certain important practical matters to consider insofar as the precompensated Jaumann-structured network in Fig. 4 is


concerned. Each termination of the four-port network M involves a V-Z one-pair. It is known from the preceding section that after precompensation, the impedances Z;(s) will give rise to the capacitance elements Cl1 directly across ports 3 and 4 of the four-port network M. Recall- ing that it is intended to employ LDI (integrating) transmittances (as opposed to differentiating transmittances) to simulate the corresponding capacitive integrating V-Z one-pair transmittances ~ / S C ; ~ in the SFG, it is evident that the SFG transmittances corresponding to both impedances Z ; ( s ) shall be Z-type [23], as desired. That is, the transmittances simulating these impedances shall have independent current variables at their input nodes and dependent voltage variables at their output nodes. This immediately leads to the conclusion that, insofar as the SFG realization of the four-port network M is concerned, the currents Z;(s) and Z:(s) should be dependent variables appearing as the output node variables of the

and V:(s) are independent variables appearing as its input node variables.

In addition to the above choice of independent and dependent V-Z variables at ports 3 and 4 of the four-port network M , it is also necessary to make a corresponding choice regarding the source port 1 and the load port 2 of M . In this contribution, Y-type [23] (admittance-type) SFG one-pair transmittances are employed to simulate the

nations are regarded as being of conductance type. Then, the SFG realization of the four-port network M will have the currents Z;(s) and Z;(s) as independent (input) node variables, and the voltages V,l(s) and V,’(s) as dependent (output) node variables.

In accordance with the above choice of independent/ dependent V-Z variables, (15) is recast in the form

4 four-pair SFG, and that the corresponding voltages V;(s)

” source and load terminations, implying that these termi-

I Vi( s) = 1/2Vi( s) + e( s) Vi( s) = - 1/2Vi( s) + Vi( s) Z{( s) = - 1/2Z?( s) + 1/2Z$( s)

Z4‘( s) = - I [ ( s) - Z$( s)

I I and (16) is recast in the form

V,’(si z;( s) = - - R’ - I

To ;m sR,,LL, sR,,C‘L

(C) Fig. 5. (a) Continuous-time SFG realization of ‘he precompensated

filter. (b) Realization of the four-pair SFG M. (c) All-integrator realization of canonical precompensated impedance Z [ ( s ) / R , .

These relationships are simulated by the terminated V-I SFG rzalization shown in Fig. %a), where the four-pair SFG M (representing the SFG simulation of the four-port network M ) is shown in Fig. 5(b). Finally, the transmittances Z;(s)/Ro are realized as shown in Fig. 5(c), incorporating integrating branches only [23].

In the following section, it is shown that the I/-Z SFG implementation in Fig. 5 leads to a corresponding discrete-time SFG which is devoid of delay-free loops. How- ever, the other possible selections of pairs of independent variables from among v(s), Z$s), lead to discrete-time SFG’s that have delay-free loops, which are of course not realizable. Therefore, the SFG in Fig. 5 is proposed as the most suitable SFG for the LDI digital realization of the precompensated Jaumann-structured network.

(17)

( 18)

V. LDI DIGITAL REALIZATION The terminated V-I SFG in Fig. 5 may be replaced by a

corresponding LDI digital realization, simply by replacing every continuous-time integrator contained in the trans-

SOH ROL'ZIAS er ai.: A BILISEAR-LDI DIGITAL JAUMANN FILTER 70 1

TABLE I NUMBER OF ELEMENTS IN THE

DIGITAL JAUMA" FILTER

Element type

I

(C)

Fig. 6. (a) The bilinear-LDI digital Jaumann filter realization. (b) Realization of the four-pair structure M . (c) Realization of the one-pair structure Z L k ) .

mittances Z i ( s ) / R , by a corresponding LDI digital integrator in accordance with [ 5 ]

1 1 ( 19) -

-+ T21/2 - z - 1 / 2 .

The resulting LDI realization, however, will contain half- delay elements. In order to eliminate these half delays, the impedance scaling parameter R , is selected as [51

R , = Rzl/'. (20) This causes every normalized inductive s-domain transmittance R , / ( s L ; l k ) to be transformed to a digital integrating transmittance in accordance with

Similarly. every normalized capacitive integrating transmittance 1 / s C i I L R , , is transformed to a digital integrating

2nt4 t f2J n + l + ( l J

transmittance in accordance with

Finally, taking into account (121, the normalized resistive terminations R' / R , are transformed in accordance with

R' -+1. (21c) Ro

This leads to the digital filter realization shown in Fig. 6(a), where the four-pair structure ni' is as shown in Fig. 6(b). Moreover, the one-pair structures g [ ( z ) are as shown in Fig. 6(c) where the multiplier coefficients mplklk and mpckl, are given by

and

In the above LDI digital filter realization, the input signal EXz> is related to the precompensated source voltage E'(s ) through the mapping of bilinear frequency transformation in accordance with

1-- 2

Then, from (11) and (231, E!( 2 ) = (1/2)( 1 + z ) E ( 2 ) (24a)

where

a 2 ) = E ( S ) l s = ( 2 / T X z - l ) / ( r + l ) . (24b) It should be noted that the required compensated source signal &z) is unrealizable because the constituent transmittance (1/2X1+ z ) is non-causal. It is possible, however, to realize z-',??(z>, merely by replacing (1/2X1+ 2 )

by the realizable transmittance z-'[(1/2Xl+ z ) ] = (1/2). (1 + 2-l) . Then, the transfer function &z) v ( z ) / E ( z ) of the LDI digital filter realization is given by

A( 2 1 = 2 - "( s ) I s = ( 2 / T X z - I),( I + 1) . ( 25 1 The extra factor 2 - l thus introduced has no effect on the magnitude-frequency response of the filter, and merely modifies the phase-frequency response by a constant delay term.

The number of elements required for the implementation of the Jaumann-structured digital filter in Fig. 6 is tabulated in Table I, where 1 adder, 1 multiplier, and


1 unit-delay are associated with the implementation of the source compensation stage. The parenthesized terms in the entries in Table I are absent if both capacitances c k 1 in the second Foster canonical realization of the impedances a,Z,(s) (Subsection 111-B) are nonzero, which is, for example, the case when realizing lowpass and bandpass transfer functions. Otherwise, if one of the capacitances c k 1 is zero, then the parenthesized terms are present (for example, in the realization of highpass and bandstop transfer functions). In deriving the number of digital multipliers in Table I, it has been assumed that the coefficient values of-the two multipliers contained in the four-pair structure M are changed from f 1/2 to f 1, respectively, resulting in a reduction of the number of actual multipliers by 2. This can be achieved by trans- forming the multiplier coefficients mpllIl and mpc,,, in accordance with mpl,,, + 4mpllIl and mpc,,, + mpc,,, /4.

The most important feature of the above digital Jaumann filter is that it can realize elliptic transfer functions and, in

digital filter structures [5]. This property amounts to an exact one-to-one correspondence between the LC elements of the continuous-time prototype reference filter and the LDI integrators in the resulting digital filter structure. This correspondence allows all the inductor-based states to be computed simultaneously, and all the capacitor-based states to be computed simultaneously, thereby making it possible to at- tain a 2 -cycle parallel processing scheme where the overall processing speed is (virtually) independent of the order of the filter. This is possible because the recursive state equa- tions for the digital Jaumann filter may be arranged in the form

I addition, exploit the fundamental property of the LDI ladder

i

where X J v ) and X J v ) are m x l vectors of inductor- based and capacitor-based states, respectively, B is an m X 1 vector, and A,, and A,, are m X m matrices with their entries being multinomials in multiplier coefficients mplkIk and mpckr,, ; ( U ) is the input sequence, and m = m, + m,. Thus, the inductor based states XL(v + 1) may be computed simultaneously during a single time slot. Subse- quently, the states XL(v + 1) may be used in a second time slot to simultaneously compute the capacitor states Xc(v + 1). As a result, the complete state-equation com- putations can be completed in two non-overlapping time slots in each sample interval, regardless of the order of the Jaumann filter.

VI. DESIGN AND DSP-CHIP IMPLEMENTATION OF A

DIGITAL JAUMANN SIXTH-ORDER ELLIPTIC BANDPASS FILTER

In order to verify that the above design method lends itself to the practical implementation of very high-quality digital filters, the implementation of an ultra narrowband sixth-order elliptic bandpass transfer function satisfying

Fig. 7. Bilinear-LDI digital Jaumann filter realization of a sixth-order elliptic bandpass transfer function.

TABLE I1 DESIGN SPECIFICATTONS FOR THE SIXTH-ORDER DIGITAL ELLIPTIC

BANDPASS FILTER

Bandpass Filter Spec$icatiom

h: Upper passband edge 20000.20 H z

the specifications in Table I1 is described. The corresponding bilinear-LDI digital Jaumann filter realization is shown in Fig. 7. The AT&T DSP32-250 floating-point DSP chip (250 ns instruction cycle time) is used for implementing the corresponding digital filter algorithm, and 12-bit A/D and D/A converters are used to permit analog measurement of the magnitude frequency response.

By choosing R = 1 R, the values for the elements L k l ,

and Ck,, of the corresponding continuous-time reference Jaumann filter in Fig. 2 are obtained as given in Table 111, where 1, = 1,2; * , m k , with mk = 4 for k = 1 and mk = 2 for k = 2. Furthermore, the values for the elements LZlk and C& of the precompensated filter in Fig. 3 are given in Table IV. Finally, the values for the multiplier coefficients mplkIk and mpcklk of the digital Jaumann filter in Fig. 7 are given in Table V. In the following, a comparison is made between the theoretical ideal magnitude-frequency response of the digital Jaumann filter (generated using DIGICAP [251) and the corresponding experimental measurements.

The digital Jaumann filter, operating at an A/D sample rate of 93.75 kHz (the maximum rate possible for this algorithm using the selected DSP chip), has the extraordi-

T

NOWROUZIAN et al.: A BILINEAR-LDI DIGITAL IAUMA" FILTER 703

,

- ideal - measured

A p = O J d B A, = 30.0 dB /, = 19999.80 HZ f2 = 2owO.20 HZ

-7 , \ 1 0 10 20 30 40

/. kHz

(a) lt i(dW)I. d8 0

-I5

-30

-45

-60 -1 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1

f - /@ Hz

(b) 0 -

-0.25 -

-0.5 -

-0.75 -

f - fp Hz

-0.25 -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0.25

(C) Fig. 8. (a) Ideal and measured magnitude-fre uency response of the

sixth-order digital elliptic bandpass filter. (8 Ideal and measured magnitude-fre uency res onse in the passband, transition bands, and stopbands of $e filter. 4) Ideal and measured rnagnitude-frequency response in the passband of the filter.

narily narrow passband shown in Fig. 8(a), that is, a passband-width of only 0.40 Hz at a center frequency of f,, = 20000.00 Hz. The experimental verification of the magnitude-frequency response is non-trivial, due to the long transients associated with the extremely narrow passband-width. It is also necessary to synchronize the sinu- soidal excitation generator with the sample rate of the A/D and D/A converters in order to accurately deter- mine the frequency of the excitation source. The measured magnitude-frequency response of the filter is shown

TABLE I11 ELEMENT VALUES FOR THE REFERENCE

JAUMANN FILTER

6.47175741 x l@I1 H

TABLE IV ELEMENT VALUES FOR THE PRECOMPENSATED FILTER

TABLE V MULTIPLIER COEFFICIENTS FOR THE

DIGITAL JAUMANN SIXTH-ORDER BANDPASS FILTER

7.1361268 x lPS

...................... "

in Figs. 8(a), 8(b), and 8(c) together with the corresponding theoretical ideal response. The passband response in Fig. 8(a) appears as what looks like a "spike"; in Fig. 8(b), it is observed that the response is correct (within the measurement errors) in the transition band around 20000.00+ 1.00 Hz; in Fig. 8(c), it is observed that the theoretical ideal passband ripple of 0.5 dB is accurately achieved.

The above experimental results also confirm the results of the computational investigations in [24] regarding low passband sensitivity characteristics of the digital Jaumann filter.

VII. CONCLUSIONS A novel, very high-quality bilinear-LDI digital Jaumann

filter has been proposed. The salient feature of the proposed digital Jaumann filter is that it permits all of the even states within the filter to be determined simultaneously and all of the odd states to be determined simultaneously, thereby providing the opportunity to employ parallel processing to achieve a fast two-cycle digital filtering operation which is virtually independent of the order of the filter. Furthermore, it is capable of realizing any transfer function derived (or derivable) by the bilinear frequency transformation of the voltage transfer function of an equally resistively terminated symmetrical lossless two-port network (including the important class of elliptic

*


7

(a)

(b) Fig. 9. Definition of four-port network. (a) ka. (b) Mb.

transfer functions). Finally, it is minimal in the number of digital multipliers, requiring n multipliers for the discrete-time digital realization of nth order continuous-time lowpass and bandpass transfer functions, and n + 1 multipliers for the realization of the corresponding highpass and bandstop transfer functions. It has been shown that the digital Jaumann filter exhibits very high quality-performance characteristics by applying it to a DSP-chip implementation, on an AT&T DSP32 Development Sys- tem, of an ultra narrowband sixth-order elliptic bandpass transfer function.

APPENDIX A

Capacitor Relocation in Precompensated Network The purpose of tkis appepdix is to show that the

four-port networks Ma and Mb in Fig. %a) and (b) are equivalent.

The four-port &a has been obtained through an augmentation of the four-port M in Fig. 2(b), by placing a capacitor of value C across port 1 of M, and a caRacitor of the same value C across port 2. The four-port Mb has been obtained through a similar augmentation of the four-port M, by placing a capacitor of value C/2 across

port 3 of M, and a capacitor of value 2C across port 4.

matrix description To prove the above network equivalence, the hybrid

0 1/2 1 0 -1/2 1

-1/2 1/2 0 0 - 1 - 1 0 0

of the four-port M is emeloyed to derive the port constraints for the four-port Ma, where V,,(S), ZPa(s) are the voltage-current variables at the p th port (for p = 1,. - * ,4) of da. The equivalence is then established by observing that &tu and $b impose the same constraints on their corresponding port variables.

By rewriting (Al) in the form

and by manipulating the result, the following hyb;id matrix representation is obtained for the four-port Ma:

In a simjlar manner, the set of constraints for the four-port Mb is obtained as

7

NOKROCZIAS et al.: A BILINEAR-LDI DIGITAL JAUMANS FILTER 705

where V,,(s), I P b ( s ) are the voltage-current variables at the pth port of M,,. By rewriting equation (A4) in the form

0 [:;!;/;I+[! I 0 0

0 0 0 - 2 s c

0 0 1/2 1

-1/2 1/2 0 0 = [ O 0 -1/2 1

-1 -1 0 0

the following hybrid matrix representation is obtained for the four-port A t ! , :

2 sc

0 0 1 /2 0 -1/2

-1/2 1/2 1/2 sc 0 -1 -1 0

A comparison of (A3) and (A6l establiskes the equivalence of the four-port networks MO and Mb.

ACKNOWLEDGMENT The authors wish to thank AT&T for their generous

donation of the DSP32 Development System and software development tools.

REFERENCES [ I ] A. Fettweis. “Digital filter structures related to classical filter

networks.“ Arch. Elektron. Uehertrag., vol. 25, pp. 79-89, Feb.

[91

1971. A. Sedlmeyer and A. Fettweis, “Digital filters with true ladder configuration.” International Journal of Cir. Theory and Appl., vol. 1, pp. 5-10, Mar. 1973. R. Nouta, “The use of Jaumann structures in wave digital filters,” International Joumul of Cir. Theory and Appl., vol. 2, pp. 163-174, June 1974. A. Fettweis, H. Levin, and A. Sedlmeyer, “Wave digital lattice filters,” International Journal of Cir. Theoiy and Appl., vol. 2, pp. 203-211, June 1974. L. T. Bruton, “Low sensitivity digital ladder filters,’’ IEEE Trans. Circuits Syst., vol. CAS-22, pp;‘168-176, Mar. 1975. M. S. Lee and C. Chang, Low sensitivity switched-capacitor ladder filters,’’ IEEE Trans. Circuits Syst., vol. CAS-27, pp. 175-480. June 1980. M. S. Lee. G. C. Temes, C . Cbang, and M. B. Ghaderi, “Bilinear switched-capacitor ladder filters,” IEEE Trans. Circuits Syst ., vol. CAS-38. pp. 811-822, Aug. 1981. L. E. Turner. E. S. K. Liu, and L. T. Bruton, “Digital LDI ladder filter desien using the bilinear transformation,” in Proc. 1984 Intemutionh Symposium on Circuits Syst., Montreal, P.Q., Canada, pp. 1Ol7-103O. Ma\ 198-1. L. E. Turner and-B. K. Ramesh, “Low sensitivity LDI ladder filters uith elli tic magnitude response,” IEEE Trans. Circuits Syst.. ~ o l . C,\S-&. pp. 697-706. July 1986.

B. K. Ramesh, “A method of designing digital LDI ladder filters using the bilinear transformation,” MSc. thesis, Dep. of Elec. Eng., University of Calgary, Calgary, Alberta, Canada, Sec. 5.4.2, Dec. 1986. B. D. Green and L. E. Turner, “Digital bilinear-LDI ladder filters using lattice equivalents and wave concepts,” Proc. 1988 Interna- tional Symp. on Circuits Syst., Espoo, Finland, pp. 539-542, June 1988. E. A. Guillemin, Synthesis of Passice Networks. New York: Wiley, 1965, 5th Ed. A. I . Zverev, Handbook of Filter Synthesis. New York: Wiley, 1967. G. Szentirmai, “FILSYN - A general purpose filter synthesis program,” in Proc. IEEE, vol. 65, pp. 1443-1458, Oct. 1977. A. H. Gray, Jr., and J. D. Markel, “Digital lattice and ladder filter synthesis,” IEEE Trans. Audio Electroacoustics, vol. AU-21, pp. 491-500, Dec. 1973. P. P. Vaidyanathan and S. K. Mitra, “Low passband sensitivity digital filters: A generalized viewpoint and synthesis procedures,” in Proc. IEEE, vol. 72, pp. 404-432, Apr. 1984. D. A. Vaughan-Pope, “Low-sensitivity digital ladder filters,” Ph.D. dissertation, Dep. of Elec. Eng., University of Calgary, Calgary, Alberta, Canada, May 1976. L. T. Bruton and D. A. Vaughan-Pope, “Synthesis of digital ladder filters from LC filters,” IEEE Trans. Circuits Syst., vol. CAS-23, pp. 395-402, June 1976. E. S . K. Liu, L. E. Turner and L. T. Bruton, “Exact synthesis of LDI and LDD ladder filters,” IEEE Trans. Circuits Syst., vol. CAS-21, pp. 369-381, Apr. 1984. R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. A. J. Grossman, “Synthesis of Tchebycheff parameter symmetrical filters,” Proc. IRE, vol. 45, pp. 454-473, Apr. 1957. H. J. Orchard, “Inductorless filters,” Elect. Letters, vol. 2, pp. 224-225, June 1966. L. T. Bruton, RC Actic.e Circuits. Englewood Cliffs, N.J.: Pren- tice-Hall, Inc., 1980 Chap. IO. B. Nowrouzian and L. S . Lee, “A new approach to the design of bilinear-LDI digital filters having low-passband sensitivity,” in Proc. 31st Midwest Symp. Circuits and Syst., University of Missouri-Rolla, St. Louis, MO, Aug. 10-12, 1988. L. E. Turner, D. A. Graham, and P. B. Denyer, “The analysis and implementation of digital filters using a special purpose CAD tool,” IEEE Trans. Education, vol. 32, pp. 287-297, Aug. 1989.

New York: Wiley, 1986, Ch. 5.

Behrouz Nowrouzian received the BSc. degree in electrical engineering from Arya-Mehr Uni- versity of Technology, Tehran, Iran, in 1975. He received the M.Sc., D.I.C., and Ph.D. degrees in electrical engineering from Imperial College of Science and Technology, University of London, London, England in 1976, 1977, and 1983, respectively.

From 1983 to 1985, he waq a post-doctoral fellow at the Department of Electrical Engi- neering, Concordia University, Montreal, Que-

bec, Canada Since 1985, he has been an Assistant Professor at the Department of Electrical Engineering at the University of Calgary, Calgary, Albertd, Canada His main research interests are in approxima- tion, synthesis, DSP and VLSl implementation of mlcroelectronic filters, artificial neural networks, and expert systems.

Dr Nowrouzian was presented with the Myril B. Reed Best Paper Award by the Midwest Symposium on Circuits and Systems in 1985 for a contribution to the field of switched-capacitor filter design.

706

It ’i

Norman R. Bartley (S’75-M’78) received the B.Sc. and M.Sc. degrees in electrical engineering from the University of Calgary, Calgary, Alberta, Canada, in 1976 and 1978, respectively.

From I979 to 1983, he was employed in the Department of Electrical Engineering at the University of Calgary as a Research Engineer. In 1983, he was with the Department of Electri- cal Engineering at the University of Victoria, Victoria, British Columbia, Canada, as a visiting Assistant Professor. and in 1984 as a Research

Engineer. He is currently employed at the University of Calgary as a Research Associate to the Dean of the Faculty of Engineering. His main fields of interest include image processing and digital signal processing systems and architectures.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. 37, NO. 6, JUNE 1990

Leonard T. Bruton (M’71-SM’80-F’81) received the B.Sc. degree in electrical engineering from London University, London, England, in 1964, the M.Eng. degree in electrical engineering from Carleton University, Ottawa, Ont., Canada, in 1967, and the Ph.D. degree in electrical engineering from the University of New- castle-upon-Tyne, Newcastle-upon-Tyne, Eng- land, in 1970.

From 1970 to 1983, he was Professor in the Department of Electrical Engineering at the

University of Calgary, Calgary, Alberta, Canada. From 1983 to 1985, he was the Dean of the Faculty of Engineering at the University of Victoria, Victoria, British Columbia, Canada. Currently, he is Dean of the Faculty of Engineering and a Professor in the Department of Electrical Engineering at the University of Calgary. His main research interests are in microelectronic filters, digital-filter synthesis, image processing, and the application of filters in communications.

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Design and DSP-chip implementation of a novel bilinear-LDI digital Jaumann filter