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PSUT
EE3335 Digital Electronics Second Exam
Dec. 16, 2009
:: For all questions in the exam let: (W/L)n= 1/2 (W/L)p=0.375m/0.25m ,n=2p= .045m
2/Vs , Cox= 6fF/m
2 , Vtn=|Vtp|=1V, VDD=5V, VBE=0.75V at Iemitter=1mA .
Q1 (5 points)
Circle the best answer for the following:
1- For the circuit in the figure to the right vO2=VCC when:
a- vI=VT=kT/q.
b- vI=4VT.
c- vI=VR +VT.
d- vI=VR +4VT.
e- vI=VR -4VT.
f- None of the above.
2- If the output of the circuit to the right is high, its output
impedance will be:
a- fff
b- Fff
c- Fff
d- Fff
e- None of the above
3- To match the CMOS inverter transistors we need:
a- (W/L)n= (W/L)p.
b- kn=kp.
c-
=
.
d-
=
e- All of the above.
f- None of the above.
2
4- The output for this pass-transistor gate is:
a- = , = .
b- = , = .
c- = + , = .
d- = + , = + .
e- = + , = + .
f- None of the above
5- The purpose of QR is :
a- Pull up network (PUN).
b- To charge C from 0 to VDD.
c- OR function with Q1.
d- None of the above.
e- All of the above.
3
Q2(8 points)
1- Draw a CMOS realization for the function = + + .
2- Calculate the sizes of all transistors in the PUN network.
4
Q3( 9 points)
1- Find the power loss in both load resistors RT and output followers,
given VOH=-0.88V and VOL=-1.77V.
2- Find the input low and output high
voltages if the gate is considered to
start its transition when 90% IE is
switched.