De LAB Manuals

DEPARTMENT OF ELECTRONICS &

COMMUNICATION ENGINGEERING

LAB-MANNUALS

SYLLABUS.

4EE8 DIGITAL ELECTORNICS LAB1 Study of following combinational circuits: Multiplexer, Demultimplexer and Encoder. Verify truth tables of various logic functions.2 Study of various combinational circuits based on: AND/NAND Logic blocks and OR/NOR Logic blocks.3 To study various waveforms at different points of a transistor bistable multivibrator and itsfrequency variation with different parameters.4 To design a frequency divider using IC-555 timer.5 To study various types of registers and counters.6 To study Schmitt trigger circuit.7 To study transistor astable multivibrator.8 Experimental study of characteristics of CMOS integrated circuits.9 Interfacing of CMOS to TTL and TTL to CMOS.10 BCD to binary conversion on digital IC trainer.11 Testing of digital IC by automatic digital IC trainer.12 To study OP-AMP as Current to Voltage & Voltage to Current converters & comparator.

DO’S AND DON’T’S

DO’S

Maintain strict discipline.

Proper handling of apparatus must be done.

Before switching on the power supply get it checked by the lecturer.

Switch off your mobile.

Be a keen observer while performing the experiment

DON’TS

Do not touch or attempt to touch the mains power directly with bare hands.

Do not manipulate the experiment results.

Do not overcrowd the tables.

Do not tamper with equipments.

Do not leave the lab without prior permission from the teacher.

INSTRUCTIONS TO THE STUDENTS

GENERAL INSTRUCTIONS

Maintain separate observation copy for each laboratory.

Observations or readings should be taken only in the observation copy.

Get the readings counter signed by the faculty after the completion of the

experiment.

Maintain Index column in the observation copy and get the signature of the

faculty before leaving the lab.

BEFORE ENTERING THE LAB

The previous experiment should have been written in the practical file,

without which the students will not be allowed to enter the lab.

The students should have written the experiment in the observation

copy that they are supposed to perform in the lab.

The experiment written in the observation copy should have aim,

apparatus required, circuit diagram/algorithm, blank observation table

(if any), formula (if any), programme (if any), model graph (if any)

and space for result.

WHEN WORKING IN THE LAB

Necessary equipments/apparatus should be taken only from the lab

assistant by making an issuing slip, which would contain name of the

experiment, names of batch members and apparatus or components

required.

Never switch on the power supply before getting the permission from

the faculty.

BEFORE LEAVING THE LAB

The equipments/components should be returned back to the lab

assistant in good condition after the completion of the experiment.

The students should get the signature from the faculty in the

observation copy.

They should also check whether their file is checked and counter

signed in the index.

LIST OF EXPERIMENTSIII SEM CS & IT

1. Study of logic gates.

2. Design and implementation of adders and subtractors using logic gates.

3. Design and implementation of code converters using logic gates.

4. Design and implementation of 4-bit binary adder/subtractor and BCD adder

using IC 7483.

5. Design and implementation of 2-bit magnitude comparator using logic gates,

8-bit magnitude comparator using IC 7485.

6. Design and implementation of 16-bit odd/even parity checker/ generator using

IC 74180.

7. Design and implementation of multiplexer and demultiplexer using logic gates

and study of IC 74150 and IC 74154.

8. Design and implementation of encoder and decoder using logic gates and

study of IC 7445 and IC 74147.

9. Construction and verification of 4-bit ripple counter and Mod-10/Mod-12

ripple counter.

10. Design and implementation of 3-bit synchronous up/down counter.

11. Implementation of SISO, SIPO, PISO and PIPO shift registers using flip-flops.

EXPERIMEMT No.-1

OBJECT: To test digital IC by automatic digital IC Trainer kit.

APPARATUS REQUIRED :

S.No. Equipment Specification Quantity

1. Digital IC Trainer kit

- 1

2. I.C. 74007404555

221

THEORY :

IC testing can be done by IC trainer kit. The automatic digital IC trainer kit work on some modes. The modes of operation of this kit are:

a) IC testerb) Micro-computerc) Programmerd) Cable tester

The keyboard is divided in three modes for all above modes:a) 4X3 matrix for fundamental keys.b) 4X4 matrix is for ALPHANUMERIC KEYS.c) A6 key block for MODE SELECTION KEY.

Mode Selection Keys: IC test: This is mode selection key. It selects mode 1. COMP: This is mode selection key. It selects mode 2. PGMR: This is mode selection key. It selects mode 3. CBL Test: It selects mode 4. RST: This key is hardware result. In result system, select IC test mode and

display on self-test. TEST/ PGM: This is multiple function key. HUNT: This key is used as “ HUNT keys “ for identifying unknown IC’s ,

when IC tester is displaying messages IC number.

Message in IC tester mode: HELLO- This message flashes thrice if RAM test is OK.

IC NO??- This message with flashing question makes and prompt user an IC number.

IC GOOD- This message is displayed when IC that was being tested passed functional test.

IC BAD- This message is displayed when IC that was being tested being fails in anyone of the test.

Messages during “ HUNT” [auto search] modes of IC tester. “HUNTING-FOUND” indicates system is hunting for an unidentified IC is not functioning.

CIRCUIT DIAGRAM:

OBSERVATION:

S..No. IC No. Pin no. Condition (good/bad)

Substitute IC

1.2.3.

PROCEDURE:

1. IC testing mode is mode 1 of system, selected at power ON and hardware result. This mode can also be selected from other modes by pressing “IC Test Key”.

2. On selection of this mode by default self diagnostic RAM test message is displayed followed by prompt “IC no….??” If at power on self-diagnostic test fails. System is waiting for number of IC to be tested.

3. At this stage TEST SOCKET is potential free. User IC should be tested in test socket properly.

4. While inserting IC under test in test socket, care should be taken to align bottom edge of IC under test with bottom edge of test socket.

PRECAUTION:

1. IC should be inserted carefully.2. Handle the IC carefully.

Viva Quiz:

1.Draw the internal circuit for a Decoder?

2.What are the applications of decoders?

3.Draw the internal circuit of an encoder?

4.What are the applications of Priority encoder?

5.Design a 3:8 decoder using 2:4 decoders

RESULT:

Various IC’s have been tested successfully using IC tester.

DISCUSSION:

Any IC condition can be tested as well as IC no. can be found out by means of IC tester.

EXPERIMEMT No.-2

OBJECT: - Study of various combinational circuits based on: AND/NAND logic blocks and OR/NOR logic blocks.

APPARATUS REQUIRED:

S.No. Apparatus Specification Quantity1. Integrated chips

(IC)NAND gate-7400NOR gate-7402NOT gate-7404

111

2. Connecting wires - -3. Digital trainer kit - 1

THEORY:

NAND GATE: NAND gate is complemented AND gate. Output of NAND gate will be 1 if anyone of the input is a zero and will be zero only when all the inputs ,re 1. If the inputs are A & B of a NAND gate then output is given as:

Y = (A. B)’NOR GATE: NOR gate is complemented OR gate. Output of NOR gate will be 1 only when all inputs are zero and will be zero if any input represents a 1. If the inputs are A & B of a NOR gate then output is given as:

Y= (A+B)’NOT GATE NAND gate is physical realization of the complement operation. It is an electronic circuit that generates an output signal, which is reverse of the input signal. A NOT gate is also known as inverter because it inverts the input. If the input of NOT gate is A then output is given as:

Y=A’

AND GATE: AND gate is physical realization of the logical multiplication. Output of AND gate will be1 only when all the inputs are 1. If the inputs are A & B then AND gate output is given as:

Y=A.B

AND = NAND + NOT or NAND = AND + NOT

OR GATE:OR gate is physical realization of the logical Addition. Output of OR gate will be1 if any of the input signal is 1. If the inputs are A & B of a OR gate then output is given as:

Y=A+B OR=NOR+NOT or NOR=OR+NOT

Some IC’s:

NAND 7400:In this IC there are four nand gates. Pin no 7 is grounded and 14 is connected to power supply. Input pins are (1,2), (4,5),(9,10),(12,13) and output of these nand gates is taken across pin 3,6,8 and 12 respectively.

NOR 7402:It is also called quad-2 input nor gate IC. In this IC nor gate input is given from (2,3),(5,6),(8,9),(11,12) and output pins are 1,4,10 and 14 respectively.

NOT 7404:

It is also called not gate IC and is also called MUX inverter as there are 6 not gates in it. If we give input ‘0’ then we get ‘1’ as output and vise versa.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

A B NOTY=A’

ANDY=A.B

ORY=A+B

NANDY=(A.B)’

NORY=(A+B)’

0 0 1 0 0 1 10 1 1 0 1 1 01 0 0 0 1 1 01 1 0 1 1 0 0

PROCEDURE:

1. Insert the IC on bread-board.2. Make pin no 7 grounded and connect pin no 14 to power supply.3. Now provide inputs as specified in circuit diagram.4. Take output across respective pins.5. Any operation such as and, or, half adder etc. can be performed using these

IC’s.

PRECAUTIONS:

1. Insert IC on bread-board tightly.2. Don’t forget to ground pin no. 7.3. Hold the IC properly.

RESULT:

Study of various combinational circuits has been done using IC 7400 ,7402

DISCUSSION:

Using these IC’s we can realize other combinational circuits easily. Since NAND and NOR are universal gates so we generally use IC 7400 and 7402.

Viva Quiz:

1.Demorgan’s second theorem is

2.The problem of logic race occurs in which logic.

3.In which function is each term known as min term.

4.In which function is each term known as max term.

5.In the expression A+BC, the total number of min terms will be.

6.AB+AB’=

7.In a four variable Karnaugh map eight adjacent cells give a

EXPERIMENT NO.3

OBJECT: - Study of Binary to Gray and gray to binary code converter and also verify the truth table for all the possible combinations.

APPARATUS REQUIRED:

S.No. Name of apparatus Specification Quantity1. Integrated chips 7480 -2. Patch Chords - -

3. Gray to binary converter kit

- 1

THEORY:

The conversion of gray to binary code is according to the formulaGn=Bn + Bn+1

BINARY CODE:Digital systems use signals that have two distinct values and circuit elements that have two stable states. A binary number of In’ binary circuit elements each having an output signal equivalent to 0 or 1. An In’ bit binary code is a group of In’ bits that assume up to 2n distinct combinations of 1’s and O’s.

GRAY CODE:

In case of Gray code only one bit in the code group changes when going from one number to the next e.g. on going from seven to eight, the gray code changes from 0100 to 1100 only, the first bit remains same.

BINARY TO GRAY CONVERSION:

1. The first bit (MSB) of gray code will be same as the first bit of binary number, so it will be noted as it is.

2. Now the second bit of gray code will be the XOR of the first and second bit of the binary number.

3. Similarly, the third bit of gray code will be XOR of second and third digit of binary number and thus the sequence will go on.

GRAY TO BINARY CONVERSION:

1. The first bit of binary code (MSB) will be same as first bit of gray code.2. The second bit of binary code is obtained by XORing the second bit of the

gray code and the previous noted bit of binary code, i.e. nth bit of binary = nth bit of gray (n+1 )th bit of binary

3. Similarly, the next bits are obtained by repeating the step 2 and thus sequence will go on.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

Gray Code Binary CodeG3 G2 G1 G0 B3 B2 B1 B00 0 0 0 0 0 0 00 0 0 1 0 0 0 10 0 1 0 0 0 1 10 0 1 1 0 0 1 00 1 0 0 0 1 1 10 1 0 1 0 1 1 00 1 1 0 0 1 0 00 1 1 1 0 1 0 11 0 0 0 1 1 1 11 0 0 1 1 1 1 01 0 1 0 1 1 0 01 0 1 1 1 1 0 11 1 0 0 1 0 0 01 1 0 1 1 0 0 11 1 1 0 1 0 1 11 1 1 1 1 0 0 0

PROCEDURE:

1. Make connections as per the circuit diagram.2. Give binary input to the circuit and you will get the equivalent gray output.3. Note the output.4. Repeat the process with different inputs.

PRECAUTIONS:

1. Connections must be tight and clear.2. Leads must be carefully pushed in ports.3. Output should be recorded correctly.4. switch off when equipment is not used.

RESULT:

Binary to gray and gray to binary code conversion has been done successfully.

DISCUSSION:

Gray code is that in which only one bit in the code group change when going from one no to the next. It belongs to the class of minimum-change codes. It is a non-weighted code. The experiment is implemented by Ex-OR gate IC-7486.

Viva Quiz:

1.Which takes more area? Ripple counters or Synchronous counters?

2.In a 3 bit binary counter what is the frequency of MSB if the frequency of operation

is f Hz?

3.Implement all 2input logic gates using 2:1 mux

4.Implement a 4:1 mux using 2:1 mux?

5.How many 2:1 mux are required in order to construct a 33:1 mux?

6.What is the difference between RS and JK flip flop?

7.What is race around condition? How can it be avoided?

EXPERIMENT No.-4

OBJECT: Study and perform binary to decimal encoder.

APPARATUS REQUIRED:

S.No. Equipment Specification Quantity1. Binary to decimal

encoder kit7447 trainer 1

2. Patch cordes - -

THEORY:

Binary number system-

The binary number system is the system consists of only two digits i.e. 0 or 1 with base 2. In a binary number, the weight of each successively higher position to the left is an increasing power of 2.

Decimal number system:

The decimal number system has 10 digit (0-9 ). It has base 10. It is most common no system is used in daily life.

Seven segment display (7730) and Encoder (7447):

A seven-segment indicator is used for displaying any one of decimal digit 0-9. Usually the decimal digit is available in BCD. ABCD to seven-segment decoder accepts a decimal digit in BCD and generator the code. The figure shows necessary connections between the decoder and display the IC 7447 is a BCD to seven-segment decoder driver. It has 4 input of BCD digit. In input 0 is most significant and A is least significant digit, the 4-bit BCD is converted to a seven digit segment code with a to g. The output of the 7447 is applied to the input of the 7730 seven-segment displays.Other equivalent seven segment display IC’s may have additional anode terminals and may require different resistors values.

BCD to 7- Segment Decoder:

The IC 7446/ 7447 are a special ckt tha5t can accept the standard 3421 BCD input and for 7446/ 7447 are shown which is used to operate a 7- segment read out.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

BINARY CODE DECIMAL CODED C B A0 0 0 0 0

0 0 0 1 10 0 1 0 20 0 1 1 30 1 0 0 40 1 0 1 50 1 1 0 60 1 1 1 71 0 0 0 81 0 0 1 9

PROCEDURE:

1) Arrange the binary to decimal decoder kit.2) Switch ON the power supply.3) Check the output by inserting the pin in their respective 0 and 1places.4) Observe the decimal output for the binary codes mentioned in the observation

table.

PRECAUTION:

1) All the connections should be tight.2) Do not touch the display.3) Switch OFF the kit , if not being used.

RESULT:

Study of binary to decimal encoder kit has been done successfully.

DISCUSSION:

Binary to decimal encoder drive a common anode 7-segment display. Each segment consist of one LED and the anode of all LED’s are connected to +Vcc. By forward biasing different LEDs the digits 0 through 9 can be displayed.

Viva Quiz:

1. What is gray code.

2. Convert 1000101110 in to gray code.

3. Convert gray 00110101010 in to binary code.

4. What is race around condition

EXPERIMENT NO.-5

OBJECT: - Study of following combinational circuits: Multiplexer, Demultiplexer. Verify truth tables of various logic functions.

APPARATUS REQUIRED:

S.No. Name of the apparatus

Specification Quantity

1. Integrated chips(IC) 74151,74138,7400,74163,7805

5

2. Connecting wires - -3. Digital trainer kit - 1

THEORY:

MULTIPLEXERS:

Multiplexer is a digital circuit, which has many inputs and single output. The

function of Multiplexer is to select one of the input lines and connect it to the

output. It is also known as data selector. Selection of desired input is done by

means of selection lines. Generally there are 2N input lines and N select lines

whose bit combinations determine which input is to be selected. It acts like a

digitally controlled switch. The select input is controlled by the select inputs

applied.

DEMULTIPLEXER:

Demultiplexer is digital circuit, which has one input line and many output lines. It is used to send a single input on one of the output lines and thus performs reverse operation of the multiplexer. It has one input and N outputs. The select input code determines to which output line the data input will be transmitted. In other words, demultiplexer takes one input data source and selectively distributes it to 1 of N output channels. The number of select lines is ‘S’ where,

N = 2^S.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

8-to-! Multiplexer:

INPUTS OUTPUTSS2 S1 S00 0 0 D00 0 1 D10 1 0 D20 1 1 D31 0 0 D41 0 1 D51 1 0 D61 1 1 D7

1-to-8 Demultiplexer:

Data input Select inputs OutputsS2 S1 S0 Y

7Y6

Y5

Y4

Y3

Y2

Y1

Y0

D 0 0 0 0 0 0 0 0 0 0 DD 0 0 1 0 0 0 0 0 0 D 0D 0 1 0 0 0 0 0 0 D 0 0D 0 1 1 0 0 0 0 D 0 0 0D 1 0 0 0 0 0 D 0 0 0 0D 1 0 1 0 0 D 0 0 0 0 0D 1 1 0 0 D 0 0 0 0 0 0D 1 1 1 D 0 0 0 0 0 0 0

PROCEDURE:

1. Make connections as per the circuit diagram.2. Provide input through input lines and obtain the multiplexed output.3. Note the corresponding output.4. Repeat the same process for demultiplexer.

PRECAUTIONS:

1. All connections must be tight.2. Check power supply circuit and other factors according to requirement.

RESULT:

Study of 8-channel digital multiplexer and demultiplexer has been done successfully.

DISCUSSION:

Multiplexer and demultiplexers have wide application in digital communication. In case of multiplexing several signals can be transmitted through a common communication channel.

Viva Quiz:

a. What is code comperator.

b. Convert octal(2356) to decimal.

c. Convert hexadecimal(a67b) to octal.

d. Implement full adder using half adder

EXPERIMENT NO.-6

OBJECT: To study the characteristics of CMOS integrated circuit.

APPARATUS REQUIRED:

S.No. Equipment Specification Quantity1. CMOS kit - 12. Multimeter Digital 13. Power supply 0-12V 14. Patch cords - 10

THEORY:

CMOS circuit takes the advantage of the fact that both n-channel and p-channel can be fabricated on the same substrate. The basic circuit is the inverter, which consists of one p-channel transistor and one n-channel transistor.

When a CMOS logic circuit is in a static state its power dissipation is very low. This is because there is always on-off transistor in the path when the state of circuit is not changing. As a result, a typical CMOS gate has static power dissipation on the 0.01 mW of order.

CMOS logic is usually specified for a single power supply operation over a voltage range from 3 to 18V with a typical VON value of 5V operating CMOS at a larger power supply voltage reduces the propagation delay time and improves the noise margin but the power dissipation is increased. The CMOS fabrication process is simpler than TTL and provides a greater packing family. This means that more circuit can be placed on a given area of silicon at a reduced cost per function.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

Switching characteristics:

S.No. Input voltage (volts) Output Voltage (volts)1.2.3.

Current sourcing characteristics:

S.No. Resistance (ohms)

Current (mA) Voltage (volts)

1.2.3.

Two input NOR gate:

INPUT OUTPUT

Low Low HighLow High LowHigh Low LowHigh high Low

PROCEDURE:

1) SWITCHING CHARACTERISTICS:

a) Switch on the power to logic training board. Connect the circuit. b) Turn 10K pot meter slowly from low end to high end and note the output

voltage.c) Stop turning the pot meter when the voltmeter shows a change approx. 9 volt.

Measure the input voltage at this time using the same voltmeter.d) Design a graph for input voltage and output voltage.e) Plot the curve for input and output voltage.

2) CURRENT SOURCING CHARACTERISTICS OF A CMOS INVERTER:

a) Make the circuit connections as required.b) Measure output voltages with R equal to 1 K ohm and with R equal to 10K

ohms.c) Disconnect R and measure current taken by the IC.d) Plot the curve.

PRECAUTIONS:

1. All connections must be tight.2. Check power supply circuit and other factors according to requirement.

3. Take the observations carefully.

RESULT:

Characteristics of switching and current sourcing have been obtained.

DISCUSSION:

Switching characteristics also show that the changeover point depends on supply voltage. the circuit therefore automatically adjusts itself to supply voltage variations.

Viva Quiz:

1. Explain hamming code.

2. What is parity code.

3. 100110 is code received at receiver what is correct code.

4. Explain de-morgen’s theorem.

EXPERIMENT No.-7

OBJECT: To study OP-AMP as current to voltage and voltage to current converter.

APPARATUS REQUIRED:

S.No. Equipment Specification Quantity1. Integrated chips

(IC)741 1

2. Resistances 10K15K

41

3. Digital multimeter - -4. Ammeter 1

THEORY:

An operational amplifier abbreviated as OP-AMP is basically a multi stage, very high gain, direct coupled, negative feedback amplifier that uses voltage shunt feedback to provide a stabilized voltage gain. An OP-AMP has high input impedence and low output impedence and has capability of amplifying signal having frequency ranging from zero to 1MHz i.e. Op-amp can be used to amplify dc as well as ac input signals.

The word operational stands for various mathematical operations such as addition subtraction, multiplication, differentiation, integration etc., and amplifier is one which boosts or amplifies the signal. Since the circuit performs both mathematical operation and amplification and that is why it is called the operational amplifier.In voltage to current convertor for a single input the current in the load is given by-

Ic=V/RL

The output current Ic is independent of load resistance. This is due to virtual ground or the converting input terminal to the Op-amp. When signals are to be compared a comparator is used.

CIRCUIT DIAGRAM:

Voltage to current convertor

Current to voltage convertor:

OBSERVATION TABLE:


S.No I/P Voltage(Vin)(V) O/P current(Io)(mA)1.2.3.4.

Current to voltage convertor

S.No I/P Current (mA) O/P Voltage (V)1.2.3.4.

PROCEDURE:


1. Make connections as per the circuit diagram.2. Apply input voltage to the non inverting terminal of Op-amp.3. Observe the output current through ammeter reading.4. Repeat this process for different values of input voltage.

Current to voltage convertor

1. Make connections as per the circuit diagram.2. Apply the input current to the non inverting terminal of Op-amp .3. Observe the output voltage through pin no.6 of Op-amp on CRO.4. Repeat this process for different values of input current.

PROCEDURE:

1. Connect the circuit carefully.2. Readings should be taken carefully.3. Connections should be tight and clear.4. Switch off the device, if not being used.

RESULT:

Study of voltage to current and current to voltage convertor has been done successively. Voltage is converted linearly to current

DISCUSSION:

The output current is very small even with very large change in input voltage. The voltage to current characteristic is linear.

Viva Quiz:

1. Implement and gate using MUX.

2. Implement or gate using MUX.

3. Implement 4:1 using 2:1 mux.

4. Implement 8:1 using 2:1.

EXPERIMENT No.-8

OBJECT: To study Schmitt trigger using IC 555.

APPARATUS REQUIRED:

S No. Equipment Specification Quantity1. IC 555 12. Resistor 100K

1K11

3. Capacitor 1F0.01F

11

4. CRO - 15. Function generator 10MHz-3MHz 16. Bread-board - 17. CRO probes BNC to crocodile 18. Connecting wires - -

THEORY:

Schmitt trigger is a wave shaping circuit used for generating square waveform with a sine waveform input. The IC 555 timer can be used to function as a variable threshold Schmitt trigger. In this circuit the two internal comparator input pins are connected together and externally biased at (1/2) Vcc through R1 and R2 Since, (2/3)Vcc and the lower comparator at the bias provided by R1 and R2 is entered within these two thresholds.The retrace level causes the internal flip flop to alternatively set to reset generating a square wave output. As long as R! =R2, 555 timer will automatically be biased for any supply voltage in the range of 5v to 16v. From curve it is a 180 phase shift.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

S.No. I/P Frequency O/P Frequency

I/P Voltage O/P Voltage

1.2.3.

PROCEDURE:

1. Make the circuit connections as per the circuit diagram, on the bread-board.2. Apply input sine wave signal through pin 2.3. Connect pin 3 to CRO.4. Observe the output on any of the channel on CRO.A square wave output will

appear on CRO screen.5. Note the time period of pulse and calculate the frequency. Compare the input

signal and output signal frequency.6. Note the output signal voltage and compare it with input signal voltage.

PRECAUTIONS:

1. IC should be properly inserted.2. Connections must be tight.3. Reading should be correctly observer.4. Wires should not touch each other.

RESULT:

Study of Schmitt trigger has been done successfully. Frequency measured by output waveform in CRO is _________.

DISCUSSION:

Schmitt trigger is used for wave shaping circuits. It can be used to generate rectangular wave with sharp edges from a sine wave or any other waveform.

Viva Quiz:

1. What is Encoder.

2. Explain3:8 decoder.

3. Implement half adder usingencoder.

EXPERIMENT No.-9

OBJECT: To study the waveforms for Astable Multivibrator using IC-555 timer.

APPARATUS REQUIRED:

S No. Equipment Specification Quantity1. IC 5552. Resistor 10K

1K21

3. Capacitor 0.010.1

11

4. CRO - 15. CRO probes BNC to crocodile 16. Connecting wires - -

THEORY:

IC-555 timer is very popular and general purpose IC. It can be used square wave generator, pulse generator, time delay generator, etc. initially, when output is high, capacitor C starts charging towards Vcc through R1 and R2. However as soon as the voltage across the capacitor equals 2/3 Vcc, comparator trigger the flip-flop and output switches to low. Now capacitor starts discharging through R2 and Q1. when the voltage across C equals 1/3 Vcc, comparator 2’s output triggers the flip-flop and the output goes high. Then the cycle repeats.The capacitor is periodically charged and discharged between 2/3 and 1/3 Vcc respectively. The time during which the capacitor changes from 1/3 Vcc and 2/3 Vcc is equal to the time, the output is high and given by-

t1 = 0.693(R1 +R2) CSimilarly, the time during which the capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to the time during which the output is low and is given by-

t2 = 0.693 R2Cthus, the total period of output waveform is ,

T = t1 +t2Frequency (f) = 1/T = 1.46/(R1 + R2) CThe duty cycle is the ratio of the time during which the output is high to total period T , is given by-

% Duty cycle = D = (tc/T) x 100D = On time/Total time

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

Resistance (R1)

Resistance (R2)

TON TOFF Ttotal TheoreticalFrequency

Practical Frequency

Duty cycle(theo.)

Duty cycle (prac.)

PROCEDURE:

1. Make connections on the breadboard as per the circuit diagram.2. Connect pin 8 to supply +Vcc.3. Connect pin 3 to CRO to observe the output.

4. Observe the output on any of the channel on CRO.5. A square wave output will appear on CRO screen.6. Note the time period of pulse and calculate the frequency.7. Compare the theoretical and practical frequency.

PRECAUTIONS:


RESULT:

We have observed the waveform for astable multivibrator and following results has been obtained-Theoretical frequency = _________Practical frequency =__________Duty cycle (theoretical) =________Duty cycle (practical) =__________

DISCUSSION:

In astable multivibrator external triggering is not required. Practical and theoretical duty cycle is close to each other. Duty cycle can be adjusted by changing values of R1 and R2.

EXPERIMENT No.-10

OBJECT: To study mono-stable multivibrator using IC 555.

APPARATUS REQUIRED:

S No. Equipment Specification Quantity1. IC 555 12. Diode 1N4007 13. Resistor 1K

2.7K21

4. Capacitor 6800F1F6.01F

111

5. Function generator - 16. Connecting wires - -7. CRO - 1

THEORY:

In monostable multivibrator, there is only one stable state. One transistor is in stable and other is in quasi-stable state. The time taken in storage of energy decides the pulse width. External triggering does the transition of output from stable to quasi-stable state.Initially, capacitor C has no initial charge. Output of MMV goes high when triggering pulse is applied. This is the transition of output from stable to quasi-stable state. C now rises exponentially with time constant RC When capacitor charges to reference level of +2Vcc/3 , output of op-amp goes high so Q becomes high and output of MMV becomes low. Thus the output transit back to stable state from quasi-stable state. Time during which output is high is –

T = 1.1 RCFrequency = 1/T The set flip-flop saturates discharge transistor shorting the capacitor to ground. Capacitor discharges very rapidly and MMV reverts back to stable state and stays there until triggering is applied. Again the cycle is repeated.

CIRCUIT DIAGRAM:

OBSERVATION TABLE:

Resistance (R) Capacitance (C)

Pulse period (T)

TheoreticalFrequency

PracticalFrequency

PROCEDURE:

1. Make connections as per the circuit diagram, on the bread-board.2. Trigger input is provided through pin 2.3. Connect pin 8 to supply +Vcc and pin 3 to CRO to observe the output.4. Observe the output on any of the channel on CRO.A square wave output will

appear on CRO screen.5. Note the time period of pulse and calculate the frequency. Compare the

theoretical and practical frequency.

PRECAUTIONS:


RESULT:

We have observed the waveform for monostable multivibrator and following results has been obtained-

Theoretical frequency = _________Practical frequency =__________

DISCUSSION:

By changing the value of R and C the gate width can be changed. The monostable multivibrator can be used to function as an adjustable pulse width generator. It can generate uniform width pulses from a variable width input pulse train.

EXPERIMENT No.-11

OBJECT: To study Bi-stable multivibrator using IC 555.

APPARATUS REQUIRED:

S No. Equipment Specification Quantity

1. IC 555 12. Diode 1N4007 13. Resistor 1K

10K12

4. Capacitor 1F0.01F

11

5. Function generator - 16. Connecting wires - -7. CRO - 1

THEORY:

Bistable multivibrator will remain in either state indefinitely. An external event or trigger can clip circuit from one state to other. Such a circuit is important as the fundamental building block of a register or a memory device. This circuit is known as flip flop. Taking the trigger input low makes the output of the circuit to go into the high state. Taking the reset input low makes the output of the circuit go into the low state. In bistable or flip-flop operation both the states are stable that is to make a transition in output state a trigger is required externally. Hence no capacitor is required to store the energy for auto-triggering.To set the BMV i.e. to obtain output at pin 3 (Q) high a negative pulse of amplitude less than +Vcc/3 is applied to set input (pin 2). It gives high output (Q output of BMV at pin 3).To reset the BMV i.e. to obtain Q at pin 3 low a positive pulse of amplitude greater than +2Vcc/3 is applied at set input (pin 6), which resets BMV (Q at pin 3 is low).When both the input pulses are absent, then there is no transition in the output.This type of circuit is ideal for use in an automated model railway system where the train is required to turn back and forth over the same piece of track. A push button is placed on each end of the track such that when the train hits one , it will either trigger or reset the bi-stable.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Make the connections as per the circuit diagram.2. Apply the negative trigger pulse through pin 2.3. Now, apply the positive trigger pulse through pin no 6.

4. Obtain the output on the CRO and observe the output waveform carefully.

PRECAUTIONS:


RESULT:

The study of waveform for bi-stable multivibrator using IC 555 has been done successively.

DISCUSSION:

A bistable multivibrator is two cross-coupled inverting amplifiers consisting of two transistors and four resistors. We obtain a square waveform of frequency dependant on the circuit constant.

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