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ANNA UNIVERSITY OF TECHNOLOGY, COIMBATOREB.E/B.TECH DEGREE EXAMINATIONS: NOV / DEC 2011
REGULATIONS: 2008THIRD SEMESTER: ECE
080290010 DIGITAL ELECTRONICSTIME: 3 HOURS MAX
MARKS: 100
PART A
1. Name the basic types of Boolean expressions.
SOP(sum of product)
POS(Product of sum)
2. CMOS inverter circuit
3. Give the application of multiplexer
Telegraphy,
Video,
Digital broadcasting.
4. Carry Propagation Delay
The parallel adder which we use in the digital circuits, the carry output of
each full adder stage is connected to the carry input of the next higher order stage.
Therefore, the sum and carry outputs of any stage cannot be produced until the
input carry occurs; this leads to a time delay in the addition process. This delay is
known as carry propagation delay.
5. Comparison between combinational and sequential circuits
A combinational circuit neither contains a periodic clock signal nor has any
provisions for storage. There are no feedbacks involved and the output at all time is
dependent on the inputs provided. The name combinational is derived from the
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combinations of logic gates used for such circuits. A sequential circuit involves
feedback and has memory
6. Race around Condition
A condition in logic network in which the difference in propagation timesthrough two or more signal paths in the network can produce an erroneous output.
7. Volatile memory known as volatile storage, is computer memory that
requires power to maintain the stored information, unlike non-volatile memory
which does not require a maintained power supply. It has been less popularly known
as temporary memory (RAM)
8. Types of programmable logic devices
PLA, PAL,
EPROM
9. Compare Moore and mealy models
In the Moore finite state machine model output depends only on thepresent state.
But in the mealy model the output depends on the both present stateand the input.
This is the main difference.
10. Operations of asynchronous sequential circuits.
Pulse mode
Fundamental mode
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PART B
11 b) Basic logic gates:
Logic gates
Digital systems are said to be constructed by using logic gates. These gatesare the AND, OR, NOT, NAND, NOR, EXOR and EXNOR gates. The basicoperations are described below with the aid of truth tables.
AND gate
The AND gate is an electronic circuit that gives a high output (1) onlyifall its inputs are high. A dot (.) is used to show the AND operation i.e. A.B.Bear in mind that this dot is sometimes omitted i.e. AB
OR gate
The OR gate is an electronic circuit that gives a high output (1) ifoneor more of its inputs are high. A plus (+) is used to show the OR operation.
NOT gate
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The NOT gate is an electronic circuit that produces an inverted versionof the input at its output. It is also known as an inverter. If the inputvariable is A, the inverted output is known as NOT A. This is also shown asA', or A with a bar over the top, as shown at the outputs. The diagrams belowshow two ways that the NAND logic gate can be configured to produce a NOT
gate. It can also be done using NOR logic gates in the same way.
NAND gate
This is a NOT-AND gate which is equal to an AND gate followed by aNOT gate. The outputs of all NAND gates are high ifany of the inputs arelow. The symbol is an AND gate with a small circle on the output. The smallcircle represents inversion.
NOR gate
This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate.The outputs of all NOR gates are low ifany of the inputs are high.The symbol is an OR gate with a small circle on the output. The small circlerepresents inversion.
EXOR gate
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The 'Exclusive-OR' gate is a circuit which will give a high output ifeither, but not both, of its two inputs are high. An encircled plus sign ( )is used to show the EOR operation.
EXNOR gate
The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. Itwill give a low output ifeither, but not both, of its two inputs are high. Thesymbol is an EXOR gate with a small circle on the output. The small circlerepresents inversion.
The NAND and NOR gates are called universal functions since witheither one the AND and OR functions and NOT can be generated.
A function in sum of products form can be implemented using NANDgates by replacing all AND and OR gates by NAND gates.
A function in product of sums form can be implemented using NORgates by replacing all AND and OR gates by NOR gates.
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Logic gate symbols
It is a summary truth table of the input/output combinations for the
NOT gate together with all possible input/output combinations for the othergate functions. Also note that a truth table with 'n' inputs has 2n rows. Youcan compare the outputs of different gates.
Logic gates representation using the Truth table
Example
A NAND gate can be used as a NOT gate using either of the following wiringconfigurations.
12 a) 4-Bit parallel adder/ subtractor using fulladder.
http://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#truthhttp://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#nandgatehttp://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#notgatehttp://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#truthhttp://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#nandgatehttp://www.ee.surrey.ac.uk/Projects/Labview/gatesfunc/index.html#notgate8/3/2019 De Answer Key Part1
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Adders are divided into two groups: half adders and full adders. Fulladders are used toadd three bits where one of them is the carry from thepreceding adder. They have twooutputs: the sum and the carry to the next
stage. In half adders, only two inputs areconsidered as operands; carryinputs are ignored. The truth table of a full adder is given that. Two of theinput variables, denoted by x and y, represent the two significant bits to beadded. The third input, Ck-1 represents the carry from the previous lowersignificant position.
Sub tractors are similar to adders. There are full Subtractor with threeinputs one of which is the borrow to the preceding Subtractor. The twooutputs are the difference and the borrow from the succeeding unit. HalfSubtractor do not have a borrow input. Figure shows a block diagram of a fullSubtractor.
13 a) mod 10 synchronous counter
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13 b) 4 bit up-down ripple counter
14 a) ROM, PROM, EPROM and EEPROM:
ROM
The first ROMs were made using a procedure that directly writes the binarydata in a silicon plate using a mask. This procedure is now obsolete.
PROM
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PROM (Programmable Read Only Memory) memories were developed at theend of the 70s by a company called Texas Instruments. These memories arechips comprising thousands of fuses (or diodes) that can be "burnt" using adevice called a ROM programmer", applying high voltage (12V) to thememory boxes to be marked. The fuses thus burnt correspond to 0 and the
others to 1.
EPROM
EPROM (Erasable Programmable Read Only Memory) memories are PROMsthat can be deleted. These chips have a glass panel that lets ultra-violet raysthrough. When the chip is subjected to ultra-violet rays with a certainwavelength, the fuses are reconstituted, meaning that all the memory bitsreturn to 1. This is why this type of PROM is called erasable.
EEPROM
EEPROM (Electrically Erasable Read Only Memorymemories are alsoerasable PROMs, but unlike EPROMs, they can be erased by a simple electriccurrent, meaning that they can be erased even when they are in position inthe computer.
There is a variant of these memories known as flash memories (also FlashROM or Flash EPROM). Unlike the classic EEPROMs that use 2 to 3 transistorsfor each bit to be memorised, the EPROM Flash uses only one transistor.Moreover, the EEPROM may be written and read word by word, while theFlash can be erased only in pages (the size of the pages decreases
constantly).
Lastly, the Flash memory is denser, meaning that chips containing severalhundred mega octets can be produced. EEPROMs are thus used preferably tomemorise configuration data and the Flash memory is used forprogrammable code (IT programmes).
The action involving reprogramming of an EEPROM is known as flashing.
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15 a) Design of synchronous sequential circuits