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Ref:080314 EE3110 DC and AC L 1

Lecture 07

DC and AC Load Line• DC biasin circuits

• DC and AC e!ui"a#ent circuit• $%&oint '(tatic o&eration &oint)

• DC and AC #oad #ine

• (aturation Cutoff Condition

• Co*iance

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Ref:080314 EE3110 DC and AC L +

,oo- Reference

• E#ectronic De"ices and Circuit ./eor b

Robert ,o#estad Louis Nas/e#s-

' 2rentice Ha## ) 

• E#ectronic De"ices b ./o*as L #od

' 2rentice Ha## )

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Ref:080314 EE3110 DC and AC L 3

DC ,iasin Circuits

R C

R ,

56CC

ic

vce

ib

vin

vout

• ./e ac o&eration of an

a*ifier de&ends on t/einitia# dc "a#ues of I 

 B I 

C  and

V CE 

• , "arin I  B around an

initia# dc "a#ue I C  and V CE  are *ade to "ar around t/eir

initia# dc "a#ues

• DC biasin is a static

o&eration since it dea#s it/

settin a fixed (steady) #e"e#

of current 't/rou/ t/e

de"ice) it/ a desired fi9ed

"o#tae dro& across t/e

de"ice

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Ref:080314 EE3110 DC and AC L 4

2ur&ose of t/e DC biasin circuit

• .o turn t/e de"ice ;N<

• .o ace it in o&eration in t/e reion of its

c/aracteristic /ere t/e de"ice o&erates

*ost #inear# ie to set u& t/e initia# dc

"a#ues of I  B I C  and V CE  

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Ref:080314 EE3110 DC and AC L =

6o#tae%Di"ider ,ias

• ./e "o#tae > di"ider 'or &otentio*eter) bias circuit is b

far t/e *ost co**on# used

• R ,1 R ,+

⇒

 "o#tae%di"ider to set t/e"a#ue of 6,  ?, 

• C3

⇒ to short circuit ac sina#s to

round /i#e not effect t/e DCo&eratin 'or biasin) of a circuit

'R E ⇒ stabi#i@es t/e ac sina#s)

  Bypass Capacitor 

R C

R 1

56CC

R E

R +

vout

vin

C+C

1

C3

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Ref:080314 EE3110 DC and AC L

Bra&/ica# DC ,ias Ana#sis

R C

R 1

56CC

?C

?E

R E

R +

cmx y

 R R

V V 

 R R I 

 I  I 

 R I V  R I V 

 E C 

CC 

CE 

 E C 

C 

 E  E CE C C CC 

 E C 

+=

+

+

+

−=

≈

=−−−

:e!uation#inestrai/tof for*s#o&e%2oint

1

for

0

?C'*A)

6CE

6CE'off)

6CC

?C'sat)

6CC

D'R C5R 

E)

DC Load Line

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Ref:080314 EE3110 DC and AC L 7

DC Load Line

?C

'*A)

6CE

6CE'off)

6CC

?C'sat)

6CC

'R C5R 

E)

DC Load Line

•./e strai/t #ine is -no as t/e DC load line 

•?ts sinificance is t/at reard#ess of t/e be/a"ior

of t/e transistor t/e co##ector current ?C and t/e

co##ector%e*itter "o#tae 6CE

 *ust a#as #ie on

t/e #oad #ine de&ends ;NL on t/e 6CC

R C and

R E 

•'ie ./e dc #oad #ine is a ra&/ t/at represents

all the possible combinations of IC and V

CE for

a given amplifier or e"er &ossib#e "a#ue of

 I C  and a*ifier i## /a"e a corres&ondin "a#ue

of V CE 

)

•?t *ust be true at t/e sa*e ti*e as t/e transistor

c/aracteristic (o#"e to condition usin

si*u#taneous e!uation

→  ra&/ica## →  !point "" 

F/at is I C(sat)

 and V CE(off)

 G

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Ref:080314 EE3110 DC and AC L 8

$%2oint '(tatic ;&eration 2oint)

• F/en a transistor does not /a"e an ac input it

i## /a"e specific dc values of I C  and V CE 

• ./ese "a#ues corres&ond to a s&ecific &oint on t/e

dc load line ./is &oint is ca##ed t/e Q-point 

• ./e #etter Q corres&onds to t/e ord 'Latent)

#uiescent *eanin at rest

• A !uiescent a*ifier is one t/at /as no ac sina#a&ied and t/erefore /as constant dc "a#ues of  I C  

and V CE 

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Ref:080314 EE3110 DC and AC L

$%2oint '(tatic ;&eration 2oint)

• ./e intersection of t/e dc bias"a#ue of I  B it/ t/e dc #oad #ine

deter*ines t/e Q%&oint

• ?t is desirab#e to /a"e t/e Q%

 &oint centered on t/e #oad #ineF/G

• F/en a circuit is desined to/a"e a centered Q%&oint t/ea*ifier is said to be *id&oint

 biased• Iid&oint biasin a##os

o&ti*u* ac o&eration of t/ea*ifier

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Ref:080314 EE3110 DC and AC L 10

DC ,iasin 5 AC sina#• F/en an ac signal is a&ied to t/e base of

t/e transistor I C  and V CE  i## bot/ "araround t/eir Q%&oint "a#ues

• F/en t/e Q%&oint is centered I C  and V CE  

can bot/ *a-e t/e maximum &ossib#etransitions abo"e and be#o t/eir initia# dc

"a#ues• F/en t/e Q%&oint is above t/e center on t/e

#oad #ine t/e in&ut sina# *a cause t/etransistor to saturate F/en t/is /a&&ens a &art of t/e out&ut sina# i## be clipped off

• F/en t/e Q%&oint is belo$ *id&oint on t/e#oad #ine t/e in&ut sina# *a cause t/etransistor to cutoff ./is can a#so cause a &ortion of t/e out&ut sina# to be c#i&&ed

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Ref:080314 EE3110 DC and AC L 11

DC ,iasin 5 AC sina#

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Ref:080314 EE3110 DC and AC L 1+

DC and AC E!ui"a#ent Circuits

R C

R 1

56CC

R E

R +

R L

vin

R C

R 1

56CC

?C

?E

R E

R +

R 1R 

+

r Cvce

r C  R 

CR 

L

vin

,ias Circuit DC e!ui"a#entcircuit

AC e!ui"a#ent

circuit

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Ref:080314 EE3110 DC and AC L 13

AC Load Line

• ./e ac #oad #ine of a i"ena*ifier i## not follo$ t/e

 ot of t/e dc #oad #ine

• ./is is due to t/e dc #oad of

an a*ifier is different fro*t/e ac #oad

?C

'*A)

6CE

6CE'off)

6CC

?C'sat)

6CC

D'R C5R 

E)

DC Load Line

?C

6CE

?C'sat)

?C$

 5 '6CE$

Dr C)

6CE'off)

6CE$

 5 ?C$

r C

ac load line

?C

6CE

$ % &oint

ac load line

dc #oad #ine

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Ref:080314 EE3110 DC and AC L 14

AC Load Line

F/at does t/e ac #oad #ine te## ouG

• ./e ac #oad #ine is used to te## ou t/e *a9i*u*

 &ossib#e out&ut "o#tae sin for a i"en co**on%

e*itter a*ifier • ?n ot/er ords t/e ac #oad #ine i## te## ou t/e

*a9i*u* &ossib#e &ea-%to%&ea- out&ut "o#tae 'V  pp )

fro* a i"en a*ifier

• ./is *a9i*u* V  pp is referred to as t/e compliance oft/e a*ifier

'AC (aturation Current  I c(sat)  AC Cutoff 6o#tae V CE(off) )

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Ref:080314 EE3110 DC and AC L 1=

AC (aturation Current and AC

Cutoff 6o#tae

R 1DDR 

+

r Cv

ce

r C  R 

CDDR 

L

vin

?C

6CE

?C'sat)

?C$

 5 '6CE$

Dr C)

6CE'off)

6CE$

 5 ?C$

r C

ac load line

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Ref:080314 EE3110 DC and AC L 1

A*ifier Co*iance

• ./e ac #oad #ine is used to te## t/e maximum

 possible output voltage swing for a given

common-emitter amplifier  ?n anot/er ords t/e

ac #oad #ine i## te## t/e *a9i*u* &ossib#e &ea-%to%&ea- out&ut "o#tae 'V  PP ) fro* a i"en

a*ifier ./is *a9i*u* V  PP  is referred to as t/e

compliance of t/e a*ifier

• ./e co*iance of an a*ifier is found b

deter*ine t/e *a9i*u* &ossib#e of I C  and V CE  

fro* t/eir res&ecti"e "a#ues of I CQ and V CEQ

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Ref:080314 EE3110 DC and AC L 17

Ia9i*u* 2ossib#e Co*iance

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Ref:080314 EE3110 DC and AC L 18

Co*iance

./e *a9i*u* &ossib#e transition for V CE  is e!ua# to t/edifference beteen V CE(off) and V CEQ (ince t/is transition is

e!ua# to I CQr C  t/e *a9i*u* &ea- out&ut "o#tae fro* t/e

a*ifier is e!ua# to I CQr C  .o ti*es t/is "a#ue i## i"e

t/e *a9i*u* &ea-%to%&ea- transition of t/e out&ut"o#tae:

6 PP t/e out&ut co*iance in &ea-%to%&ea- "o#tae

 I CQ t/e !uiescent "a#ue of I C 

r C t/e ac #oad resistance in t/e circuit 

V  PP 

 = 2I CQ

r C  'A)

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Ref:080314 EE3110 DC and AC L 1

Co*ianceF/en I C  = I C(sat)  V CE  is idea## e!ua# to 06 F/en IC  = I CQ V CE  is at

V CEQ Note t/at /en I C  *a-es its *a9i*u* &ossib#e transition'fro* I CQ to I C(sat)) t/e out&ut "o#tae c/anes b an a*ount e!ua# to

V CEQ ./us t/e *a9i*u* &ea-%to%&ea- transition ou#d be e!ua# to

tice t/is "a#ue:

• E!uation 'A) sets t/e #i*it in ter*s of V CE(off) ?f t/e "a#ue obtained

 b t/is e!uation is e9ceed t/e out&ut "o#tae i## tr to e9ceedV CE(off) /ic/ is not &ossib#e ./is is ca##ed cutoff c#i&&in because

t/e out&ut "o#tae is c#i&&ed off at t/e "a#ue of  V CE(off)• E!uation ',) sets of t/e #i*it in ter*s of I C(sat) ?f t/e "a#ue obtained

 b t/is e!uation is e9ceed t/e out&ut i## e9&erience saturationc#i&&in

',)V  PP  = 2V CEQ 

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Ref:080314 EE3110 DC and AC L +0

Cutoff and (aturation C#i&&in• F/en deter*inin t/e out&ut co*iance for a i"en

a*ifier so#"e bot/ e!uation 'A) and ',) The lower ofthe two results is the compliance of the amplifier 

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Ref:080314 EE3110 DC and AC L +1

E9a*e

• or t/e "o#tae%di"ider bias a*ifiers/on in t/e fiure /at is t/e ac and dc

#oad #ine Deter*ine t/e *a9i*u* out&ut

co*iance

R C

47-   Ω

51+6

R E

++-   Ω

R 1

33 - Ω

R +

10-   Ω

β   +00

R L

10-   Ω