David O’HallaronCarnegie Mellon University

Processor Architecture

OverviewProcessor Architecture

Overview

http://mprc.pku.edu.cn/ics/

Based on original lecture notes by Randy Bryant, CMU

– 2 –Processor Architecture, PKU

Course OutlineCourse Outline

Background Instruction sets Logic design

Sequential Implementation A simple, but not very fast processor design

Pipelining Get more things running simultaneously

Pipelined Implementation Make it work

Performance optimization Performance analysis High performance processor design

– 3 –Processor Architecture, PKU

CoverageCoverage

Our Approach Work through designs for particular instruction set

Y86---a simplified version of the Intel IA32 (a.k.a. x86). If you know one, you more-or-less know them all

Work at “microarchitectural” levelAssemble basic hardware blocks into overall processor

structure» Memories, functional units, etc.

Surround by control logic to make sure each instruction flows through properly

Use simple hardware description language to describe control logic

Can extend and modifyTest via simulationRoute to design using Verilog Hardware Description Language

» See Web aside ARCH:VLOG

– 4 –Processor Architecture, PKU

ScheduleSchedule

Week 1 Y86 instruction set architecture Logic design Sequential implementation

Assignments:

Part A: Write & test assembly code programs

Part B: Add new instructions to sequential implementation

Week 2 Pipelining and initial pipelined implementation Making the pipeline work Performance optimization on modern systems

Assignment:

Part C: Optimize program+pipeline for max performance

– 5 –Processor Architecture, PKU

TextbookTextbook

Randy Bryant and David O’Hallaron, “Computer Systems: A Programmer’s Perspective, 2nd Edition”, Prentice Hall, 2011.

Topics covered:• Processor Architecture (Chapter 4)• Performance Optimization (Chapter 5)

Assumes prior knowledge of x86 assembly (Chap 3)