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SEMICONDUCTOR TECHNICAL DATA
1 REV 1 Motorola, Inc. 1997
6/97
The MC74VHC245 is an advanced high speed CMOS octal bustransceiver fabricated with silicon gate CMOS technology. It achieves highspeed operation similar to equivalent Bipolar Schottky TTL while maintainingCMOS low power dissipation.
It is intended for two–way asynchronous communication between databuses. The direction of data transmission is determined by the level of theDIR input. The output enable pin (OE) can be used to disable the device, sothat the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge.
• High Speed: tPD = 4.0ns (Typ) at VCC = 5V• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C• High Noise Immunity: VNIH = VNIL = 28% VCC• Power Down Protection Provided on Inputs• Balanced Propagation Delays• Designed for 2V to 5.5V Operating Range• Low Noise: VOLP = 1.2V (Max)• Pin and Function Compatible with Other Standard Logic Families• Latchup Performance Exceeds 300mA• ESD Performance: HBM > 2000V; Machine Model > 200V• Chip Complexity: 308 FETs or 77 Equivalent Gates
APPLICATION NOTES
1. Do not force a signal on an I/O pin when it is an active output, damage mayoccur.
2. All floating (high impedence) input or I/O pins must be fixed by means ofpull up or pull down resistors or bus terminator ICs.
3. A parasitic diode is formed between the bus and VCC terminals. Therefore,the VHC245 cannot be used to interface 5V to 3V systems directly.
LOGIC DIAGRAM
ADATAPORT
A8
A7
A6
A5
A3
A4
A2
A1
9
8
7
6
5
4
3
2
DIR
OE
1
19
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
BDATAPORT
FUNCTION TABLE
Control Inputs
O iOE DIR Operation
L L Data Transmitted from Bus B to Bus A
L H Data Transmitted from Bus A to Bus B
H X Buses Isolated (High–Impedance State)
PIN ASSIGNMENT
A5
A3
A2
A1
DIR
GND
A8
A7
A6
A4 5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
B3
B2
B1
OE
VCC
B8
B7
B6
B5
B4
DW SUFFIX20–LEAD SOIC PACKAGE
CASE 751D–04
ORDERING INFORMATIONMC74VHCXXXDWMC74VHCXXXDTMC74VHCXXXM
SOICTSSOPSOIC EIAJ
DT SUFFIX20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
MC74VHC245
MOTOROLA VHC Data – Advanced CMOS LogicDL203 — Rev 1
2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS*ÎÎÎÎÎÎ
SymbolÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ParameterÎÎÎÎÎÎÎÎÎÎÎÎ
ValueÎÎÎÎÎÎ
UnitÎÎÎÎÎÎ
VCCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Supply VoltageÎÎÎÎÎÎÎÎÎÎÎÎ
– 0.5 to + 7.0ÎÎÎÎÎÎ
VÎÎÎÎÎÎ
VinÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Input VoltageÎÎÎÎÎÎÎÎÎÎÎÎ
– 0.5 to + 7.0ÎÎÎÎÎÎ
VÎÎÎÎÎÎ
VoutÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Output VoltageÎÎÎÎÎÎÎÎÎÎÎÎ
– 0.5 to VCC + 0.5ÎÎÎÎÎÎ
VÎÎÎÎÎÎ
IIKÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Input Diode CurrentÎÎÎÎÎÎÎÎÎÎÎÎ
– 20ÎÎÎÎÎÎ
mAÎÎÎÎÎÎ
IOKÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Output Diode CurrentÎÎÎÎÎÎÎÎÎÎÎÎ
± 20ÎÎÎÎÎÎ
mAÎÎÎÎÎÎ
IoutÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Output Current, per PinÎÎÎÎÎÎÎÎÎÎÎÎ
± 25ÎÎÎÎÎÎ
mAÎÎÎÎÎÎ
ICCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Supply Current, VCC and GND PinsÎÎÎÎÎÎÎÎÎÎÎÎ
± 75ÎÎÎÎÎÎ
mAÎÎÎÎÎÎÎÎÎ
PDÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Power Dissipation in Still Air SOIC Packages†TSSOP Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
500450
ÎÎÎÎÎÎÎÎÎ
mW
ÎÎÎÎÎÎ
TstgÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Storage Temperature ÎÎÎÎÎÎÎÎÎÎÎÎ
– 65 to + 150 ÎÎÎÎÎÎ
C
* Absolute maximum continuous ratings are those values beyond which damage to the devicemay occur. Exposure to these conditions or conditions beyond those indicated may adverselyaffect device reliability. Functional operation under absolute–maximum–rated conditions is notimplied.
†Derating — SOIC Packages: – 7 mW/C from 65 to 125C TSSOP Package: – 6.1 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
ÎÎÎÎÎÎÎÎ
Symbol ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Parameter ÎÎÎÎÎÎ
MinÎÎÎÎÎÎ
MaxÎÎÎÎÎÎ
Unit
ÎÎÎÎÎÎÎÎ
VCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Supply Voltage ÎÎÎÎÎÎ
2.0ÎÎÎÎÎÎ
5.5 ÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎ
Vin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Input Voltage ÎÎÎÎÎÎ
0 ÎÎÎÎÎÎ
5.5 ÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎ
Vout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Output Voltage ÎÎÎÎÎÎ
0 ÎÎÎÎÎÎ
VCCÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎ
TA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Operating Temperature ÎÎÎÎÎÎ
– 40ÎÎÎÎÎÎ
+ 85ÎÎÎÎÎÎ
C
ÎÎÎÎÎÎÎÎ
tr, tf ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Input Rise and Fall Time VCC = 3.3V ±0.3VVCC =5.0V ±0.5V
ÎÎÎÎÎÎ
00ÎÎÎÎÎÎ
10020ÎÎÎÎÎÎ
ns/V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC ELECTRICAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎS b l
ÎÎÎÎÎÎÎÎÎÎÎÎP
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎT C di i
ÎÎÎÎÎÎ
VCCÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = 25°C ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = – 40 to 85°C ÎÎÎÎU iÎÎÎÎ
ÎÎÎÎSymbol ÎÎÎÎÎÎ
ÎÎÎÎÎÎParameter ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎTest Conditions ÎÎÎ
ÎÎÎ
VCCV ÎÎÎÎÎÎÎÎ
Min ÎÎÎÎÎÎ
TypÎÎÎÎÎÎÎÎ
Max ÎÎÎÎÎÎÎÎ
Min ÎÎÎÎÎÎÎÎ
Max ÎÎÎÎ
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎ
VIH ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Minimum High–LevelInput Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
2.03.0 to5.5
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.50VCC x 0.7
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.50VCC x 0.7
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VILÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Low–LevelInput Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
2.03.0 to5.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
0.50VCC x 0.3
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
0.50VCC x 0.3
ÎÎÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VOH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Minimum High–LevelOutput Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIH or VILIOH = – 50µA
ÎÎÎÎÎÎÎÎÎÎÎÎ
2.03.04.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
1.92.94.4
ÎÎÎÎÎÎÎÎÎÎÎÎ
2.03.04.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
1.92.94.4
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIH or VILIOH = – 4mAIOH = – 8mA
ÎÎÎÎÎÎÎÎÎ
3.04.5
ÎÎÎÎÎÎÎÎÎÎÎÎ
2.583.94
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
2.483.80
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VOLÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Low–LevelOutput Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIH or VILIOL = 50µA
ÎÎÎÎÎÎÎÎÎ
2.03.04.5
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
0.00.00.0
ÎÎÎÎÎÎÎÎÎÎÎÎ
0.10.10.1
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
0.10.10.1
ÎÎÎÎÎÎ
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIH or VILIOL = 4mAIOL = 8mA
ÎÎÎÎÎÎÎÎÎÎÎÎ
3.04.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
0.360.36
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
0.440.44
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎIin ÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum InputLeakage Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = 5.5 V or GND(DIR, OE)
ÎÎÎÎÎÎ
0 to 5.5ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
± 0.1 ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
± 1.0 ÎÎÎÎ
µA
This device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this high–impedance cir-cuit. For proper operation, Vin andVout should be constrained to therange GND (Vin or Vout) VCC.
Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or VCC).Unused outputs must be left open.
MC74VHC245
VHC Data – Advanced CMOS LogicDL203 — Rev 1
3 MOTOROLA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC ELECTRICAL CHARACTERISTICSÎÎÎÎ
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = – 40 to 85°CÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = 25°CÎÎÎÎÎÎVCC
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎÎÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎ
SymbolÎÎÎÎ
UnitÎÎÎÎÎÎÎÎ
MaxÎÎÎÎÎÎÎÎ
MinÎÎÎÎÎÎÎÎ
MaxÎÎÎÎÎÎ
TypÎÎÎÎÎÎÎÎ
MinÎÎÎÎÎÎ
VCCV
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Test ConditionsÎÎÎÎÎÎÎÎÎÎÎÎ
ParameterÎÎÎÎÎÎÎÎ
SymbolÎÎÎÎÎÎÎÎÎÎÎÎ
IOZÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Three–StateLeakage Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VIL or VIHVout = VCC or GND
ÎÎÎÎÎÎÎÎÎ
5.5ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
± 0.25ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
± 2.5ÎÎÎÎÎÎ
µA
ÎÎÎÎÎÎÎÎÎÎÎÎ
ICC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum QuiescentSupply Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin = VCC or GND ÎÎÎÎÎÎÎÎÎ
5.5 ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
4.0 ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
40.0 ÎÎÎÎÎÎ
µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)ÎÎÎÎÎÎÎÎ
S b l
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
P
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
T C di i
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
TA = 25°CÎÎÎÎÎÎÎÎÎÎÎÎ
TA = – 40 to 85°CÎÎÎÎ
U iÎÎÎÎÎÎÎÎ
SymbolÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ParameterÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Test ConditionsÎÎÎÎÎÎÎÎ
MinÎÎÎÎÎÎ
TypÎÎÎÎÎÎÎÎ
MaxÎÎÎÎÎÎ
MinÎÎÎÎÎÎÎÎ
MaxÎÎÎÎ
UnitÎÎÎÎÎÎÎÎÎÎÎÎ
tPLH,tPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Propagation Delay,A to B or B to A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3V CL = 15pFCL = 50pF
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
5.88.3
ÎÎÎÎÎÎÎÎÎÎÎÎ
8.411.9
ÎÎÎÎÎÎÎÎÎ
1.01.0
ÎÎÎÎÎÎÎÎÎÎÎÎ
10.013.5
ÎÎÎÎÎÎ
ns
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5V CL = 15pFCL = 50pFÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
4.05.5ÎÎÎÎÎÎÎÎÎÎÎÎ
5.57.5ÎÎÎÎÎÎÎÎÎ
1.01.0ÎÎÎÎÎÎÎÎÎÎÎÎ
6.58.5ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
tPZL,tPZHÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Output Enable TimeOE to A or B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3V CL = 15pFRL = 1 kΩ CL = 50pF
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
8.511.0ÎÎÎÎÎÎÎÎ
13.216.7ÎÎÎÎÎÎ
1.01.0ÎÎÎÎÎÎÎÎ
15.519.0ÎÎÎÎ
ns
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5V CL = 15pFRL = 1 kΩ CL = 50pF
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
5.87.3
ÎÎÎÎÎÎÎÎÎÎÎÎ
8.510.6
ÎÎÎÎÎÎÎÎÎ
1.01.0
ÎÎÎÎÎÎÎÎÎÎÎÎ
10.012.0
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
tPLZ,tPHZ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Output Disable TimeOE to A or B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3V CL = 50pFRL = 1 kΩ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
11.5ÎÎÎÎÎÎÎÎÎÎÎÎ
15.8 ÎÎÎÎÎÎÎÎÎ
1.0ÎÎÎÎÎÎÎÎÎÎÎÎ
18.0 ÎÎÎÎÎÎ
ns
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5V CL = 50pFRL = 1 kΩ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
7.0ÎÎÎÎÎÎÎÎ
9.7 ÎÎÎÎÎÎ
1.0ÎÎÎÎÎÎÎÎ
11.0 ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
tOSLH,tOSHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Output to Output SkewÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3V CL = 50pF(Note 1.)
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.5ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.5ÎÎÎÎÎÎ
pF
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5V CL = 50pF(Note 1.)
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.0 ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
1.0 ÎÎÎÎÎÎ
ns
ÎÎÎÎÎÎÎÎ
Cin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Input CapacitanceDIR, OE
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
4 ÎÎÎÎÎÎÎÎ
10 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
10 ÎÎÎÎ
pF
ÎÎÎÎÎÎÎÎÎÎÎÎ
CI/OÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Maximum Three–StateI/O Capacitance
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
8ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
pF
C P Di i i C i (N 2 )
Typical @ 25 °C, VCC = 5.0V
FCPD Power Dissipation Capacitance (Note 2.) 21 pF
1. Parameter guaranteed by design. tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/ 8 (per bit). CPD is used to determine the no–loaddynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
S b l P
TA = 25°C
U iSymbol Parameter Typ Max Unit
VOLP Quiet Output Maximum Dynamic VOL 0.9 1.2 V
VOLV Quiet Output Minimum Dynamic VOL –0.9 –1.2 V
VIHD Minimum High Level Dynamic Input Voltage 3.5 V
VILD Maximum Low Level Dynamic Input Voltage 1.5 V
MC74VHC245
MOTOROLA VHC Data – Advanced CMOS LogicDL203 — Rev 1
4
SWITCHING WAVEFORMS
VCC
GND
A or B
B or A
50%
50% VCC
tPLH tPHL
Figure 1.
OE
A or B
A or B
50% VCC
50% VCC
50% VCC
tPZL tPLZ
tPZH tPHZ
VCC
GND
HIGHIMPEDANCE
VOL +0.3V
VOH –0.3V
HIGHIMPEDANCE
VCC
GND50%
Figure 2.
DIR
50% VCC
TEST CIRCUITS
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICEUNDERTEST
OUTPUT
Figure 3.
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICEUNDERTEST
OUTPUT
Figure 4.
CONNECT TO VCC WHENTESTING tPLZ AND tPZL.CONNECT TO GND WHENTESTING tPHZ AND tPZH.
1 kΩ
MC74VHC245
VHC Data – Advanced CMOS LogicDL203 — Rev 1
5 MOTOROLA
EXPANDED LOGIC DIAGRAM
OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
2
3
4
5
6
7
8
9
19
1
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
13
12
11
INPUT EQUIVALENT CIRCUIT
INPUT
BUS TERMINAL EQUIVALENT CIRCUIT
DIR, OE
I/O
A, B
MC74VHC245
MOTOROLA VHC Data – Advanced CMOS LogicDL203 — Rev 1
6
OUTLINE DIMENSIONS
DW SUFFIXPLASTIC SOIC PACKAGE
CASE 751D–04ISSUE E
NOTES:1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.13(0.005) TOTAL IN EXCESS OF D DIMENSIONAT MAXIMUM MATERIAL CONDITION.
–A–
–B–
20
1
11
10
SAM0.010 (0.25) B ST
D20X
MBM0.010 (0.25)P10X
J
F
G18X K
C
–T– SEATINGPLANE
M
R X 45
DIM MIN MAX MIN MAXINCHESMILLIMETERS
A 12.65 12.95 0.499 0.510B 7.40 7.60 0.292 0.299C 2.35 2.65 0.093 0.104D 0.35 0.49 0.014 0.019F 0.50 0.90 0.020 0.035G 1.27 BSC 0.050 BSCJ 0.25 0.32 0.010 0.012K 0.10 0.25 0.004 0.009M 0 7 0 7 P 10.05 10.55 0.395 0.415R 0.25 0.75 0.010 0.029
DT SUFFIXPLASTIC TSSOP PACKAGE
CASE 948E–02ISSUE A
DIMA
MIN MAX MIN MAXINCHES
6.60 0.260
MILLIMETERS
B 4.30 4.50 0.169 0.177C 1.20 0.047D 0.05 0.15 0.002 0.006F 0.50 0.75 0.020 0.030G 0.65 BSC 0.026 BSCH 0.27 0.37 0.011 0.015J 0.09 0.20 0.004 0.008J1 0.09 0.16 0.004 0.006K 0.19 0.30 0.007 0.012K1 0.19 0.25 0.007 0.010L 6.40 BSC 0.252 BSCM 0 8 0 8
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASHOR GATE BURRS SHALL NOT EXCEED 0.15(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEADFLASH OR PROTRUSION. INTERLEAD FLASH ORPROTRUSION SHALL NOT EXCEED 0.25 (0.010)PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL INEXCESS OF THE K DIMENSION AT MAXIMUMMATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINEDAT DATUM PLANE –W–.
ÍÍÍÍÍÍÍÍÍÍÍÍ
1 10
1120
PIN 1IDENT
A
B
–T–0.100 (0.004)
C
D GH
SECTION N–N
KK1
J J1
N
N
M
F
–W–
SEATINGPLANE
–V–
–U–
SUM0.10 (0.004) V ST
20X REFK
L
L/22X
SU0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
––– –––
SU0.15 (0.006) T
MC74VHC245
VHC Data – Advanced CMOS LogicDL203 — Rev 1
7 MOTOROLA
OUTLINE DIMENSIONS
M SUFFIXPLASTIC SOIC EIAJ PACKAGE
CASE 967–01ISSUE O
DIM MIN MAX MIN MAXINCHES
––– 2.05 ––– 0.081
MILLIMETERS
0.05 0.20 0.002 0.0080.35 0.50 0.014 0.0200.18 0.27 0.007 0.011
12.35 12.80 0.486 0.5045.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC7.40 8.20 0.291 0.3230.50 0.85 0.020 0.0331.10 1.50 0.043 0.0590
0.70 0.90 0.028 0.035––– 0.81 ––– 0.032
A1
HE
Q1
LE 10
0 10
NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASUREDAT THE PARTING LINE. MOLD FLASH ORPROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWERRADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEADTO BE 0.46 ( 0.018).
HE
A1
LEQ1
cA
ZD
E
20
1 10
11
b
M0.13 (0.005)
e
0.10 (0.004)
VIEW P
DETAIL P
M
L
A
bcDEe
L
M
Z
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MC74VHC245/D◊