Data is sent to PC

Data is sent to PC. Data is sent to PC.

Development of Front-End Electronics　 for time projection chamber　 (TPC)

IntroductioIntroductionnOur purpose is development of front-end Our purpose is development of front-end

electronics for TPC. electronics for TPC. Printed circuit board (PCB), Control data-taking Printed circuit board (PCB), Control data-taking program and Analysis / visualization program are program and Analysis / visualization program are made .made .We present our development as follows .We present our development as follows .

TPC is a 3-D tracking gas detector to determine the TPC is a 3-D tracking gas detector to determine the position of charged particle. When a charged position of charged particle. When a charged particle ionizes the gas,electrons are made. The particle ionizes the gas,electrons are made. The electrons drift to wire chamber along electric filed electrons drift to wire chamber along electric filed and avalanche is formed near anode wire. It makes a and avalanche is formed near anode wire. It makes a signal on each pad. From the channel of the pad signal on each pad. From the channel of the pad and the timing of the signal, We reconstruct 3-D and the timing of the signal, We reconstruct 3-D trajectory of the charged particle. trajectory of the charged particle.

What is What is TPC?TPC?

ConclusioConclusionn

Analytical Analytical ProgramProgram

Control Control ProgramProgram

Production of Production of PCBPCBWe designed PCB with following We designed PCB with following

specs: specs: 8 analog input channels (8 8 analog input channels (8 ADC’s, 8 Preamplifiers)ADC’s, 8 Preamplifiers)1 Field programmable gate array 1 Field programmable gate array (FPGA)(FPGA)100 MHz clock generator 100 MHz clock generator 32-bit output port32-bit output port16-bit input port 16-bit input port 12-bit I/O port12-bit I/O portBoard size (18.3cm x 22.5 cm)Board size (18.3cm x 22.5 cm)Board material (FR4)Board material (FR4)2 layers2 layers

A/D A/D ConversionConversion

Program language is Visual Basic .net. We develop this Program language is Visual Basic .net. We develop this program to readout data from the circuit , plot trajectory in program to readout data from the circuit , plot trajectory in 3D image , reconstruction of wave form, and assign color 3D image , reconstruction of wave form, and assign color according to amplitude, etc. They are shown below.according to amplitude, etc. They are shown below.

Main screenMain screen

Data readData read

Extract signal intensity ,Extract signal intensity ,sampling number data sampling number data

Plot and DisplayPlot and Display

extract #N Pad data extract #N Pad data

Geometric transformationGeometric transformation

N=Pad numberN=Pad number

N=72N=72

N+=1N+=1

M=sampling numberM=sampling number

M=1024M=1024

M+=1M+=1

YY　　

YY　　

NN　　

NN　　

FADC converts the analog signal from TPC to the FADC converts the analog signal from TPC to the digital data (10-bit). The data of ten bits sent from digital data (10-bit). The data of ten bits sent from FADC is digital signals. FADC is digital signals.

Analog Analog signal from signal from TPCTPC

Convert to Convert to Digital Digital signalsignal

0001100110 0001100110 10110110111011011011

AD conversion AD conversion data data divides into 1024 divides into 1024

piecespieces

When the start signal comes, FPGA begins to take data When the start signal comes, FPGA begins to take data till 1024 .When data are transferred to PC, ADC addretill 1024 .When data are transferred to PC, ADC address and data address are added. taking data. Since clocss and data address are added. taking data. Since clock frequency is 100 MHz,data are taken each 10 nano sk frequency is 100 MHz,data are taken each 10 nano seconds .econds .

Channel Map Channel Map shows signal shows signal tension by colortension by color

Wave form shows a Wave form shows a change of signal of one change of signal of one input channelinput channel

Flight Tracker shows Flight Tracker shows particle trajectory. 2 left particle trajectory. 2 left screen is plot 2-D . Right screen is plot 2-D . Right screen is plot 3-D.screen is plot 3-D.Below figures are Below figures are method of projection. method of projection. A red line is a common A red line is a common lone in two figures.lone in two figures.

9/21/2005 in 9/21/2005 in HAW05HAW05

Inst. of Physics. Univ. of Tsukuba　 Asuka Saito. Shigeru Kiuchi.　 Yasuo Miake. Tatsuya Chujo. Shinichi Esumi. Sumio Kato . Takanori Aoki. Kentaro Miki. Yoshihiko Nagata. Tsukuba College of Technology Motoi INABA

n←1n←1

n←n+1n←n+1

n>1024n>1024

YesYesNoNo

Parity bit addedParity bit added

endend

The data that came from TPCThe data that came from TPC is preserved in address(n). is preserved in address(n).

InitializationInitialization

Waiting for start-triggerWaiting for start-trigger

startstart θθ

ΦΦ

YY

YY

ZZ

XX

XX

ZZ

Define two coordinates Define two coordinates for a trajectory: one is for a trajectory: one is detector coordinate. detector coordinate. another is observer another is observer coordinatescoordinates . . Transform the Transform the trajectory from one to trajectory from one to the other coordinate. the other coordinate. Project the trajectory Project the trajectory in the observer in the observer coordinate.coordinate.

Detector Detector coordinatescoordinates

Observer Observer coordinatescoordinates

Data flow from reading data to Data flow from reading data to displaydisplay

Block Block DiagramDiagram

TPCTPC

FADCFADCx x 8 8

PCPC

PreAMPPreAMPx x 8 8

Trigger CounterTrigger Counter

FPGAFPGA

When Trigger counter senWhen Trigger counter sendds start signal to FPGA on FEM s start signal to FPGA on FEM (front(front--end module),end module), FPGA starts to collect data from ADC and FPGA starts to collect data from ADC and stocks them inside the memory. stocks them inside the memory.

FPGA sends request signal to PC, after data taking of FPGA sends request signal to PC, after data taking of 1024 data. If PC accepts the request signal, data transfer 1024 data. If PC accepts the request signal, data transfer from FPGA to PC starts.from FPGA to PC starts.ADC address ( input channel number ) and data address ADC address ( input channel number ) and data address ( signal number ) are added.( signal number ) are added.The parity bit is added in order to judge whether data are The parity bit is added in order to judge whether data are correct or not.correct or not.

3-state buffer3-state buffer

Front-end Front-end modulemodule # 1# 1



YY

XX

ZZ

Particle Particle orbitorbit

Anode Anode WireWire

Cathode Cathode padpad

ElectriElectric c FieldField

Drift of Drift of ElectronElectron

Image of Image of TPCTPC

Simulation of Verilog HDL Simulation of Verilog HDL for Data takingfor Data taking

ADC divides from 0v to ADC divides from 0v to 1v into 1024 pieces. If 1v into 1024 pieces. If ADC is sent over 1v,ADC ADC is sent over 1v,ADC send error signal to send error signal to FPGA.FPGA.

PC is sent 25-bit per 1 channel . The data of binary PC is sent 25-bit per 1 channel . The data of binary notation is converted into the data of decimal notation in notation is converted into the data of decimal notation in PC. The data is recorded in PC as data of 10 digits. PC. The data is recorded in PC as data of 10 digits.

Based on the read-out test with proto-type, we have determined Based on the read-out test with proto-type, we have determined the design and parameters of the front-end circuit board. the design and parameters of the front-end circuit board. Production of remaining circuit boards has started. A control and Production of remaining circuit boards has started. A control and an analysis program as well as 3D visualization programs have an analysis program as well as 3D visualization programs have been prepared and tested with proto-type circuit. The final been prepared and tested with proto-type circuit. The final verification of the program will be done, when the production is verification of the program will be done, when the production is finished. Once all 72 signal channels of TPC are operated, the finished. Once all 72 signal channels of TPC are operated, the detector performance (position resolution and efficiency) will be detector performance (position resolution and efficiency) will be evaluated . evaluated .

Input run numberInput run number

Documents

Data is sent to PC