Designing Combinational Logic Circuits in Verilog - 2Discussion 7.3

Designing Combinational Logic Circuits in Verilog - 2Binary to Gray code converterGray code to binary converterBinary-to-BCD converter

Gray CodeOne method for generating a Gray code sequence:Start with all bits zero and successively flip the right-most bit that produces a new string. Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}Definition: An ordering of 2n binary numbers such that only one bit changes from one entry to the next. Not unique

Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}Binary - Gray Code ConversionsGray code: G[i], i = n 1 : 0Binary code: B[i], i = n 1 : 0Convert Binary to Gray: Copy the most significant bit. For each smaller iG[i] = B[i+1] ^ B[i] Convert Gray to Binary: Copy the most significant bit. For each smaller iB[i] = B[i+1] ^ G[i]

Gray CodeNote that the least significant bit that can be changed without repeating a value is the bit that is changed 000000001001010011011010100110101111110101111100BinaryB[2:0]Gray CodeG[2:0]Binary to Gray codeG[2] = B[2];G[1:0] = B[2:1] ^ B[1:0];

Binary to Gray code

grayCode = binary ^ (binary >> 1)

G(msb) = B(msb);for(j = msb-1; j >= 0; j=j-1) G(j) = B(j+1) ^ B(j);

msb = 5 for 6-bit codes

MSB

LSB

B[j]

G[j]

bin2gray.vmodule bin2gray ( B ,G );

input [3:0] B ;wire [3:0] B ;

output [3:0] G ;wire [3:0] G ;

assign G[3] = B[3];assign G[2:0] = B[3:1] ^ B[2:0];

endmoduleConvert Binary to Gray: Copy the most significant bit. For each smaller iG[i] = B[i+1] ^ B[i]

Binary to Gray Code Conversion

Designing Combinational Logic Circuits in Verilog - 2Binary to Gray code converterGray code to binary converterBinary-to-BCD converter

Binary coding {0...7}: {000, 001, 010, 011, 100, 101, 110, 111}Gray coding {0...7}: {000, 001, 011, 010, 110, 111, 101, 100}Binary - Gray Code ConversionsGray code: G[i], i = n 1 : 0Binary code: B[i], i = n 1 : 0Convert Binary to Gray: Copy the most significant bit. For each smaller iG[i] = B[i+1] ^ B[i] Convert Gray to Binary: Copy the most significant bit. For each smaller iB[i] = B[i+1] ^ G[i]

Gray Code000000001001010011011010100110101111110101111100BinaryB[2:0]Gray CodeG[2:0]Gray code to BinaryB[2] = G[2];B[1:0] = B[2:1] ^ G[1:0];

Gray code to Binary

B(msb) = G(msb);for(j = msb-1; j >= 0; j--) B(j) = B(j+1) ^ G(j);

MSB

LSB

B[j]

G[j]

module gray2bin6 ( G ,B );

input [5:0] G ;wire [5:0] G ;

output [5:0] B ;wire [5:0] B ;

assign B[5] = G[5];assign B[4:0] = B[5:1] ^ G[4:0];

endmoduleB(msb) = G(msb);for(j = msb-1; j >= 0; j=j-1) B(j) = B(j+1) ^ G(j);Gray code to Binary

gray2bin.vmodule gray2bin ( G ,B );

input [3:0] G ;wire [3:0] G ;

output [3:0] B ;reg [3:0] B ;integer i;

always @(G) beginB[3] = G[3];for(i=2; i >= 0; i = i-1) B[i] = B[i+1] ^ G[i]; end

endmoduleConvert Gray to Binary: Copy the most significant bit. For each smaller iB[i] = B[i+1] ^ G[i]

Gray Code to Binary Conversion

Designing Combinational Logic Circuits in Verilog - 2Binary to Gray code converterGray code to binary converterBinary-to-BCD converter

Shift and Add-3 AlgorithmS1. Shift the binary number left one bit.22. If 8 shifts have taken place, the BCD number is in the Hundreds, Tens, and Units column.33. If the binary value in any of the BCD columns is 5 or greater, add 3 to that value in that BCD column.44. Go to 1.

Steps to convert an 8-bit binary number to BCD

Truth table for Add-3 ModuleCA3 A2 A1 A0S3 S2 S1 S0

K-Map for S3A3 A2A1 A0000111100001111011111X S3 = A3| A2 & A0| A2 & A1 XXXXX

Binary-to-BCDConverter

RTL Solution

Steps to convert a 6-bit binary number to BCD 1. Clear all bits of z to zero2. Shift B left 3 bitsz[8:3] = B[5:0];3. Do 3 times if Units >4 then add 3 to Units (note: Units = z[9:6]) Shift z left 1 bit4. Tens = P[6:4] = z[12:10] Units = P[3:0] = z[9:6]

module binbcd6(B,P);input [5:0] B;output [6:0] P;reg [6:0] P;reg [12:0] z;integer i;

always @(B) begin for(i = 0; i

binbcd6.v

C1

C2

C3

0

0

B5

B4

B3

B2

B1

B0

P7

P6

P5

P4

P3

P2

P1

P0

6-bit binary input

BCD output

tens

units

1 1

1 1

1 1

1 0

1 0

1 0

0 0

1 1

0 0

0 1

1

6

3

Hex 3F

module binbcd8(B,P);input [7:0] B;output [9:0] P;

reg [9:0] P;reg [17:0] z;integer i;

always @(B) begin for(i = 0; i 4) z[15:12] = z[15:12] + 3; z[17:1] = z[16:0]; end P = z[17:8]; end endmodulebinbcd8.v

binbcd8.v

module binbcd9(B,P);input [8:0] B;output [10:0] P;

reg [10:0] P;reg [19:0] z;integer i;

always @(B)begin for(i = 0; i 4) z[16:13] = z[16:13] + 3; z[19:1] = z[18:0]; end P = z[19:9]; end endmodulebinbcd9.v

binbcd9.v

16-bitBinary-to-BCDConverter

module binbcd16(B,P);input [15:0] B;output [18:0] P;

reg [18:0] P;reg [31:0] z;integer i;binbcd16.v

always @(B) begin for(i = 0; i 4) z[23:20] = z[23:20] + 3;if(z[27:24] > 4) z[27:24] = z[27:24] + 3;if(z[31:28] > 4) z[31:28] = z[31:28] + 3;z[31:1] = z[30:0]; end P = z[31:16]; end endmodule

binbcd16.v