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CS352H: Computer Systems Architecture
Lecture 1: What Is Computer Architecture?
August 27, 2009
University of Texas Computer Science CS352H Fall 2009 Don Fussell 1
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Goals
Understand the “how” and “why” of computer systemorganization
Instruction set architectureSystem organization (processor, memory, I/O)Micro-architecture
Learn methods of evaluating performanceMetricsBenchmarks
Learn how to make systems go fastPipelining, cachingParallelism
Learn how to make systems less power hungry (maybe)
University of Texas Computer Science CS352H Fall 2009 Don Fussell 2
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LogisticsLectures: TTh 3:30-5:00, WEL 3.260
Instructor: Don FussellOffice: ACES 2.120Office hours: TTh 2:00-3:00 or by appointmentEmail: [email protected]
TA: Dong LiOffice:Office Hours:Email:
Grading: Final exam 25%Midterm 20%~6 Homework + ~5 paper critiques 30%Project 25%
Homework/project late account - 3 days for the semester
Course webpage:http://www.cs.utexas.edu/~fussell/courses/cs352h
University of Texas Computer Science CS352H Fall 2009 Don Fussell 3
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Resources
Text: Patterson & HennessyComputer Organization & Design:The Hardware/Software Interface, 4th Edition(required)
Reference : Hennessy & PattersonComputer Architecture: A Quantitative Approach(not required)
Software packagesSPIM for MIPS assemblyVerilog for class projectYou will need a CS department Unix account
Using Blackboard:Messages about the class (make sure your e-mail address iscorrect)Other resources as needed in addition to the webpageFor your own discussion groups
University of Texas Computer Science CS352H Fall 2009 Don Fussell 4
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What is expected of you
Attend class and participatePublished lecture notes are just “notes”Remember, Powerpoint was designed for content-free industrialpresentations, there’s more here than fits into bulletsDiscussions matter – they’re the best part of the courseBe a hero – ask stupid questions, you won’t be the only one who iswondering
Do the work – the homework and project are more than halfyour grade for a reason, doing them is the heart of the courseThings aren’t always as simple as they look – the devil is in thedetails, so sweat themDon’t procrastinateTake initiative to follow up on your interestsDon’t cheat: follow code of conductwww.cs.utexas.edu/users/ear/CodeOfConduct.html
University of Texas Computer Science CS352H Fall 2009 Don Fussell 5
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Computer Architecture
“Computer architecture, like other architecture, is the art of determiningthe needs of the user of a structure and then designing to meet thoseneeds as effectively as possible within economic and technologicalconstraints.” F.P. Brooks, Planning a Computer System, Project Stretch, 1962What does this “design” consist of?
A “programming” interface for softwareInstructionsState changes
Organizational principles for processors, memory and I/O devicesProcessors - microarchitectureOverall - system design
In order to:Meet functional and performance targetsWithin constraints, such as cost and powerWhile taking advantage of advances in technology
Architecture is about making tradeoffs
University of Texas Computer Science CS352H Fall 2009 Don Fussell 6
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What Does a Computer Architect Do?
University of Texas Computer Science CS352H Fall 2009 Don Fussell 7
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CS352H Topics
Technology TrendsInstruction set architectures
MIPS instruction setDesigning for performance
PipeliningInstruction level parallelism (ILP)
StaticDynamic
Memory hierarchies and cachesVirtual memoryMultiprocessors and multicoreSystem measurementSystem implementation
University of Texas Computer Science CS352H Fall 2009 Don Fussell 8
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Application constraints
Applications drive machine balanceNumerical simulation, scientific computing, 3-d graphics/games
Floating point performanceMemory bandwidth
Transaction processing, databasesI/O throughputInteger CPU performance
Decision supportI/O bandwidth
Embedded controllersI/O timing, interfacesPower
Video processingLow precision pixel arithmetic
University of Texas Computer Science CS352H Fall 2009 Don Fussell 9
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A Little Perspective: Processor Performance
University of Texas Computer Science CS352H Fall 2009 Don Fussell 10Taken from: Hennessy & Patterson Computer Architecture: A Quantitative Approach, 4th ed
!!!
Log scale!
1Hz = 1 cycle per second. 1GHz = 109 cycles per second
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Technology scaling
CPUsDevice density: 2x every 1.5 years (~60%per year)Latency: 2x every 5 years (~15% per year)
Memory (DRAM)Capacity: 4x every 3 years (~60% per year)(2x every two years lately)Latency: 1.5x every 10 yearsCost per bit: decreases about 25% per year
Hard drives:Capacity: 4x every 3 years (~60% per year)Bandwidth: 2.5x every 4 yearsLatency: 2x every 5 years
Boards:Wire density: 2x every 15 years
Cables:No change
University of Texas Computer Science CS352H Fall 2009 Don Fussell 11
Machines Adapt to Changes in Technology
1970sMulti-chip CPUsSemiconductor memory is veryexpensiveMicro-coded controlComplex instruction sets
1980sSingle-chip CPUsSome on-chip RAMSimple, hard-wired controlSimple instruction setsSmall on-chip caches
1990sLots of transistorsComplex control to exploit ILPLots of on-chip memoryMulti-level caches
2000sApproaching 1B transistors!Slow wiresPower becoming expensiveMulticores
University of Texas Computer Science CS352H Fall 2009 Don Fussell 12
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The Times They Are A-Changin'
University of Texas Computer Science CS352H Fall 2009 Don Fussell 13
1962
2001
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What is a Computer?
Supercomputer?Web server?Game console?Desktop?Notebook?Microcontroller?
Each of these “lives” in a different space with its ownrequirements and constraintsWe need to pick one for this course
DesktopUsing the MIPS ISA
University of Texas Computer Science CS352H Fall 2009 Don Fussell 14
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Interface Design
Interface vs. ImplementationVisibility
Three types of interfaces:Between layers
API, ISABetween modules
SCSI, PCIStandard representations
IEEE floating point, ASCII
A good interfaceLasts through several generations of implementationsIs simple – ‘economy of mechanism’ (KISS)
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Instruction-Set Architecture (ISA)
University of Texas Computer Science CS352H Fall 2009 Don Fussell
HW/SW interfaceSW Impact
Support OS functionsRestartable instructionsMemory management
A good compiler targetSimpleOrthogonal
DenseHW Impact
Amenable to efficientimplementation over timeAmenable to parallelization
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System-Level Organization
Design at the level ofprocessors, memories, …More important toapplication performancethan CPU designFeeds and speeds
Constrained by pincounts and signalingrates
System balanceApplication-specific
Driven byPerformance/cost goalsAvailable componentsTechnology constraints
University of Texas Computer Science CS352H Fall 2009 Don Fussell 17
Boot PROM
L2$ CC
MBus Module
MBus
L64852 MBus controlM-S Adapter
SBus
DRAM Controller
SBusDMA
SCSIEthernet
STDIOserialkbdmouseaudioRTC
FloppySBusCards
Sun SparcStation20
CPU
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Micro-architecture
Register-transfer-level (RTL)Implement instruction setExploit technology capabilities
Locality & concurrencyIterative process
Generate architectureEstimate costEvaluate performance
Overcoming sequential natureof programs
PipeliningMultiple issueDynamic schedulingBranch prediction/speculation
University of Texas Computer Science CS352H Fall 2009 Don Fussell 18
TI SuperSPARC™ TMS390Z50
Floating-point Unit
Integer Unit
InstCache
RefMMU
DataCache
StoreBuffer
Bus Interface
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Performance Evaluation
What’s the right measure?Instruction count? cache b/w? I/O throughput?Application response time? Application throughput?
Measure what?Benchmarks? Real applications? Traces?
Measure how?Simulation? Math models? Real tests?
University of Texas Computer Science CS352H Fall 2009 Don Fussell 19
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Major Components of a Computer
Desktop design targetProcessor: 25% of costMemory: 25% of costRest (I/O devices, power supply, enclosure): 50%
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Processor
Control
Datapath
Memory
Devices
Input
Output
Network
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Motherboard organization
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Mac mini
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Summary
Architecture: Structure of “things”Interplay between technology and architectureComputer architect uses quantitative methods to:
Design interfacesDevelop machine organization: system-level & micro-architecture
This course:Instruction-Set Architectures (ISAs)Performance evaluation (a tiny bit)PipeliningMemorySystem organizationParallelismPower
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First Assignment
Read the Moore paper (see webpage)Write a one page critique
Typewritten, font size 10-12Critique format
Headline message: a one sentence tag line for the paperElevator pitch: a one paragraph summary of the paper’s keymessagesA couple of paragraphs to support and analyze the elevator pitch
Hand in your one page review at the beginning of next classYou should use this format for all other papers as well
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Next Time
Hand in a hard copy of your one-page typewritten review of theMoore paper at the beginning of the classWe’ll discuss the paperThen, instruction set architectures, specifically the MIPS ISARead Chap 1 for backgroundRead Chap 2.1-2.10 for class prep
University of Texas Computer Science CS352H Fall 2009 Don Fussell 27