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CS3410 HW1 Review 2014, 2, 21

CS3410 HW1 Review 2014, 2, 21. Agenda We will go through the HW1 questions together TAs will then walk around to help

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CS3410 HW1 Review

2014, 2, 21

Agenda

• We will go through the HW1 questions together

• TAs will then walk around to help

Question 1: Karnaugh Mapa b c out

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 0

1 1 1 0

0 0 0 1

1 1 0 1

00 01 11 10

0

1

cab

0

1

0

1

1

1

0

0

• Sum of products:

• Karnaugh map minimization:• Cover all 1’s• Group adjacent blocks of 2n

1’s that yield a regular shape• Encode common features

cbabcabcacabout

cabaout

Rules for Karnaugh Map Minimization

• Minterms can overlap• Minterms can span 1, 2, 4, 8 … cells• The map can wrap around

0 0 0 1

1 1 0 1

00 01 11 10

0

1

cab

1

0

0

0

1

0

0

0

0 0 0 1

1 1 0 1

10 00 01 11

0

1

cab

1

0

1

0

0

0

0

0

Question 2: Numbers & Arithmetic

• Binary translation:– Base conversion via repetitive division

• From binary to Hex and Oct• Negating a number (2’s complement)• Overflow– Overflow happened iff

carry into msb != carry out of msb

Question 4: FSM

x

Output

Okay

x0

Spam filter

x2 x1

Question 4: FSM (cont.)

0 1 0 12…..

01 2

x

Output

Okay

x0

Spam filter

x2 x1

Question 4: FSM (cont.)

0 1 0 12…..

01 2

SPAM

Question 4: FSM (cont.)Current state Input Next state Output

x1 x2 x0 x1’=x0 x2’=x1

0 0 0 0 0 okay

0 0 1 1 0 okay

0 0 2 2 0 okay

0 1 0 0 0 okay

0 1 1 1 0 okay

0 1 2 2 0 okay

0 2 0 0 0 spam

… … … … … …

State (x1=0, x2=0) and (x1=0, x2=1) have exactly the same transitions AND output. So they are NOT distinct states.

Question 7: Performance

• Instruction mix for some program P, assume:– 25% load/store ( 3 cycles / instruction)– 60% arithmetic ( 2 cycles / instruction)– 15% branches ( 1 cycle / instruction)

• CPI:– 3 * .25 + 2 * .60 + 1 * .15 = 2.1

• CPU Time = # Instructions x CPI x Clock Cycle Time– Assuming 400k instructions, 30 MHz :

• 400k * 2.1 / 30 = 28000 µs (1 µs = 1 microsecond = 1/1M S)

Question 8

Registers and Control are in

parallel

Question 8 (cont.)

• Refer to section 1.6 in the text book• 4.3.1: The clock cycle time is determined by

the critical path (the load instruction)• 4.3.2: – Speedup =

– Execution time = cycle time * num of instructions– Speedup < 1 means we are actually slowing down

Execution time (old)Execution time (new)

Question 8 (cont.)

• 4.3.3:– Cost-performance ratio (CPR) = – The higher, the better– This question asks for a “comparison” of CPR

CPR ratio= = *

PerformanceCost

CPR (old)CPR (new)

Cost (new)Cost (old)

Perf (old)Perf (new)

1speedup

Question 9/10/11: Assembler Code

• Writing the instructions in a human-readable format– http://www.cs.cornell.edu/courses/CS3410/2014s

p/MIPS_Vol2.pdf• Core instruction set– http://www.cs.cornell.edu/courses/CS3410/2014s

p/project/pa1/pa1.html

Assembler Code

• When writing the assembler code:– Decide which register stores which variable• Typically you should use $t0~$t9 and $s0~$s7 (You

don’t need to understand their difference now)

– Decide which instruction you want to use• Get familiar with the core instruction set• Get familiar with some basic patterns

Basic Assembler Coding Patterns

• Arithmetic– C code:

– Assembler:a = b + c;

#a: $s0, b: $s1, c:$s2ADD $s0, $s1, $s2

Basic Assembler Coding Patterns

• Brunch– C code:

– Assembler:

if(a < b)//DO A...

else//DO B...

#a: $s0, b: $s1SLT $t0, $s0, $s1BEQ $t0, $zero, POINTB#DO A...

POINTB:#DO B...

Basic Assembler Coding Patterns

• While loop– C code:

– Assembler:

while(a < b)//Do something...

#a: $s0, b: $s1LOOP:SLT $t0, $s0, $s1BEQ $t0, $zero, EXIT#Do something...J LOOPEXIT:#Out of the loop...

Basic Assembler Coding Patterns

• Array access– C code:

– Assembler:

int myArray[10];a = myArray[2];

#a: $s0, myArray: $s1LW $s0, 8($s1)

C Programming

• Have you tried the hello-world?• Use csuglab machines. It is easier.• How to read input from the terminal?– scanf:

– You need a buffer for itint scanf ( const char * format, ... );

Good Luck! Questions?