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CS 35101.1 Spring 2008 CS 35101 Computer Architecture Spring 2008 2.9 and 2.10 Taken from Mary Jane Irwin (www. cse . psu . edu/~mji ) Week 5 FA07 CSE 331 slides [adapted from D. Patterson slides]

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Page 1: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.1 Spring 2008

CS 35101Computer Architecture

Spring 2008

2.9 and 2.10

Taken from Mary Jane Irwin (www.cse.psu.edu/~mji) Week 5 FA07 CSE 331slides

[adapted from D. Patterson slides]

Page 2: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.2 Spring 2008

MIPS Operand Addressing Modes SummaryRegister addressing – operand is in a register

Base (displacement) addressing – operand’saddress in memory is the sum of a register anda 16-bit constant contained within the instruction

Immediate addressing – operand is a 16-bitconstant contained within the instruction

1. Register addressingop rs rt rd funct Register

word operand

op rs rt offset2. Base addressing

base register

Memoryword or byte operand

3. Immediate addressingop rs rt operand

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CS 35101.3 Spring 2008

MIPS Instruction Addressing Modes SummaryPC-relative addressing – instruction’s address

in memory is the sum of the PC and a 16-bitconstant contained within the instruction

Pseudo-direct addressing – instruction’saddress in memory is the 26-bit constantcontained within the instruction concatenatedwith the upper 4 bits of the PC

4. PC-relative addressingop rs rt offset

Program Counter (PC)

Memorybranch destination instruction

5. Pseudo-direct addressingop jump address

Program Counter (PC)

Memoryjump destination instruction|

|

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CS 35101.4 Spring 2008

Review: MIPS Instructions, so far

$s1 = 0xffff0000lui $s1, 0xfffffload upperimmediate

$s1 = $s2 | 0xff00or $s1, $s2, ff00dor immediate$s1 = $s2 & 0xff00and $s1, $s2, ff00cand immediate$s1 = not ($s2 | $s3)nor $s1, $s2, $s30 & 27nor$s1 = $s2 | $s3or $s1, $s2, $s30 & 25or$s1 = $s2 & $s3and $s1, $s2, $s30 & 24and

$s1 = $s2 >> 4 (fill withsign bit)

sra $s1, $s2, 40 & 03shift rightarithmetic

$s1 = $s2 >> 4 (fill withzeros)

srl $s1, $s2, 40 & 02shift rightlogical

$s1 = $s2 << 4sll $s1, $s2, 40 & 00shift left logical$s1 = $s2 + 4addi $s1, $s2, 48add immediate

0 & 220 & 20

OpC

$s1 = $s2 - $s3sub $s1, $s2, $s3subtract$s1 = $s2 + $s3add $s1, $s2, $s3addArithmetic

(R & Iformat)

MeaningExampleInstrCategory

Page 5: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.5 Spring 2008

Review: MIPS Instructions, so far

go to 10000; $ra=PC+4jal 25003jump and link

Memory($s2+102) = $s1sh $s1, 101($s2)29store half$s1 = Memory($s2+102)lh $s1, 101($s2)21load halfMemory($s2+101) = $s1sb $s1, 101($s2)28store byte$s1 = Memory($s2+101)lb $s1, 101($s2)20load byte

if ($s2<$s3) $s1=1;else $s1=0

slt $s1, $s2, $s30 & 2aset on lessthan

go to $t1jr $t10 & 08jump registergo to 10000j 25002jumpUncond.

jump

if ($s2<100) $s1=1;else $s1=0

slti $s1, $s2,100

aset on lessthan immediate

if ($s1 !=$s2) go to Lbne $s1, $s2, L5br on not equalif ($s1==$s2) go to Lbeq $s1, $s2, L4br on equalCond.

branch(I & Rformat)

2b23

OpC

Memory($s2+100) = $s1sw $s1, 100($s2)store word$s1 = Memory($s2+100)lw $s1, 100($s2)load wordData

transfer(I format)

MeaningExampleInstrCategory

Page 6: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.6 Spring 2008

Review: MIPS R3000 ISA Instruction Categories

Load/Store Computational Jump and Branch Floating Point

- coprocessor Memory Management Special

3 Instruction Formats: all 32 bits wide

R0 - R31

PCHILO

OP rs rt rd shamt funct

OP rs rt 16 bit number

OP 26 bit jump target

Registers

R format

I format

6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

J format

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CS 35101.7 Spring 2008

RISC Design Principles ReviewSimplicity favors regularity

fixed size instructions – 32-bits small number of instruction formats

Smaller is faster limited instruction set limited number of registers in register file limited number of addressing modes

Good design demands good compromises three instruction formats

Make the common case fast arithmetic operands from the register file (load-

store machine) allow instructions to contain immediate operands

Page 8: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.8 Spring 2008

(2.10) The Code Translation HierarchyC program

compiler

assembly code

Page 9: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.9 Spring 2008

Compiler

Transforms the C program into an assemblylanguage program

Advantages of high-level languages many fewer lines of code easier to understand and debug …

Today’s optimizing compilers can produceassembly code nearly as good as an assemblylanguage programming expert and often betterfor large programs smaller code size, faster execution

Page 10: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.10 Spring 2008

The Code Translation HierarchyC program

compiler

assembly code

assembler

object code

Page 11: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.11 Spring 2008

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CS 35101.12 Spring 2008

AssemblerDoes a syntactic check of the code (i.e., did you

type it in correctly) and then transforms thesymbolic assembler code into object (machine)code

Advantages of assembler much easier than remembering instr’s binary codes can use labels for addresses – and let the assembler

do the arithmetic can use pseudo-instructions

- e.g., “move $t0, $t1” exists only in assembler (would beimplemented using “add $t0,$t1,$zero”)

When considering performance, you should countinstructions executed, not code size

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CS 35101.13 Spring 2008

The Two Main Tasks of the AssemblerBuilds a symbol table which holds the

symbolic names (labels) and theircorresponding addresses A label is local if it is used only within the file where

its defined. Labels are local by default. A label is external (global) if it refers to code or

data in another file or if it is referenced fromanother file. Global labels must be explicitlydeclared global (e.g., .globl main)

Translates each assembly languagestatement into object (machine) code by“assembling” the numeric equivalents of theopcodes, register specifiers, shift amounts,and jump/branch targets/offsets

Page 14: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.14 Spring 2008

MIPS (spim) Memory AllocationMemory

230

words

0000 0000

f f f f f f f c

TextSegment

Reserved

Static data

Mem Map I/O

0040 0000

1000 00001000 8000

7f f f f f fcStack

Dynamic data

$sp

$gp

PC

Kernel Code& Data

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CS 35101.15 Spring 2008

Other Tasks of the AssemblerConverts pseudo-instr’s to legal assembly code

register $at is reserved for the assembler to do this

Converts branches to far away locations into abranch followed by a jump

Converts instructions with large immediates intoa lui followed by an ori

Converts numbers specified in decimal andhexidecimal into their binary equivalents andcharacters into their ASCII equivalents

Deals with data layout directives (e.g., .asciiz)Expands macros (frequently used sequences of

instructions)

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CS 35101.16 Spring 2008

Typical Object File Pieces Object file header: size and position of the following

pieces of the file Text (code) segment (.text) : assembled object

(machine) code Data segment (.data) : data accompanying the code

static data - allocated throughout the program dynamic data - grows and shrinks as needed

Relocation information: identifies instructions (data)that use (are located at) absolute addresses – notrelative to a register (including the PC) on MIPS only j, jal, and some loads and stores (e.g.,lw $t1, 100($zero) ) use absolute addresses

Symbol table: global labels with their addresses (ifdefined in this code segment) or without (if definedexternal to this code segment)

Debugging information

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CS 35101.17 Spring 2008

An Example.data.align 0

str: .asciiz "The answer is "cr: .asciiz "\n"

.text

.align 2

.globl main

.globl printfmain: ori $2, $0, 5

syscallmove $8, $2

loop: beq $8, $9, doneblt $8, $9, brncsub $8, $8, $9j loop

brnc: sub $9, $9, $8j loop

done: jal printf

???? ????printfyes

yes

Gbl?

0040 0024done0040 001cbrnc0040 000cloop0040 0000main1000 000bcr1000 0000str

AddressSymbol

jal printf0040 0024

str1000 0000cr1000 000b

Relocation Info

j loop0040 0020j loop0040 0018

Data/InstrAddress

Page 18: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.18 Spring 2008

The Code Translation HierarchyC program

compiler

assembly code

assembler

object code library routines

executable

linker

machine code

main text segment

printf text segment

Page 19: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.19 Spring 2008

LinkerTakes all of the independently assembled code segments

and “stitches” (links) them together Faster to recompile and reassemble a patched segment, than it

is to recompile and reassemble the entire program

Decides on memory allocation pattern for the code anddata segments of each module Remember, modules were assembled in isolation so each has

assumed its code’s starting location is 0x0040 0000 and its staticdata starting location is 0x1000 0000

Relocates absolute addresses to reflect the new startinglocation of the code segment and its data segment

Uses the symbol tables information to resolve allremaining undefined labels branches, jumps, and data addresses to/in external modules

Linker produces an executable file

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CS 35101.20 Spring 2008

Linker Code Schematic

printf: . . .

main: . . . jal ????

call, printf

Linker

Object file

C library

Relocationinfo

main: . . . jal printfprintf: . . .

Executable file

Page 21: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.21 Spring 2008

Linking Two Object FilesH

dr

T

xtse

g

D

seg

R

eloc

S

mtb

l D

bg

File 1

Hdr

T

xtse

g

Dse

g

Rel

oc S

mtb

l D

bg

File 2+

Executable

Hdr

Tx

tseg

D

seg

Rel

oc

Page 22: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.22 Spring 2008

The Code Translation HierarchyC program

compiler

assembly code

assembler

object code library routines

executable

linker

loader

memory

machine code

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CS 35101.23 Spring 2008

Loader

Loads (copies) the executable code now storedon disk into memory at the starting addressspecified by the operating system

Copies the parameters (if any) to the mainroutine onto the stack

Initializes the machine registers and sets thestack pointer to the first free location (0x7fff fffc)

Jumps to a start-up routine (at PC addr 0x00400000 on xspim) that copies the parameters intothe argument registers and then calls the mainroutine of the program with a jal main

Page 24: CS 35101 Computer Architecture Spring 2008 2.9 and 2ssteinfa/classes/arch.sp08/slides/Ch2/PDF/chapter... · CS 35101.2 Spring 2008 MIPS Operand Addressing Modes Summary Register addressing

CS 35101.24 Spring 2008

Dynamically Linked LibrariesStatically linking libraries mean that the library

becomes part of the executable code It loads the whole library even if only a small part is

used (e.g., standard C library is 2.5 MB) What if a new version of the library is released ?

(Lazy) dynamically linked libraries (DLL) –library routines are not linked and loaded until aroutine is called during execution The first time the library routine called, a dynamic

linker-loader must- find the desired routine, remap it, and “link” it to the calling

routine (see book for more details)

DLLs require extra space for dynamic linkinginformation, but do not require the whole library to becopied or linked