CMLCML

CS 230: Computer Organization and

Assembly LanguageAviral

ShrivastavaDepartment of Computer Science and

EngineeringSchool of Computing and Informatics

Arizona State University

Slides courtesy: Prof. Yann Hang Lee, ASU, Prof. Mary Jane Irwin, PSU, Ande Carle, UCB

CMLCML

Announcements• Quiz 2• Project 2

• Quiz 3– Thursday, Oct 06, 2009– Complete Chapter 3

• Project 3– Implement an assembler

CMLCML

Multiplication

• Binary makes it easy– Multiplier bit = 0 place 0– Multiplier bit = 1 place multiplicand

• (232-1)*(232-1) = 264 – 2.232 + 1 – need 64-bits

Multiplicand 1 0 0 0Multiplier x 1 0 0 1 -------------- 1 0 0 0

0 0 0 0 0 0 0 0

1 0 0 0 ------------------Product 1 0 0 1 0 0 0

CMLCML

MultiplicationMultiplicand 1 0 0 0Multiplier x 1 0 0 1 -------------- 1 0 0 0

0 0 0 0 0 0 0 0

1 0 0 0 ------------------Product 1 0 0 1 0 0 0

0 0 0 0 1 0 0 0 x 1 0 0 1---------------------------------- 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 ----------------------- 0 1 0 0 1 0 0 0

Multiplicand

Product

Multiplier

64-bit ALU

64-bit

Control

Shift left Shift right

Add

Write

64-bit

Test

What should be added in each step

CMLCML

Multiplication 0 0 0 0 1 0 0 0 x 1 0 0 1------------------------------------- 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 ----------------------- 0 1 0 0 1 0 0 0

8-bit

Control

Shift left Shift right

Add

Write

8-bit

Test

00001000 1001

00000000

1. Initialize2. Test, Add, Write

00001000

3. Shift left multiplicand, shift right multiplier

00010000 0100

4. Test5. Shift left multiplicand, shift right multiplier

00100000 0010

6. Test7. Shift left multiplicand, shift right multiplier

01000000 0001

8. Test, Add, Write9. Shift left multiplicand, shift right multiplier

01001000

100000004-bit

10. Done

0000

CMLCML

Multiply Algorithm 2Multiplicand 1 0 0 0Multiplier x 1 0 0 1 -------------- 1 0 0 0

0 0 0 0 0 0 0 0

1 0 0 0 ------------------Product 1 0 0 1 0 0 0

1 0 0 0 x 1 0 0 1------------------------------------ 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0

Partial Product at each step

Multiplicand

Product

Multiplier

32-bit ALU

32-bit

Control

Shift right

Add

Write

64-bit Shift right

Test

CMLCML

Multiply Algorithm 2

4-bit

Control

Shift right

Add

Write

8-bit

1 0 0 0 x 1 0 0 1---------------------------- 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0

Shift right

Test

4-bit10011000

00000000

1. Initialize2. Test, Add3. Shift product right, shift multiplier right

10000000

4. Test

01000000

5. Shift product right, shift multiplier right

00100000

6. Test

00010000

7. Shift product right, shift multiplier right

10010000

8. Test, Add9. Shift product right, shift multiplier right

01001000

10. Done

0100001000010000

CMLCML

Multiply Algorithm 2*

Multiplicand

32-bit ALU

32-bit

Control

Add

Write

64-bit

1 0 0 0 x 1 0 0 1------------------------------------- 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 ----------------------- 0 1 0 0 1 0 0 0

Shift right

Multiplier Test

CMLCML

Multiplication

• multu $rs $rt– Has 2 sources (32-bit registers)– No explicit destination

• Has 2 implicit destinations– $hi – upper 32-bits– $lo – lower 32-bits

– Have to explicitly read these registers• mflo $rd

– Moves from $lo to $rd• mfhi $rd

– Moves from $hi to $rd

• Also mult – signed multiply– Multiply & then take care of the sign separately

CMLCML

Division 1001 Quotient --------------- Divisor 1000 | 1001010 - 1000 ----------- 10 101 1010 -1000 --------- 10 Remainder

Divisor

Remainder

Quotient

64-bit ALU

64-bit

Control

Shift right Shift left

Subtract

Write

64-bit Test

32-bit

Divisor 1000 Quotient 1001Dividend: 1001010 0001010 0001010 0001010 0000010 Remainder

CMLCML

Division 1001 Quotient --------------- Divisor 1000 | 1001010 - 1000 ----------- 10 101 1010 -1000 --------- 10 Remainder

64-bit ALU

8-bit

Control

Shift right Shift left

Add/Sub

Write

8-bit Test

10000000

1. Initialize

0000

01001010

2. Subtract & test

5. Push 1 in quotient, shift divisor right

4-bit

6. Subtract & test7. Restore remainder, push 0 in quotient, shift divisor right8. Subtract & test9. Restore remainder, push 0 in quotient, shift divisor right

10. Subtract & test11. Push 1 in quotient, shift divisor right

11001010

3. Restore remainder, push 0 in quotient, shift divisor right4. Subtract & test

12. Done

01001010

01000000

00001010

000100100000

1110101000001010

001000010000

1111101000001010

010000001000

00000010

100100000100

CMLCML

Division

• div, divu – $lo = $rs/$rt; $hi = $rs%$rt

• Need mflo and mfhi– Transfer results of div to normal

registers

• Signed Division– Calculate the sign bit separately

CMLCML

Improved Division• Instead of shifting divisor right

– Shift remainder to left– Use the least significant bits of remainder to store

the quotient

Divisor

32-bit ALU

32-bit

Control

Add

Write

64-bit Shift right

Remainder

CMLCML

Yoda says…

• Luke: I can’t believe it. • Yoda: That is why you fail