CS110ComputerArchitecture

Lecture24:MoreI/O:DMA,Disks,Networking

Instructor:SörenSchwertfeger

http://shtech.org/courses/ca/

School of Information Science and Technology SIST

ShanghaiTech University

1Slides based on UC Berkley's CS61C

VirtualMemoryReview

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ModernVirtualMemorySystemsIllusionofalarge,private,uniformstore

Protection & Privacy* Many processes, each with their own private address space and one or more shared address spaces

Demand Paging* Many processes share DRAM. * Provides ability to run programs with large address space. Pages that aren’t yet allocated or pages that don’t fit swap to secondary storage.* Hides differences in machine configurations

The price is address translation on each memory reference

OS

Prog1

PrimaryMemory

Swapping Store (Disk)

VA PAmappingTLB

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Private(Virtual)AddressSpaceperProgram

• Each prog has a page table • Page table contains an entry for each prog page

VA1Prog 1

Page Table

VA1Prog 2

Page Table

VA1Prog 3

Page Table

Phys

ical

Mem

ory

free

OSpages

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TranslationLookaside Buffers(TLB)Address translation is very expensive!

In a two-level page table, each reference becomes several memory accesses

Solution: Cache translations in TLBTLB hit => Single-Cycle TranslationTLB miss => Page-Table Walk to refill

VPN offset

V R W D tag PPN

physical address PPN offset

virtual address

hit?

(VPN = virtual page number)

(PPN = physical page number)

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Page-BasedVirtual-MemoryMachine(HardwarePage-TableWalk)

PCInst.TLB

Inst.Cache D Decode E M

DataCache W+

PageFault?Protectionviolation?

PageFault?Protectionviolation?

• Pagetablesheldinuntranslated physicalmemory

DataTLB

MainMemory (DRAM)

MemoryController PhysicalAddress

PhysicalAddress

PhysicalAddress

PhysicalAddress

Page-Table Base Register

VirtualAddress Physical

Address

VirtualAddress

HardwarePageTableWalker

Miss? Miss?

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AddressTranslation:puttingitalltogetherVirtual Address

TLBLookup

Page TableWalk

Update TLBPage Fault(OS loads page)

ProtectionCheck

PhysicalAddress(to cache)

miss hit

the page is notinmemory inmemory denied permitted

ProtectionFault

hardwarehardware or softwaresoftware

SEGFAULTWhere?

Review:I/O• “MemorymappedI/O”:Devicecontrol/dataregistersmappedtoCPUaddressspace

• CPUsynchronizeswithI/Odevice:– Polling– Interrupts

• “ProgrammedI/O”:– CPUexecslw/sw instructionsforalldatamovementto/fromdevices

– CPUspendstimedoing2things:1. Gettingdatafromdevicetomainmemory2. Usingdatatocompute

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Workingwithrealdevices• “MemorymappedI/O”:Devicecontrol/dataregistersmappedtoCPUaddressspace

• CPUsynchronizeswithI/Odevice:– Polling– Interrupts

• “ProgrammedI/O”:DMA– CPUexecslw/sw instructionsforalldatamovementto/fromdevices

– CPUspendstimedoing2 things:1. Gettingdatafromdevicetomainmemory2. Usingdatatocompute

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Agenda

• DirectMemoryAccess(DMA)• Disks• Networking

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What’swrongwithProgrammedI/O?

• Notidealbecause…1. CPUhastoexecutealltransfers,couldbedoing

otherwork2. Devicespeedsdon’talignwellwithCPUspeeds3. Energycostofusingbeefygeneral-purposeCPU

wheresimplerhardwarewouldsuffice• UntilnowCPUhassolecontrolofmainmemory

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PIOvs.DMA

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DirectMemoryAccess(DMA)

• AllowsI/Odevicestodirectlyread/writemainmemory

• NewHardware:theDMAEngine• DMAenginecontainsregisterswrittenbyCPU:

– Memoryaddresstoplacedata– #ofbytes– I/Odevice#,directionoftransfer– unitoftransfer,amounttotransferperburst

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OperationofaDMATransfer

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[FromSection5.1.4DirectMemoryAccessinModernOperatingSystemsbyAndrewS.Tanenbaum,HerbertBos,2014]

DMA:IncomingData

1. Receiveinterruptfromdevice2. CPUtakesinterrupt,beginstransfer

– InstructsDMAengine/devicetoplacedata@certainaddress

3. Device/DMAenginehandlethetransfer– CPUisfreetoexecuteotherthings

4. Uponcompletion,Device/DMAengineinterrupttheCPUagain

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DMA:OutgoingData

1. CPUdecidestoinitiatetransfer,confirmsthatexternaldeviceisready

2. CPUbeginstransfer– InstructsDMAengine/devicethatdataisavailable@certainaddress

3. Device/DMAenginehandlethetransfer– CPUisfreetoexecuteotherthings

4. Device/DMAengineinterrupttheCPUagaintosignalcompletion

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DMA:Somenewproblems

• WhereinthememoryhierarchydoweplugintheDMAengine?Twoextremes:– BetweenL1andCPU:

• Pro:Freecoherency• Con:TrashtheCPU’sworkingsetwithtransferreddata

– BetweenLast-levelcacheandmainmemory:• Pro:Don’tmesswithcaches• Con:Needtoexplicitlymanagecoherency

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DMA:Somenewproblems

• HowdowearbitratebetweenCPUandDMAEngine/Deviceaccesstomemory?Threeoptions:– BurstMode

• Starttransferofdatablock,CPUcannotaccessmemoryinthemeantime

– CycleStealingMode• DMAenginetransfersabyte,releasescontrol,thenrepeats- interleavesprocessor/DMAengineaccesses

– TransparentMode• DMAtransferonlyoccurswhenCPUisnotusingthesystembus

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Agenda

• DirectMemoryAccess(DMA)• Disks• Networking

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ComputerMemoryHierarchy

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MagneticDisk– commonI/Odevice• Akindofcomputermemory

– Informationstoredbymagnetizingferritematerialonsurfaceofrotatingdisk

• similartotaperecorderexceptdigitalratherthananalogdata

• Atypeofnon-volatilestorage– retainsitsvaluewithoutapplyingpowertodisk.

• TwoTypesofMagneticDisk1. HardDiskDrives(HDD)– faster,moredense,non-removable.2. Floppydisks– slower,lessdense,removable(nowreplacedbyUSB

“flashdrive”).

• Purposeincomputersystems(HardDrive):1. Workingfilesystem+long-termbackupforfiles2. Secondary“backingstore”formain-memory.Large,inexpensive,

slowlevelinthememoryhierarchy(virtualmemory)

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PhotoofDiskHead,Arm,Actuator

Arm

Head

Spindle

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DiskDeviceTerminology

• Severalplatters,withinformationrecordedmagneticallyonbothsurfaces(usually)

• Bitsrecordedintracks,whichinturndividedintosectors (e.g.,512Bytes)

• Actuator moveshead (endofarm)overtrack(“seek”),waitforsector rotateunderhead,thenreadorwrite

OuterTrack

InnerTrackSector

Actuator

HeadArmPlatter

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HardDrivesareSealed.Why?• Theclosertheheadtothedisk,the

smallerthe“spotsize”andthusthedensertherecording.– MeasuredinGbit/in^2– ~900Gbit/in^2isstateoftheart– Startedoutat2Kbit/in^2– ~450,000,000ximprovementin~60

years• Disksaresealedtokeepthedust

out.– Headsaredesignedto“fly”ataround

3-20nmabovethesurfaceofthedisk.– 99.999%ofthehead/armweightis

supportedbytheairbearingforce(aircushion)developedbetweenthediskandthehead.

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3-20nm

DiskDevicePerformance(1/2)

• Disk Access Time = Seek Time + Rotation Time + Transfer Time + Controller Overhead– SeekTime=timetopositiontheheadassemblyatthepropercylinder– RotationTime=timeforthedisktorotatetothepointwherethefirst

sectorsoftheblocktoaccessreachthehead– TransferTime=timetakenbythesectorsoftheblockandanygaps

betweenthemtorotatepastthehead

Platter

Arm

Actuator

HeadSectorInnerTrack

OuterTrack

ControllerSpindle

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DiskDevicePerformance(2/2)

• Averagevaluestoplugintotheformula:• RotationTime:Averagedistanceofsectorfromhead?– 1/2timeofarotation

• 7200RevolutionsPerMinute=> 120Rev/sec• 1revolution=1/120sec=> 8.33milliseconds• 1/2rotation(revolution)=> 4.17ms

• Seektime:Averageno.trackstomovearm?– Numberoftracks/3– Then,seektime=numberoftracksmoved× timetomoveacrossonetrack

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Butwait!

• Performanceestimatesaredifferentinpractice:

• Manydiskshaveon-diskcaches,whicharecompletelyhiddenfromtheoutsideworld– Previousformulacompletelyreplacedwithon-diskcacheaccesstime

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WheredoesFlashmemorycomein?• ~10yearsago:Microdrives andFlashmemory(e.g.,CompactFlash)wenthead-to-head– Bothnon-volatile(retainscontentswithoutpowersupply)

– Flashbenefits:lowerpower,nocrashes(nomovingparts,needtospinµdrivesup/down)

– Diskcost=fixedcostofmotor+armmechanics,butactualmagneticmediacostverylow

– Flashcost=mostcost/bitofflashchips– Overtime,cost/bitofflashcamedown,becamecostcompetitive

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FlashMemory/SSDTechnology

• NMOStransistorwithanadditional conductorbetweengateandsource/drainwhich“traps”electrons.Thepresence/absenceisa1or0

• Memorycellscanwithstandalimitednumber ofprogram-erasecycles.ControllersuseatechniquecalledwearlevelingtodistributewritesasevenlyaspossibleacrossalltheflashblocksintheSSD.

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WhatdidAppleputinitsiPods?Samsung flash

16 GB

shuffle nano classic touch

Toshiba 1.8-inch HDD80, 120, 160 GB

Toshiba flash2 GB

Toshiba flash32, 64 GB

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FlashMemoryinSmartPhones

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iPhone6:upto128GB

FlashMemoryinLaptops– SolidStateDrive(SSD)

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capacitiesupto1TB

HDDvsSSDspeed

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Question• Wehavethefollowingdisk:

– 15000Cylinders,1ms tocross1000Cylinders– 15000RPM=4ms perrotation– Wanttocopy1MB,transferrateof1000MB/s– 1ms controllerprocessingtime

• Whatistheaccesstimeusingourmodel?

DiskAccessTime=SeekTime+RotationTime+TransferTime+ControllerProcessingTime

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A B C D E

10.5 ms 9 ms 8.5ms 11.4ms 12 ms

Question

• Wehavethefollowingdisk:– 15000Cylinders,1ms tocross1000Cylinders– 15000RPM=4ms perrotation– Wanttocopy1MB,transferrateof1000MB/s– 1ms controllerprocessing time

• Whatistheaccesstime?Seek=#cylinders/3*time=15000/3*1ms/1000cylinders=5msRotation=timefor½rotation=4ms /2=2msTransfer=Size/transferrate=1MB/(1000MB/s)=1msController=1msTotal=5+2+1+1=9ms

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Agenda

• DirectMemoryAccess(DMA)• Disks• Networking

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Networks:TalkingtotheOutsideWorld

• OriginallysharingI/Odevicesbetweencomputers– E.g.,printers

• Thencommunicatingbetweencomputers– E.g.,filetransferprotocol

• Thencommunicatingbetweenpeople– E.g.,e-mail

• Thencommunicatingbetweennetworksofcomputers– E.g.,filesharing,www,…

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• History– 1963:JCRLicklider,whileat

DoD’s ARPA,writesamemodescribingdesiretoconnectthecomputersatvariousresearchuniversities:Stanford,Berkeley,UCLA,...

– 1969:ARPAdeploys4“nodes”@UCLA,SRI,Utah,&UCSB

– 1973RobertKahn&Vint CerfinventTCP,nowpartoftheInternetProtocolSuite

• Internetgrowthrates– Exponentialsincestart!

TheInternet(1962)www.computerhistory.org/internet_history

www.greatachievements.org/?id=3736en.wikipedia.org/wiki/Internet_Protocol_Suite

“Lick”

Vint Cerf“Revolutions like this don't

come along very often”

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• “SystemofinterlinkedhypertextdocumentsontheInternet”

• History– 1945:Vannevar Bushdescribes

hypertextsystemcalled“memex” inarticle

– 1989:SirTimBerners-Leeproposedandimplemented thefirstsuccessfulcommunicationbetweenaHypertextTransferProtocol(HTTP)clientandserverusingtheinternet.

– ~2000Dot-comentrepreneursrushedin,2001bubbleburst

• Today:Accessanywhere!

TheWorldWideWeb(1989)en.wikipedia.org/wiki/History_of_the_World_Wide_Web

Tim Berners-LeeWorld’s First web

server in 1990

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Sharedvs.Switch-BasedNetworks

• Sharedvs.Switched:• Shared:1atatime(CSMA/CD)

• Switched: pairs(“point-to-point”connections)communicateatsametime

• Aggregatebandwidth(BW)inswitchednetworkismanytimesthatofshared:• point-to-pointfastersincenoarbitration,simplerinterface

Node Node Node

Shared

CrossbarSwitch

Node

Node

Node

Node

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Whatmakesnetworkswork?• Links connectingswitchesand/orrouters toeachotherandtocomputersordevices

Computer

networkinterface

switch

switch

switch

• Abilitytonamethecomponentsandtoroutepacketsofinformation- messages- fromasourcetoadestination

• Layering,redundancy,protocols,andencapsulationasmeansofabstraction(bigideainComputerArchitecture)

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SoftwareProtocoltoSendandReceive• SWSendsteps

1:ApplicationcopiesdatatoOSbuffer2:OScalculateschecksum,startstimer3:OSsendsdatatonetworkinterfaceHWandsaysstart

• SWReceivesteps3:OScopiesdatafromnetworkinterfaceHWtoOSbuffer2:OScalculateschecksum,ifOK,sendACK;ifnot,deletemessage (senderresendswhentimerexpires)

1:IfOK,OScopiesdatatouseraddressspace,&signalsapplicationtocontinue

Header Payload

Checksum

TrailerCMD/ Address /DataNet ID Net ID Len ACK

INFO

Dest Src

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Whatdoesittaketosendpacketsacrosstheglobe?• Bitsonwireorair• Packetsonwireorair• Deliverypacketswithinasinglephysicalnetwork

• Deliverpacketsacrossmultiplenetworks• Ensurethedestinationreceivedthedata• Createdataatthesenderandmakeuseofthedataatthereceiver

Protocols for Networks of Networks?

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Lotstodoandatmultiplelevels!

Useabstraction tocopewithcomplexityofcommunication

• Hierarchyoflayers:- Application(chatclient,game,etc.)

- Transport(TCP,UDP)- Network(IP)

- DataLinkLayer(Ethernet)

- PhysicalLink(copper,wireless,etc.)

ProtocolforNetworksofNetworks?

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ProtocolFamilyConcept• Protocol:packetstructureandcontrolcommandstomanagecommunication

• Protocolfamilies(suites):asetofcooperatingprotocolsthatimplementthenetworkstack

• Keytoprotocolfamilies isthatcommunicationoccurslogically atthesameleveloftheprotocol,calledpeer-to-peer…

…butisimplementedviaservicesatthenextlowerlevel

• Encapsulation:carryhigherlevelinformationwithinlowerlevel“envelope”

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Dear John,

Your days are numbered.

--Pat

Inspiration…

• CEO A writes letter to CEO B– Folds letter and hands it to assistant

• Assistant:– Puts letter in envelope with CEO B’s full name– Takes to FedEx

• FedEx Office– Puts letter in larger envelope– Puts name and street address on FedEx envelope– Puts package on FedEx delivery truck

• FedEx delivers to other company

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CEO

Aide

FedEx

CEO

Aide

FedExLocationFedex Envelope(FE)

The Path of the Letter

Letter

Envelope

SemanticContent

Identity

“Peers”oneachsideunderstandthesamethingsNooneelseneedsto

Lowestlevelhasmostpackaging

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ProtocolFamilyConcept

Message Message

TH Message TH Message TH TH

Actual Actual

Physical

Message TH Message THActual ActualLogical

Logical

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Eachlowerlevelofstack“encapsulates”informationfromlayerabovebyaddingheaderandtrailer.

MostPopularProtocolforNetworkofNetworks

• TransmissionControlProtocol/InternetProtocol(TCP/IP)

• ThisprotocolfamilyisthebasisoftheInternet,aWAN(wideareanetwork)protocol• IPmakesbestefforttodeliver

• Packetscanbelost,corrupted

• TCPguaranteesdelivery• TCP/IPsopopularitisusedevenwhencommunicatinglocally:evenacrosshomogeneousLAN(localareanetwork)

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Message

TCP/IPpacket,Ethernetpacket,protocols

• Applicationsendsmessage

TCP data

TCP HeaderIP Header

IP DataEH

Ethernet Hdr

Ethernet Hdr• TCPbreaksinto64KiBsegments,adds20Bheader

• IPadds20Bheader,sendstonetwork• IfEthernet,brokeninto1500Bpacketswithheaders,trailers

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“Andinconclusion…”• I/Ogivescomputerstheir5senses• I/Ospeedrangeis100-milliontoone• Pollingvs.Interrupts• DMAtoavoidwastingCPUtimeondatatransfers• Disksforpersistentstorage,replacedbyflash• Networks:computer-to-computerI/O

– Protocolsuitesallownetworkingofheterogeneouscomponents.Abstraction!!!

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