CPU 1 CPU 2 CPU n Interrupt Controller Main Memory FSB Controller BSB Controller Keyboard Mouse Console DMA Expandable Device Bus IRQ

CPU1

CPU2

CPUn

InterruptController

MainMemory

FSBController

BSBController

Keyboard

Mouse

Console

DMA

ExpandableDevice Bus

IRQ

IRQ

IRQ

Mentat Instruction (32 bits with variable addressing length)

Length (bits) 7 6 5 6 5 3

Usage opcode LReg LMode RReg RMode Unused

Explanation of opcodes.

Opcodes.xls

hlt = 0x00000000, // 0000 000mov = 0x02000000, // 0000 001add = 0x04000000, // 0000 010sub = 0x06000000, // 0000 011mul = 0x08000000, // 0000 100div = 0x0A000000, // 0000 101cmp = 0x0C000000, // 0000 110and = 0x0E000000, // 0000 111or = 0x10000000, // 0001 000xor = 0x12000000, // 0001 001not = 0x14000000, // 0001 010shl = 0x16000000, // 0001 011shr = 0x18000000, // 0001 100tss = 0x1A000000, // 0001 101swp = 0x1C000000, // 0001 110neg = 0x1E000000, // 0001 111jmp = 0x20000000, // 0010 000jeq = 0x22000000, // 0010 001jne = 0x24000000, // 0010 010jl = 0x26000000, // 0010 011jg = 0x28000000, // 0010 100jle = 0x2A000000, // 0010 101jge = 0x2C000000, // 0010 110cmjnz = 0x2E000000, // 0010 111nop = 0x30000000, // 0011 000jov = 0x32000000, // 0011 001ret = 0x34000000, // 0011 010prc = 0x36000000, // 0011 011int = 0x38000000, // 0011 100pow = 0x3A000000, // 0011 101push = 0x3C000000, // 0011 110pop = 0x3E000000, // 0011 111movb = 0x40000000, // 0100 000addb = 0x42000000, // 0100 001subb = 0x44000000, // 0100 010mulb = 0x46000000, // 0100 011divb = 0x48000000, // 0100 100

Opcodes

Simulator Instructions (stored in memory in little-endian order)

cmpb = 0x4A000000, // 0100 101andb = 0x4C000000, // 0100 110orb = 0x4E000000, // 0100 111xorb = 0x50000000, // 0101 000notb = 0x52000000, // 0101 001shlb = 0x54000000, // 0101 010shrb = 0x56000000, // 0101 011tssb = 0x58000000, // 0101 100swpb = 0x5A000000, // 0101 101negb = 0x5C000000, // 0101 110pushb = 0x5E000000, // 0101 111popb = 0x60000000, // 0110 000getb = 0x62000000, // 0110 001setf = 0x64000000, // 0110 010getf = 0x66000000, // 0110 011clrf = 0x68000000, // 0110 100loop = 0x6A000000, // 0110 101mcp = 0x6C000000, // 0110 110mcpb = 0x6E000000, // 0110 111cmjz = 0x70000000, // 0111 000prcx = 0x72000000, // 0111 001retx = 0x74000000, // 0111 010scp = 0x76000000, // 0111 011sscan = 0x78000000, // 0111 100scmp = 0x7A000000, // 0111 101fill = 0x7C000000, // 0111 110fillb = 0x7E000000, // 0111 111atoi = 0x80000000, // 1000 000atou = 0x82000000, // 1000 001facos = 0x84000000, // 1000 010fadd = 0x86000000, // 1000 011fasin = 0x88000000, // 1000 100fatan = 0x8A000000, // 1000 101fceil = 0x8C000000, // 1000 110fcos = 0x8E000000, // 1000 111fdiv = 0x90000000, // 1001 000

fexp = 0x92000000, // 1001 001ffloor = 0x94000000, // 1001 010flog = 0x96000000, // 1001 011flog10 = 0x98000000, // 1001 100fmul = 0x9A000000, // 1001 101fpow = 0x9C000000, // 1001 110fsin = 0x9E000000, // 1001 111fsqrt = 0xA0000000, // 1010 000fsub = 0xA2000000, // 1010 001ftan = 0xA4000000, // 1010 010ftoi = 0xA6000000, // 1010 011ftoa = 0xA8000000, // 1010 100itoa = 0xAA000000, // 1010 101itof = 0xAC000000, // 1010 110rmcp = 0xAE000000, // 1010 111rsany = 0xB0000000, // 1011 000rscp = 0xB2000000, // 1011 001rsscan = 0xB4000000, // 1011 010sany = 0xB6000000, // 1011 011atof = 0xB8000000, // 1011 100strlen = 0xBA000000, // 1011 101strstr = 0xBC000000, // 1011 110udiv = 0xBE000000, // 1011 111jinf = 0xC0000000, // 1100 000umul = 0xC2000000, // 1100 001jnan = 0xC4000000, // 1100 010utoa = 0xC6000000, // 1100 011frtod = 0xC8000000, // 1100 100fdtor = 0xCA000000, // 1100 101ftou = 0xCC000000, // 1100 110rmcpb = 0xCE000000, // 1100 111rstrstr= 0xD0000000, // 1101 000save = 0xD2000000, // 1101 001rest = 0xD4000000, // 1101 010savea = 0xD6000000, // 1101 011resta = 0xD8000000, // 1101 100

Simulator Instructions (stored in memory in big-endian order)

Left Registers

r0 = 0x00000000, // xxxx xxx0 0000 0r1 = 0x00080000, // xxxx xxx0 0000 1r2 = 0x00100000, // xxxx xxx0 0001 0r3 = 0x00180000, // xxxx xxx0 0001 1r4 = 0x00200000, // xxxx xxx0 0010 0r5 = 0x00280000, // xxxx xxx0 0010 1r6 = 0x00300000, // xxxx xxx0 0011 0r7 = 0x00380000, // xxxx xxx0 0011 1r8 = 0x00400000, // xxxx xxx0 0100 0r9 = 0x00480000, // xxxx xxx0 0100 1r10 = 0x00500000, // xxxx xxx0 0101 0r11 = 0x00580000, // xxxx xxx0 0101 1r12 = 0x00600000, // xxxx xxx0 0110 0r13 = 0x00680000, // xxxx xxx0 0110 1r14 = 0x00700000, // xxxx xxx0 0111 0r15 = 0x00780000, // xxxx xxx0 0111 1r16 = 0x00800000, // xxxx xxx0 1000 0r17 = 0x00880000, // xxxx xxx0 1000 1r18 = 0x00900000, // xxxx xxx0 1001 0r19 = 0x00980000, // xxxx xxx0 1001 1r20 = 0x00A00000, // xxxx xxx0 1010 0r21 = 0x00A80000, // xxxx xxx0 1010 1r22 = 0x00B00000, // xxxx xxx0 1011 0r23 = 0x00B80000, // xxxx xxx0 1011 1r24 = 0x00C00000, // xxxx xxx0 1100 0r25 = 0x00C80000, // xxxx xxx0 1100 1r26 = 0x00D00000, // xxxx xxx0 1101 0r27 = 0x00D80000, // xxxx xxx0 1101 1r28 = 0x00E00000, // xxxx xxx0 1110 0r29 = 0x00E80000, // xxxx xxx0 1110 1r30 = 0x00F00000, // xxxx xxx0 1111 0r31 = 0x00F80000, // xxxx xxx0 1111 1

r32 = 0x01000000, // xxxx xxx1 0000 0r33 = 0x01080000, // xxxx xxx1 0000 1r34 = 0x01100000, // xxxx xxx1 0001 0r35 = 0x01180000, // xxxx xxx1 0001 1r36 = 0x01200000, // xxxx xxx1 0010 0r37 = 0x01280000, // xxxx xxx1 0010 1r38 = 0x01300000, // xxxx xxx1 0011 0r39 = 0x01380000, // xxxx xxx1 0011 1r40 = 0x01400000, // xxxx xxx1 0100 0r41 = 0x01480000, // xxxx xxx1 0100 1r42 = 0x01500000, // xxxx xxx1 0101 0r43 = 0x01580000, // xxxx xxx1 0101 1r44 = 0x01600000, // xxxx xxx1 0110 0r45 = 0x01680000, // xxxx xxx1 0110 1r46 = 0x01700000, // xxxx xxx1 0111 0r47 = 0x01780000, // xxxx xxx1 0111 1r48 = 0x01800000, // xxxx xxx1 1000 0r49 = 0x01880000, // xxxx xxx1 1000 1r50 = 0x01900000, // xxxx xxx1 1001 0OSLimit = 0x01980000, // xxxx xxx1 1001 1(osl)*memBase = 0x01A00000, // xxxx xxx1 1010 0(mbs)*memLimit = 0x01A80000, // xxxx xxx1 1010 1(mlmt)*heapPointer = 0x01B00000, // xxxx xxx1 1011 0(hp)*programCounter = 0x01B80000, // xxxx xxx1 1011 1(pc)auxiliary = 0x01C00000, // xxxx xxx1 1100 0(aux)interrupt = 0x01C80000, // xxxx xxx1 1100 1(int)interruptMask = 0x01D00000, // xxxx xxx1 1101 0(msk)stackPointer = 0x01D80000, // xxxx xxx1 1101 1(sp)basePointer = 0x01E00000, // xxxx xxx1 1110 0(bp)pageTableAddr = 0x01E80000, // xxxx xxx1 1110 1(pta) *counter = 0x01F00000, // xxxx xxx1 1111 0(ctr)flags = 0x01F80000, // xxxx xxx1 1111 1(flg)

* Requires supervisor bit set to write

Left Addressing Modes

Unused = 0x00000000, // xxxx xxxx xxxx x000 00RegisterDirect = 0x00000000, // xxxx xxxx xxxx x000 01 r1RegisterIndirect = 0x00020000, // xxxx xxxx xxxx x000 10 [r1]RegisterIndirectPostIncrement = 0x00040000, // xxxx xxxx xxxx x000 11 [r1+]RegisterIndirectPostDecrement = 0x00060000, // xxxx xxxx xxxx x001 00 [r1-]RegisterIndirectPreIncrement = 0x00080000, // xxxx xxxx xxxx x001 01 [+r1]RegisterIndirectPreDecrement = 0x000A0000, // xxxx xxxx xxxx x001 10 [-r1]RegisterIndirectOffset = 0x000C0000, // xxxx xxxx xxxx x001 11 [r1+4]RegisterIndirectPlusRegister = 0x000E0000, // xxxx xxxx xxxx x010 00 [r1+r2]MemoryDirect = 0x00100000, // xxxx xxxx xxxx x010 01 [r1-r2]MemoryIndirect = 0x00120000, // xxxx xxxx xxxx x010 10 [Addr]MemoryIndirectPostIncrement = 0x00140000, // xxxx xxxx xxxx x010 11 #[Addr+]MemoryIndirectPostDecrement = 0x00160000, // xxxx xxxx xxxx x011 00 #[Addr-]MemoryIndirectPreIncrement = 0x00180000, // xxxx xxxx xxxx x011 01 #[+Addr]MemoryIndirectPreDecrement = 0x001A0000, // xxxx xxxx xxxx x011 10 #[-Addr]MemoryIndirectPlusRegister = 0x001C0000, // xxxx xxxx xxxx x011 11 #[Addr]


Right Registers

r0 = 0x00000000, // xxxx xxxx xxxx xxxx xx00 0000r1 = 0x00000100, // xxxx xxxx xxxx xxxx xx00 0001r2 = 0x00000200, // xxxx xxxx xxxx xxxx xx00 0010r3 = 0x00000300, // xxxx xxxx xxxx xxxx xx00 0011r4 = 0x00000400, // xxxx xxxx xxxx xxxx xx00 0100r5 = 0x00000500, // xxxx xxxx xxxx xxxx xx00 0101r6 = 0x00000600, // xxxx xxxx xxxx xxxx xx00 0110r7 = 0x00000700, // xxxx xxxx xxxx xxxx xx00 0111r8 = 0x00000800, // xxxx xxxx xxxx xxxx xx00 1000r9 = 0x00000900, // xxxx xxxx xxxx xxxx xx00 1001r10 = 0x00000A00, // xxxx xxxx xxxx xxxx xx00 1010r11 = 0x00000B00, // xxxx xxxx xxxx xxxx xx00 1011r12 = 0x00000C00, // xxxx xxxx xxxx xxxx xx00 1100r13 = 0x00000D00, // xxxx xxxx xxxx xxxx xx00 1101r14 = 0x00000E00, // xxxx xxxx xxxx xxxx xx00 1110r15 = 0x00000F00, // xxxx xxxx xxxx xxxx xx00 1111r16 = 0x00001000, // xxxx xxxx xxxx xxxx xx01 0000r17 = 0x00001100, // xxxx xxxx xxxx xxxx xx01 0001r18 = 0x00001200, // xxxx xxxx xxxx xxxx xx01 0010r19 = 0x00001300, // xxxx xxxx xxxx xxxx xx01 0011r20 = 0x00001400, // xxxx xxxx xxxx xxxx xx01 0100r21 = 0x00001500, // xxxx xxxx xxxx xxxx xx01 0101r22 = 0x00001600, // xxxx xxxx xxxx xxxx xx01 0110r23 = 0x00001700, // xxxx xxxx xxxx xxxx xx01 0111r24 = 0x00001800, // xxxx xxxx xxxx xxxx xx01 1000r25 = 0x00001900, // xxxx xxxx xxxx xxxx xx01 1001r26 = 0x00001A00, // xxxx xxxx xxxx xxxx xx01 1010r27 = 0x00001B00, // xxxx xxxx xxxx xxxx xx01 1011r28 = 0x00001C00, // xxxx xxxx xxxx xxxx xx01 1100r29 = 0x00001D00, // xxxx xxxx xxxx xxxx xx01 1101r30 = 0x00001E00, // xxxx xxxx xxxx xxxx xx01 1110r31 = 0x00001F00, // xxxx xxxx xxxx xxxx xx01 1111


r32 = 0x00002000, // xxxx xxxx xxxx xxxx xx10 0000r33 = 0x00002100, // xxxx xxxx xxxx xxxx xx10 0001r34 = 0x00002200, // xxxx xxxx xxxx xxxx xx10 0010r35 = 0x00002300, // xxxx xxxx xxxx xxxx xx10 0011r36 = 0x00002400, // xxxx xxxx xxxx xxxx xx10 0100r37 = 0x00002500, // xxxx xxxx xxxx xxxx xx10 0101r38 = 0x00002600, // xxxx xxxx xxxx xxxx xx10 0110r39 = 0x00002700, // xxxx xxxx xxxx xxxx xx10 0111r40 = 0x00002800, // xxxx xxxx xxxx xxxx xx10 1000r41 = 0x00002900, // xxxx xxxx xxxx xxxx xx10 1001r42 = 0x00002A00, // xxxx xxxx xxxx xxxx xx10 1010r43 = 0x00002B00, // xxxx xxxx xxxx xxxx xx10 1011r44 = 0x00002C00, // xxxx xxxx xxxx xxxx xx10 1100r45 = 0x00002D00, // xxxx xxxx xxxx xxxx xx10 1101r46 = 0x00002E00, // xxxx xxxx xxxx xxxx xx10 1110r47 = 0x00002F00, // xxxx xxxx xxxx xxxx xx10 1111r48 = 0x00003000, // xxxx xxxx xxxx xxxx xx11 0000r49 = 0x00003100, // xxxx xxxx xxxx xxxx xx11 0001r50 = 0x00003200, // xxxx xxxx xxxx xxxx xx11 0010OSLimit = 0x00003300, // xxxx xxxx xxxx xxxx xx11 0011(osl)*memBase = 0x00003400, // xxxx xxxx xxxx xxxx xx11 0100(mbs)*memLimit = 0x00003500, // xxxx xxxx xxxx xxxx xx11 0101(mlmt)*heapPointer = 0x00003600, // xxxx xxxx xxxx xxxx xx11 0110(hp)*programCounter = 0x00003700, // xxxx xxxx xxxx xxxx xx11 0111(pc)auxiliary = 0x00003800, // xxxx xxxx xxxx xxxx xx11 1000(aux)interrupt = 0x00003900, // xxxx xxxx xxxx xxxx xx11 1001(int)interruptMask = 0x00003A00, // xxxx xxxx xxxx xxxx xx11 1010(msk)stackPointer = 0x00003B00, // xxxx xxxx xxxx xxxx xx11 1011(sp)basePointer = 0x00003C00, // xxxx xxxx xxxx xxxx xx11 1100(bp)pageTableAddr = 0x00003D00, // xxxx xxxx xxxx xxxx xx11 1101(pta)*counter = 0x00003E00, // xxxx xxxx xxxx xxxx xx11 1110(ctr)flags = 0x00003F00, // xxxx xxxx xxxx xxxx xx11 1111(flg)

* Requires supervisor bit set to write

Right Addressing Modes

Immediate = 0x00000000, // xxxx xxxx xxxx xxxx xxxx xxxx 0000 0 AddrRegisterDirect = 0x00000080, // xxxx xxxx xxxx xxxx xxxx xxxx 0000 1 r1RegisterIndirect = 0x00000100, // xxxx xxxx xxxx xxxx xxxx xxxx 0001 0 [r1]RegisterIndirectPostIncrement = 0x00000180, // xxxx xxxx xxxx xxxx xxxx xxxx 0001 1 [r1+]RegisterIndirectPostDecrement = 0x00000200, // xxxx xxxx xxxx xxxx xxxx xxxx 0010 0 [r1-]RegisterIndirectPreIncrement = 0x00000280, // xxxx xxxx xxxx xxxx xxxx xxxx 0010 1 [+r1]RegisterIndirectPreDecrement = 0x00000300, // xxxx xxxx xxxx xxxx xxxx xxxx 0011 0 [-r1]RegisterIndirectOffset = 0x00000380, // xxxx xxxx xxxx xxxx xxxx xxxx 0011 1 [r1+4]RegisterIndirectPlusRegister = 0x00000400, // xxxx xxxx xxxx xxxx xxxx xxxx 0100 0 [r1+r2]MemoryDirect = 0x00000480, // xxxx xxxx xxxx xxxx xxxx xxxx 0100 1 [r1-r2]MemoryIndirect = 0x00000500, // xxxx xxxx xxxx xxxx xxxx xxxx 0101 0 [Addr]MemoryIndirectPostIncrement = 0x00000580, // xxxx xxxx xxxx xxxx xxxx xxxx 0101 1 #[Addr+]MemoryIndirectPostDecrement = 0x00000600, // xxxx xxxx xxxx xxxx xxxx xxxx 0110 0 #[Addr-]MemoryIndirectPreIncrement = 0x00000680, // xxxx xxxx xxxx xxxx xxxx xxxx 0110 1 #[+Addr]MemoryIndirectPreDecrement = 0x00000700, // xxxx xxxx xxxx xxxx xxxx xxxx 0111 0 #[-Addr]MemoryIndirectPlusRegister = 0x00000780, // xxxx xxxx xxxx xxxx xxxx xxxx 0111 1 #[Addr]


Flags

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

zero

carry

overflo

w

sign

trap

mask in

terrup

ts

sup

ervisor

check h

eap vs stack

pag

ing

on

pag

ing

256 (no

t 4096)

pag

ing

level

pag

ing

level

Invalid

Nu

mb

er

Infin

ity

Documents

CPU 1 CPU 2 CPU n Interrupt Controller Main Memory FSB Controller BSB Controller Keyboard Mouse Console DMA Expandable Device Bus IRQ