COSMOS Summer 2008 Peripheral Interfaces

©2008 R. Gupta, UCSD

COSMOS Summer 2008

Peripheral Interfaces

Rajesh K. Gupta

Computer Science and Engineering

University of California, San Diego.

Roadmap

• Topic:– Computer interfaces: electricals, signaling, protocols

• This lecture– Concepts covered: Input/Output, Addressing,

Synchronous, Asynchronous, Access Arbitration, Protocols, Packets, Messaging

• Next lecture– The USB Interface

• Reference– None


Keywords:BidirectionalAddress spaceAddress decodingMulti-masterWired ANDI2C, Master/Slave

A Processor’s Interfaces

• Two basic types– Communicate ‘via’ memory

– Communicate directly

• How do we measure goodness of an interface?– Maximum data-rate of transfer? Bits or bytes per

second?


Peripheral Interfaces

• Two ‘low cost’ interfaces– SPI: Serial Peripheral Interface (4-wire)

– I2C: Inter-Integrated Circuit (2-wire)

• A microcontroller can control a network of devices with just two general-purpose IO pins and software.

• Let us examine I2C– Used for: reading from DAC, ADC, changing monitor settings,

sound volume control to intelligent speakers, controlling LCD displays, reading diagnostic sensors, reading real-time clocks, turning on/off power supply for components…

• Many USB-to-I2C adapters to enable their use in PCs.


I2C• Connects multiple devices on a multi-drop bus

– “Multi-master”

– Bidirectional, low-speed, synchronous to a common clock

• Devices can be attached or detached without affecting other devices– 7-bit address space, 16 reserved, 112 nodes maximum

– Distances up to a few meters (400 picoFarad max)

• Standard: 100 kbps (can go down to DC)– Low speed: 10 kbps, Fast: 400 kbps, FM+ 1 Mbps, HS 3.4

Mbps


I2C Wires

• Two Wires, bidirectional wires– SDA: Serial Data

– SCL: Serial Clock

• ‘Open drain’: normally high when not in use– MASTER node issues the SCL and addresses SLAVES

– SLAVE node receives the SCL and the address

– “Wired AND” logical function.

• Four modes for a given device: – Master TX, Master RX, Slave TX, Slave RX


So, how do we write or read?• Normally, both SDA and SCL are ‘high’

– “sense” before you drive a line

• A device that wants to write pulls SDA low– Followed by SCL going low

• So, everyone else knows that a transmission is starting


START, Data, Data,…,Data, STOP!

Putting it together

• Start Condition: With SCL low, SDA goes HL

• Bits are ‘sampled’ on the rising edge of SCL

• Stop Condition: With SCL high, SDA goes LH


“START”, “BIT” & “STOP”

• Start Condition: With SCL low, SDA goes HL

• Bits are ‘sampled’ on the rising edge of SCL

• Stop Condition: With SCL high, SDA goes LH


QUIZ

• Question 1: What is on SDA when it makes a transition with SCL low?

• Question 2: What is on SDA when it makes a transition with SCL high?

• Question 3: What happens if Slave is not ready to receive next BIT?

“The Protocol”

• Any number of bytes in an I2C packet– MSB first, each bytes transmitted must be

acknowledged by the receiver

– After each 8th bit, MASTER releases SDA and then generates an additional clock pulse on SCL

• Receiver can then acknowledge by pulling SDA low

• Receiver can always abort the transmission by holding SCL low– Can not go up by the MASTER, thus no bit sampling

edge


Bi-directional Data Transfers

“The Protocol”

• Master sends START – followed by 7-bit address of the Slave

• followed by single bit representing write to (0) or read from (1) the slave.

• Slave responds with ACK bit for that address– Master then continues in either TX or RX mode

• Communication transfer follows.

• All other MASTERS monitor START and STOP bits.


Note the direction of signaling

Multi-Master = Conflicts?

• More than one Master may attempt to START at the same time

• Signaling provides ability to prioritize and exclude


Conflicts and Tricks

• When a node is transmitting ‘1’ and another transmits a ‘0’– First node can sense something is wrong…since data

node is not default high

• Slave can do this on SCL to ‘stretch the clock’– Or slow down the master

• Master can do this on the SDA to ‘get control’ (arbitration)


More on Conflicts

• What happens if two masters are sending a message to two different slaves?

• Master sending to the lower slave address always ‘wins’ arbitration


Types of Messages on I2C

• Single message where a Master writes to a Slave

• Single message where a Master reads from a Slave

• Combined messages where a Master issues at least two reads and/or writes to one or more slaves– Each RD or WR begins with START and the slave address

– A Repeat START is not preceded by STOP

• Slaves figure out that data following repeat START is part of the same message.


What do messages mean?

• “Message Semantics”

• Most commonly request/response control model– Bytes following a Write command are either a

command or address


Role of Software in I2C

• SDA and SCL lines can be controlled by simple subroutines.

• Example:– I2Start:

• check if SCL is high;

• wait a few micro seconds;

• Transition SDA H to L;

• wait a few micro seconds;


EXAMPLE: Memory connection


What are the limitations of I2C?• Small address space

• Speed?– I2C implemented in Software may not even support

100 kbps?

– *All* devices must at least partially support the highest speed used or they may detect spurious addresses

• Clock stretching affects everyone.


Exercise

• Is I2C communication synchronous or asynchronous?– But START and STOP delimit data packets?

• Is I2C duplex? Fully duplex?

• Draw SDA and SCL waveforms in case of transmission of START followed by $A2 = (1010 0010)




Recap

• Computers interfaces with devices via memory or via direct ports

• I2C defines a 2-pin interface that– Performs Master-Slave communications

• The interface defines electrical behavior (signaling)– And the data transfer protocols (messaging)

– What about the mechanicals?

• Next: USB interface.

Documents

COSMOS Summer 2008 Peripheral Interfaces