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James Harland [email protected]. COSC1078 Introduction to Information Technology Lecture 12 Machine Processing. Introduction. James Harland Email: [email protected] URL: www.cs.rmit.edu.au/~jah Phone: 9925 2045 Office: 14.10.1 Consultation: Mon 4.30-5.30, - PowerPoint PPT Presentation
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Lecture 12: Machine Processing Intro to IT
COSC1078 Introduction to Information Technology
Lecture 12
Machine ProcessingJames Harland
Lecture 12: Machine Processing Intro to IT
Introduction
James Harland• Email: [email protected]• URL: www.cs.rmit.edu.au/~jah• Phone: 9925 2045• Office: 14.10.1 • Consultation: Mon 4.30-5.30, • Thu 11.30-12.30What colour is my office
door? Carpet? Chair?
Lecture 12: Machine Processing Intro to IT
Introduction to IT1 Introduction 2 Images3 Audio4 Video WebLearnTest 1 5 Binary Representation Assignment 16 Data Storage7 Machine Processing8 Operating Systems WebLearn Test 29 Processes Assignment 210 Internet11 Internet Security WebLearn Test 312 Future of IT Assignment 3, Peer and Self Assessment
Lecture 12: Machine Processing Intro to IT
Overview Questions?
Assignments 1 & 2
Machine Processing
Questions?
Lecture 12: Machine Processing Intro to IT
Assignments 1& 2
Assignment 1 Currently being marked Will have marks out next week
Assignment 2 Specification has been published Must be done in groups of 2 or 3 Can change groups from Assignment 1 (if you wish) Must have a blog on Blackboard
Lecture 12: Machine Processing Intro to IT
What do computers do? Compute!
Input/Output
Processing
Memory
Lecture 12: Machine Processing Intro to IT
Moore’s Law“Processor speed doubles about every 18 months” -- Gordon Moore, Intel co-founder, 1965
Intended for period 1965-1975
Held true ever since 1965!
Must end sometime …
Lecture 12: Machine Processing Intro to IT
Moore’s Law
Lecture 12: Machine Processing Intro to IT
Moore’s Law
Lecture 12: Machine Processing Intro to IT
Memory Memory differs in performance and cost Processor is typically much faster than memory
Lecture 12: Machine Processing Intro to IT
Memory Arranged as a hierarchy of cache
Level 1
Level 2
Level 3
Main Memory
Lecture 12: Machine Processing Intro to IT
Processing
ALU
CPUBUSREGISTERS
MEMORY
Lecture 12: Machine Processing Intro to IT
Machine Instructions
1. Move first value from memory into register 12. Move second value from memory into
register 23. If register 2 is zero, go to Step 64. Divide register 1 by register 2 & store result
in register 35. Store register 3 value in memory6. Stop
“Divide two numbers”
Lecture 12: Machine Processing Intro to IT
Machine Instructions
1. LOAD register 1 from memory2. LOAD register 2 from memory3. JUMP to Step 6 if register 2 is zero4. Divide register 1 by register 2 and store
result in register 35. STORE register 3 value in memory6. Stop
Lecture 12: Machine Processing Intro to IT
Instructions in Binary?01010100001010101010100110100010101001101001010010100011100010101010100101111001001010…
LOAD register 1LOAD register 2JUMP ….STORE ….
1010110010110011000100100011001100111111
MEMORY
Lecture 12: Machine Processing Intro to IT
One Scheme
16-bit operation codes (simple example)
Operation Code(4 bits)
Operand (12 bits)
Represent as 4 Hexadecimal numbers (0-9,A-F)Each instruction is two bytes long
Lecture 12: Machine Processing Intro to IT
One Scheme
156C LOAD register 5 from memory 6C166D LOAD register 6 from memory 6D5056 ADD register 5 & 6 & store in register 0306E STORE register 0 to memory 6EC000 HALT....(up to 216 = 65,536 different instructions)
Lecture 12: Machine Processing Intro to IT
Fetch Decode Execute
FETCH
EXECUTE DECODEMachinecycle
Lecture 12: Machine Processing Intro to IT
Two special registers
Instruction register: holds current instructionProgram counter: address of next instruction
Fetch: Put instruction specified by program counter into instruction registerIncrement program counter by two
Decode: Work out what to do
Execute: Perform the instruction
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A0Address Contents
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A0FETCH
156C
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A2FETCH
156C
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A2DECODE
156C
6C 2B
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A2 EXEC
156C
6C 2B
2B5
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A2 FETCH
166D
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A4 FETCH
166D
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A4 DECODE166D
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A4 EXEC
166D
6D FF
FF6
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
A6 FETCH
5056
Lecture 12: Machine Processing Intro to IT
Processing
A0 15A1 6CA2 16A3 6DA4 50A5 56A6 30A7 C0A8 C0A9 00
Program Counter
InstructionRegister
…
Lecture 12: Machine Processing Intro to IT
Processing
Program Counter
InstructionRegister
EXEC
B258
B4
Lecture 12: Machine Processing Intro to IT
Processing
Program Counter
InstructionRegister
EXEC
B258
58
Lecture 11: Machine Processing Intro to IT
Processing Jump instructions change program counter
Can load any memory address into program counter (!!!)
Often use pipelining for efficiency Fetch next instruction while executing Processor doesn’t wait for fetch to complete
Can do more than one instruction …
Lecture 12: Machine Processing Intro to IT
Connecting devices
??
Lecture 12: Machine Processing Intro to IT
Universal Serial Bus (USB)
Lecture 12: Machine Processing Intro to IT
Memory-mapped I/O
Program Counter
InstructionRegister
C4 EXEC
3634
34 FF
FF6
Just like writing to a memory address
Lecture 12: Machine Processing Intro to IT
Direct Memory Access (DMA)
Put some data in memory!
OK
Lecture 12: Machine Processing Intro to IT
Direct Memory Access
Direct Memory Access means that
doesn’t have to wait for the
Lecture 12: Machine Processing Intro to IT
What are these?
Firewirebottleneck bandwidt
hhandshake
Parallel port Serial port
Lecture 12: Machine Processing Intro to IT
Busy Bertie the bus …
Von Neumann bottleneck
Lecture 12: Machine Processing Intro to IT
Conclusion
Work on Assignment 2
Finish reading book!