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Department of Science and Technology Institutionen för teknik och naturvetenskap Linköping University Linköpings universitet g n i p ö k r r o N 4 7 1 0 6 n e d e w S , g n i p ö k r r o N 4 7 1 0 6 - E S LiU-ITN-TEK-A--19/051--SE Construction of RF-link budget template for transceiver modelling David Frykskog Hjalmar Jonsson 2019-10-07

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Page 1: Construction of RF-link budget template for transceiver

Department of Science and Technology Institutionen för teknik och naturvetenskap Linköping University Linköpings universitet

gnipökrroN 47 106 nedewS ,gnipökrroN 47 106-ES

LiU-ITN-TEK-A--19/051--SE

Construction of RF-link budgettemplate for transceiver

modellingDavid Frykskog

Hjalmar Jonsson

2019-10-07

Page 2: Construction of RF-link budget template for transceiver

LiU-ITN-TEK-A--19/051--SE

Construction of RF-link budgettemplate for transceiver

modellingExamensarbete utfört i Elektroteknik

vid Tekniska högskolan vidLinköpings universitet

David FrykskogHjalmar Jonsson

Handledare Anna LombardiExaminator Adriana Serban

Norrköping 2019-10-07

Page 3: Construction of RF-link budget template for transceiver

Upphovsrätt

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För ytterligare information om Linköping University Electronic Press seförlagets hemsida http://www.ep.liu.se/

Copyright

The publishers will keep this document online on the Internet - or its possiblereplacement - for a considerable time from the date of publication barringexceptional circumstances.

The online availability of the document implies a permanent permission foranyone to read, to download, to print out single copies for your own use and touse it unchanged for any non-commercial research and educational purpose.Subsequent transfers of copyright cannot revoke this permission. All other usesof the document are conditional on the consent of the copyright owner. Thepublisher has taken technical and administrative measures to assure authenticity,security and accessibility.

According to intellectual property law the author has the right to bementioned when his/her work is accessed as described above and to be protectedagainst infringement.

For additional information about the Linköping University Electronic Pressand its procedures for publication and for assurance of document integrity,please refer to its WWW home page: http://www.ep.liu.se/

© David Frykskog, Hjalmar Jonsson

Page 4: Construction of RF-link budget template for transceiver

Abstract

This report presents the development of a simulation platform for radio receiver sys-

tem design. The simulation platform is implemented in the AWR VSS environment. The

report goes through the underlying theory of radio receivers and the methodology of im-

plementing the receiver and receiver impairments in the simulation platform. The purpose

of the project is to evaluate the AWR VSS environment for developing a simulation plat-

form for RF budget analysis and to take advantage of built in functionality as well as its

graphical interface. The project results in two simulation platform templates for receivers

that uses different simulation types. It is demonstrated that these simulation platforms

can have much of the specified requirements implemented. Some of the listed functional-

ity requirements turns out difficult or impractical to implement however. It is concluded

that VSS can be used for developing simulation platforms with the specified requirements.

Some of the functionality that is not natively supported by the software is implemented

using calculations post simulation and VBA scripting. These methods are proposed as a

solution for adding functions to the template in future work.

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Page 6: Construction of RF-link budget template for transceiver

Acknowledgments

This work would not be possible if not for the great support and guidance of our supervisorsat Ericsson. With the help and expertise of our main supervisor, Peter Pääkkönen, our workwas made substantially easier and the quality of the results would not be the same withouthim. We would also give out thanks to the head of our team at the analog design depart-ment, Jörgen Johansson, for pitching the idea of the master thesis and for helping us gettingstarted with our work. We have been fortunate to have great support from many people atEricsson, who has lent their time and knowledge to make sure we got all the help we neededto complete the work.

We have also had great support from our supervisors at Linköping University who hasmanaged the administrative tasks and helped the work flow smoothly as well as made surethe project did not get out of hand.

Finally we would like to extend our gratitude to our families who has supported ourefforts in all the ways possible. Thanks to their unrelenting support, we have managed tofinish our electrical engineering education and this master thesis project.

ii

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Page 8: Construction of RF-link budget template for transceiver

Contents

Abstract i

Acknowledgments ii

Contents iii

1 Introduction 1

1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Aim . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.3 Research questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.4 Delimitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.5 State of the art . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Theory 5

2.1 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.2 Non linearity in RF devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.3 Selectivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.4 Degradation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.5 Analog circuits in RF receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.6 Process variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.7 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.8 I/Q Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.9 Receiver architectures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142.10 Digital Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3 Development 20

3.1 NI AWR Design Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.2 Receiver impairments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.3 Receiver model implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.4 Simulation platforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

4 Results 34

4.1 Simulation platform results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344.2 Budget simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394.3 Time domain simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5 Discussion 49

5.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.2 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.3 Improvements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

6 Conclusion 53

iii

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Bibliography 55

iv

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Nomenclature

In order of appearance

RF Radio Frequency FIR Finite Impulse ResponseRX Receiver/Receiving system IIR Infinite Impulse ResponseNI National Instruments EDA Electronic Design Automation

AWR Applied Wave Research EM ElectromagneticVSS Visual System Simulations API Application Programming InterfaceLNA Low Noise Amplifier ADS Advanced Design SystemsPA Power Amplifier BER Bit Error RateIP3 3:rd order Interception Point SNR Signal to Noise RationNF Noise Figure PID Product, Integrator, Derivative

P1dB Compression Point RMS Root Mean SquareHDx x:th Harmonic Distortion DUT Device Under TestLO Local OscillatorPLL Phase Locked LoopADC Analog to Digital Converter

IM[N] Nth Intermodulation productAGC Automatic Gain ControlRFFE Radio Frequency Front EndDSP Digital Signal ProcessingVGA Variable Gain AmplifierPGA Programmable Gain AmplifierLPF Low Pass FilterBPF Band Pass FilterBSF Band Stop FilterHPF High Pass Filter

IL Insertion LossDC Zero Hz Frequency ComponentIC Integrated Circuit

AM Amplitude ModulationFM Frequency ModulationPM Phase ModulationASK Amplitude Shift KeyingFSK Frequency Shift KeyingPSK Phase Shift Keying

QPSK Quadrature Phase Shift KeyingQAM Quadrature Amplitude Modulation

IF Intermediate FrequencySDR Software Defined RadioDFT Discrete Fourier Transform

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1 Introduction

Ericsson is a company which mainly focuses on the development of Radio Infrastructure forcellular, wireless connectivity. Their mobile solutions are installed all over the world in allenvironments and conditions. This requires high tolerances, high precision engineering andtherefor high precision tools in the design phase. The push towards a more mobile societywith 5G connectivity on the horizon calls for these tools to be more complex, precise andcomprehensive than ever before.

1.1 Motivation

Current simulation platforms and tools used for transceiver link budget simulations in RFdesign at Ericsson are often Matlab or Microsoft Excel based. These custom tools are ver-satile and detailed, but complex and thus they require knowledge and competence in boththese tools, and in specific transceiver systems. In the hands of an expert with knowledge intransceiver systems and the tools themselves, the tools are efficient. However for a person inthe field with less experience in either area, the threshold to start using these tools is high.

The companies developing software for electronic design are with every edition of re-leases including more advanced solutions in their system simulation tools. This, along witha relatively low entry bar and a visual interface, makes for an intuitive and efficient workinterface for system simulation. In addition, the system simulation tools can already includebuilt in functionality similar to that of the tools in Matlab and Microsoft Excel. One majordrawback of these software tools is that they might not include options and possibilities ofcustomization for specific needs, such as specific impairments and functionalities. However,with the release of simulation tools such as Applied Wave Research (AWR) system Simu-lation tool Visual System Simulations (VSS), these customization options have however beenimproved upon.

For engineers, ease of use, versatility and improved customization makes VSS competitivetowards existing link budget simulation tools made in Matlab and Microsoft Excel.

1

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1.2. Aim

1.2 Aim

The project aims to implement an RF link budget model in AWR VSS environment. Specifi-cally the RX and TX chains of a homodyne transceiver should be modelled for budget analysispurposes. The work includes analog and digital transceiver from antenna to the digital inter-face, but not any further. In comparison to present link budget tools in Matlab and MicrosoftExcel, the tool should include frequency spectrum at each component (block) in VSS and RFbudget parameters such as gain, noise figure and compression point.

In addition, the work aims to clarify the drawbacks of the present tools in Matlab and Mi-crosoft Excel regarding ease of use. The link budget tool in VSS should address these issues.As mentioned in Section 1.1, the tool should be targeted towards users, i.e., RF engineers notworking with the present, more complex tools on a daily basis.

Functionality and parameters

The link budget tool should include the following functionality with associated parameters:

Analog blocks

Analog blocks include analog filters, amplifiers (LNA, PA), attenuators (including cablelosses), mixers and passive components. They have a lot of different properties and parame-ters to be taken into account when making accurate models.

• Gain

• Noise Figure

• IP3

• P1dB

• HDx

IQ modulator and demodulator

• Spurious response

• IQ-imbalance

• LO leakage

• PLL including reference clock

• DC offset

• Reciprocal mixing

• LO phase noise

ADC

• Sampling rate

• Aliasing

• Jitter

2

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1.3. Research questions

Filters, channel filters

• Rejection

• Decimation

Blockers and interfering signals

• Blocking

• IM blocking

Other functionality

• Automatic Gain Control (AGC)

• Gain calibration

Optional functionality

If the scope of the project allows for further modelling, the following proposals are to beinvestigated:

Statistical simulation

• Yield analysis

Digital blocks

• Channel filtering

• Ripple estimation and handling

1.3 Research questions

The simulation platform will be implemented in the VSS environment in AWR. When con-verting functionality and adding new ones to a new platform, the natural question to ask iswhat functionality can be implemented and what compromises have to be made in order tohave these functions work in the new environment. The research questions that this projectaims to answer are:

• What functionalities and parameters can be implemented in VSS using built in func-tionality and what have to be implemented using ad hoc means?

• What compromises needs to be made when implementing the different functionalities?

1.4 Delimitation

The scope of the project is limited to existing radio links. It aims to include functions alreadyin use in excel-based budget tools with addition of VSS functionality such as time-domain.Contrasting the existing Excel-based link budget, the VSS tool will remain on system-levelcomplexity.

The tool aims to be practical in the sense that user experience should be prioritized overcomplexity and customization. In a scientific sense, this feature is hard to define and to mea-sure. An example of a so called "practical" aspect of the tool could be simulation time. Thislimits the project to certain design choices based on this philosophy. If a model is consideredaccurate but slow, it might be discarded.

3

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1.5. State of the art

While VSS includes functionality to implement many of the listed requirements of thetool, it might not include others in the sense that they are either considered "impractical" ordo not exist. An example of an impracticality is long simulation times. The limitations willbe considered at the end of the project for evaluating VSS as a software for RF system levelsimulations and for implementing budget-like tools.

1.5 State of the art

Developing radio receivers and transmitters while optimizing all relevant circuit and systemparameters is often pushing the limits of what is possible. High frequency transceivers aresome of the most complex systems widley in use in the world today and require extremeprecision in all steps of development.

Since the complexity and performance of radio systems increase, it is getting harder forlegacy tools to meet the demands of engineers. Adding functionalities continuously over timeeventually makes these tools slow and difficult to get to learn and to use. This pushes compa-nies to innovate and find alternative tools that have the ability to handle complex workloadsin an easy to understand manner.

4

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2 Theory

This chapter covers the theoretical background considered related to the functionality of thelink budget tool in VSS. What we mean by functionality is the set of parameters listed inSection 1.2.

We will cover the baseline components of an RF front end (RFFE) receiver. These includeamplifiers, filters and mixers. Other components and functionality covered in this sectioninclude Analog-Digital-Converter (ADC), Automatic Gain Control (AGC) and channel filter-ing. There are many other aspects of RF system modelling such as antenna characterization,DSP and the transmitting part of the system. But for the sake of narrowing the scope of theproject, we will focus mainly on the analog front end, and theory related to the link budgettool.

We will also cover non-ideal aspects of RF system design. When designing and evaluatingRF system performance and characteristics, we must take into consideration these aspects.These include noise and distortion, process variations and nonlinear behavior of RF compo-nents. It is worth noting that all non-ideal phenomena mentioned above are not necessarilyindependent. This will be clarified.

2.1 Noise

Noise can be described as a random process which is present in RF systems. Noise present inRF systems is introduced by the antenna from the external environment to the system, and isalso generated internally by active components within the system itself.

One type of noise important to radio systems is thermal noise. It is caused by randommotion of charges and is generated by anything lossy in radio systems. It can also be gen-erated outside the system e.g., in the atmosphere from thermally excited charges. Thermalnoise can be characterized as frequency independent, noise, i.e., white Noise. When measuringnoise power in the frequency domain, we can view the thermal noise as a constant powerspectrum. across all measured frequencies due to this characteristic [11].

When measuring a signal in the time domain, we will observe the noise as a randomprocess on top of the signal. If the noise power in the system is stronger than the power ofthe desired signal, we will not be able to observe the desired signal. Therefore, it is necessaryto minimize the amount of noise generated by any RF system.

5

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2.2. Non linearity in RF devices

A simple example of a noise source is a resistor of value R in an environment with tem-perature T. Charges in the resistor are thermally excited and so we will be able to measure avoltage across it. Since thermal noise is a type of white noise, the mean voltage is 0. However,the root mean square value (rms) is non-zero and is given by (2.1).

Vn =?

4kTBR (2.1)

where B is the system bandwidth and k is the Boltzmann constant. In a system where theresistor acts a noise source with impedance R, the available noise power Pn delivered to amatched load can be derived with elementary circuit theory as in 2.2.

Pn =

(

Vn

2

)21

R=

V2n

4R= kTB (2.2)

It can be seen that both the temperature and the system bandwidth play a crucial rolewhen characterizing system noise power.

Noise figure

In RF systems, the increase of noise can be characterized by noise figure, which is the mea-surement of degradation in signal-to-noise ratio (SNR) from a point to another in a system (forexample input and output). Noise figure is defined as [11]

F =S1/N1

S2/N2(2.3)

where terms with notation 1 refers to port 1 and notation 2 to port 2. Single components oftenhave noise figure specified in their data sheets in the units of decibels as F(dB) = 10log10(F).

As systems consists of many components, independently produced and tested, in orderto characterize a system by its total noise figure, Friis formula for noise can be used: [11]

F = F1 +F2 ´ 1

G1+

F3 ´ 1

G1G2+ ..., (2.4)

In order to minimize noise figure, we can derive from (2.4) that components with a largegain (G) such as amplifiers should be put close to the input.

2.2 Non linearity in RF devices

In many cases, system modelling can be approximately made assuming linear dependencybetween input and output signals. However, this linear assumption is never true and espe-cially not for RF devices and networks. This section covers the basics of nonlinear systems.

Given a nonlinear network, the output signal can be expressed as

so = a0 + a1si + a2s2i + a3s3

i ..., (2.5)

where si is the input signal and so the output signal. Whereas for a linear network, theoutput can simply be expressed as so = a0 + a1si. A system with an input signal given by atone si = V0 cos(ω0t) results in an output

so = a0 + a1V0 cos(ω0t) + a2V20 cos2(ω0t) + a3V3

0 cos3(ω0t) + ...,

= (a0 +1

2a2V2

0 )+ (a1V0 +3

4a3V3

0 ) cos(ω0t)+1

2a2V2

0 cos(2ω0t)+1

4a3V3

0 cos(3ω0t)+ ..., (2.6)

From (2.6), it can be seen that harmonic components are present at the output of a nonlin-ear system, [11].

6

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2.2. Non linearity in RF devices

As signals in RF systems are rarely a single tone, it might be of interest to investigate thecase when the input signal consists of many tones. Lets say si = V0(cos(ω1t) + cos(ω2t)),then the output becomes

so = a0 + a1V0(cos(ω1t)+ cos(ω2t))+ a2V20 (cos(ω1t)+ cos(ω2t))2 + a3V3

0 (cos(ω1t)+ cos(ω2t))3 + ...,(2.7)

The output spectrum will consist of harmonics given by

mω1 + nω2 (2.8)

where m and n are arbitrary integers. These combinations are what is called intermodula-tion products [11].

Gain compression

Looking back at the output signal of an nonlinear system (2.6), we can derive the voltage gainof the fundamental frequency as:

Gω0 = (so/si)ω0 =a1V0 +

34 a3V3

0

V0= a1 +

3

4a3V2

0 (2.9)

Since a3 is negative for amplifiers, it can be seen that the voltage gain decreases as theamplitude of the input signal V0 increases. The gain becomes saturated as signal strengthincreases at the fundamental frequency, hence the name gain compression. For nonlinear RFcomponents, the gain compression is quantified as P1, usually in decibels. P1 is the pointwhere the gain has decreased 1 decibel with respect to the linear case, either referred to theinput or the output [11]. Fig. 2.1 shows a typical nonlinear amplifier with output compressionpoint at 15 dB.

Figure 2.1: Input versus output signal strength of a typical nonlinear amplifier simulated inVSS

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2.3. Selectivity

Third-Order Interception Point

When the input signal consists of two tones, the output, is given by (2.7). It can be seen thatthird order intermodulation products are increasing with the cube of the input voltage. Asthe signal voltage is increased, the output power of the fundamental tone and the third ordertones approach one another. The hypothetical point where these two lines cross is called P3

and is either referred to the input or the output. Solving the system of equations for the twolines, we find

P3 =2a3

1

3a3(2.10)

where P3 is referred to the output. This characteristic is of interest in RF systems sincethese intermodulation products can cause distortion in the received signal This can in turnaffect performance.

Fig. 2.2, shows the signal strength of fundamental tone (in blue) and the signal strengthof the third order intermodulation tone (in pink). The intersection of the two dotted lines isreferred to as P3. In contrast to the dotted lines, the solid lines take into account the nonlinearcontribution in both the fundamental tone (in blue) and the third order intermodulation tone(in pink).

Figure 2.2: VSS simulations of input versus output signal strength of a typical nonlinearamplifier. Fundamental tone (in blue) and third order intermodulation tone (in pink).

2.3 Selectivity

An RF receiver must provide certain requirements for desired performance. RF receivershave to be able to receive a signal in a specific channel within the band of operation, whilerejecting signals and distortions from adjacent channels. This specific requirement is referredto as selectivity [11].

8

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2.4. Degradation

2.4 Degradation

Degradation is a measurement of how well a radio channel performs with interference. Thedegradation can be calculated using (2.11).

Degradation[dB] = [POUT+INT´ G+INT ] ´ [POUT ´ G] (2.11)

2.5 Analog circuits in RF receivers

Along the receiver chain, several types of amplifiers are used. They have all different pur-poses besides the main purpose of amplifying the signal.

Low Noise Amplifier

According to the Friis formula (2.4) it is important for the total noise figure of the system, tohave high gain components close to the antenna of an RX lineup. The earlier the componentlies in this chain, the more its noise figure contributes to the over all noise figure. The solutionis the low noise amplifier or "LNA".

When designing an amplifier a, trade-off is made between the amplifiers gain and its noisefigure. The LNA is an amplifier that is optimized for low noise instead of maximum gain, inorder to keep the total noise figure of the lineup low.

For any two port amplifier, the noise figure can be described as in (2.12) [11].

F = Fmin +RN

GS|YS ´ Yopt|2 (2.12)

Where YS : Source admittance, Yopt : source admittance that results in the lowest possi-ble noise figure, Fmin : Minimum noise Figure of transistor, RN : Equivalent noise figure oftransistor and GS : The real part of the source admittance [11].

Variable Gain Amplifier and Programmable Gain Amplifier

Variable Gain Amplifiers (VGA) and Programmable Gain Amplifiers (PGA) are as the namessuggest, configurable amplifiers. Their purposes vary depending on design and application,but in receivers they can act as gain control and gain calibration. Gain control can be usedto compensate for nonlinear behavior at high received power in order to improve dynamicrange. Gain calibration can be used to compensate for process variations and temperaturevariations in components. These are examples of how VGA/PGA technologies were used inthis project.

Filters

Analog passive filters are used to attenuate undesired frequency content of an incoming sig-nal, while retaining desired frequencies. There are four basic types of passive filters; Low-pass filters (LPF), bandpass filters (BPF), bandstop filters (BSF) and high-pass filters (HPF).

In RF applications, these types of filters can be implemented using a variety of techniques.These include lumped component filters, microstrip filters and cavity resonators.

Lumped component filters are implemented with lumped elements such as capacitors,inductors and resistors. Microstrip filters are implemented using microstrip transmissionlines utilizing stubs and coupled lines as filtering elements [10].

Cavity filters are filters constructed from a cavity resonator i.e. a wave guide with its in-ternal dimensions tuned to create a standing wave for certain frequencies while frequenciesoutside the passband get attenuated by not being able to propagate through the cavity. Be-cause the filter is a cavity, it attenuates unwanted signals hard, which is why it is commonly

9

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2.5. Analog circuits in RF receivers

used as the bandpass filter at the antenna of RF systems to prevent interferance from reachingthe components of the receiver. [17].

There are some parameters of importance when analyzing filters. Insertion loss (IL) de-scribes how much power that is lost between input and output. Ripple describes the flatnessof the filter frequency response in the passband. Rejection describes how the filter attenuatesfrequencies in the stopband [10].

Mixers

The RF mixer is an essential component in any RF system. It is a two-input, one-outputcomponent that combines the two input signals by adding together their two frequency com-ponents as: ω1 + ω2 or ω1 ´ ω2. This can be done to either up- or down-convert a signaldepending weather the mixer is used in a transmitter or receiver. Since the mixer is a non-linear device, its characteristics can be described as a series of Taylor polynomials accordingto (2.7).

Up-conversion is used in the transmission link: Intermediate frequency (IF) signal ismixed with a signal from a Local Oscillator (LO) that acts as a carrier for the informationcontained in the IF signal. The mixed signal is then sent to the RF port. Given the two inputsignals

VLO(t) = cos(ωLOt) (2.13)

VIF(t) = cos(ωIFt) (2.14)

The resulting RF waveform from Up-conversion can be approximated as in (2.15).

VRF(t) =K

2[cos(ωLOt ´ ωIFt) + cos(ωLOt + ωIFt)] (2.15)

where K is the voltage conversion loss constant of the mixer.At the receiver end, the RF and LO signals will act as input and IF the output. The output

of the Down-converting mixer can be approximated as in (2.16).

VIF(t) =K

2[cos(ωRFt ´ ωLOt) + cos(ωRFt + ωLOt)] (2.16)

A simple mixer can be implemented with a single diode. However, simple mixers have thegeneral disadvantage of having a high LO- and RF-leakage. There are two types of balancedmixers designed to handle this problem; single and double balanced mixers.

The single balanced mixer is used to suppress the level of either the RF or LO input signalwhile the double balanced mixer is used to suppress both. The advantages of using a singlebalanced mixer is that it does not require high LO drive levels, it is also cheaper and lesscomplex. The advantages of the double balanced mixer are that all ports are isolated, Thispreventing leakage, increases the linearity of the mixing and has a better spurious responsesince all even order products are suppressed. This is why the double balanced mixer is inwider use today than its single counterpart.

Mixers can be used to detect phase differences in the two input signals. Mixers howeveroften display some non ideal functionality such as DC-offsets when used in this configuration[11].

Phase noise

Phase noise are random fluctuations in phase that are ever present in real signals. Since thephase noise is generated from the uncertainty of the phase of the signal, the effect it generates"propagates" outwards from the signal in the frequency spectrum as shown in Fig. 2.3 [8].

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2.5. Analog circuits in RF receivers

Figure 2.3: Two systems using different oscillators showing the effect of phase noise Red:noisy oscillator, Blue: system with ideal oscillator [8].

ADC

ADC stands for Analog-to-digital converter and is the component responsible for sampling ananalog signal and converting it into digital information. The basic idea of ADC functionalitywill be described and some of the implementation types will be discussed. The reader isreferred to [7] for further theory regarding the implementation types of ADC’s.

Flash ADC

Flash ADC uses parallel connected comparators with different reference signals. The signalis sampled one symbol at a time. Each comparator outputs one bit. They are simple in theirprinciple of operation and fast, but suffer from a large number of reference voltages andrelatively high power consumption.

Pipeline ADC

Pipeline ADC architectures perform conversion using multiple cascaded stages of low-resolution ADCs. Each stage outputs the quantization error of the ADC, amplifies it andsends it to the input of the next stage. This operation is performed until the last stage whichonly consists of an ADC without quantization error output. It is slower than flash ADCs butpower consumption is not as high.

Delta-Sigma ADC

Delta-Sigma ADC utilizes a feedback loop to force input and output to similar levels, whileat the same time making use of low resolution (can be as low as 1 bit) ADC quantizers. Thequantization error (noise) is added to the output signal and shaped with the help of an inte-grator within the delta-sigma loop. The integrator loop filter has the effect of a LPF for theinput signal and HPF to the quantization noise. We can therefore filter out the quantizationnoise and keep the input signal.

AGC

AGC stands for Automatic Gain Control and is a control feature which is particularly used inRF systems. It is used to actively adjust power levels in a system. For receivers, it is oftentimes used as automatic attenuation for keeping linearity and to extend dynamic range of theADC. In real time, we cannot know what the received signal strength will be, and we have totake that uncertainty into account when designing a system.

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2.6. Process variations

In the case of a signal weak enough not to be detected, an AGC will not be able to doanything to improve performance. In the case of signal strong enough to either compressgain in the system (destroying linearity) or being outside the dynamic range of the ADC, wecan actively adjust system gain to attenuate this signal.

Aspects of stability, noise figure and linearity all have to be taken into account for in orderto design AGC systems. By attenuating the signal for example, we will inevitably increasenoise figure as derived from (2.4).

There are many ways of implementing AGC functionality for receivers, but the one archi-tecture focused on in this project has similarities to [14].

2.6 Process variations

When fabricating physical components for any system, there will be slight deviations in theirproperties due to imperfections in the manufacturing and/or the materials being used. Thisis referred to as the process variation of the component. In high performance RF systems,the component parameters needs to be accurate to very high degree to ensure reliability ofoperation. When designing RF-systems, these variations need to be taken into account tomake sure the variation can be compensated for or have narrow enough margin of error notto disturb the larger system.

E.g., a filter can have a process variation in the pass-band attenuation that can attenuatea signal more than what is acceptable. Moreover, the signal propagating through the filtercan be affected by attenuation ripple. These effects must be predicted in the design phasethrough simulations that include parameters emulating process variations.

One way to compensate for variations in component properties is to do a "worst caseanalysis" where all the different factors that determine system’s performance are taken intoconsideration and are assumed to be at "worst case" scenario. Then one can evaluate and/orestimate the performance of the system at in a "worst case-scenario". This method is effec-tive but has the flaw of assuming all of these factors are independently affecting the system.This is a rough estimation for performance evaluation since these factors are not necessarilyindependent.

In order to determine a more accurate model of the absolute range of component per-formance variation, IC-manufacturers use statistical tools. One of these tools is the MonteCarlo analysis which can be used to determine the components statistical variation based ona function of random number generation [6].

2.7 Modulation

This section aims to introduce the reader to the basic theory of RF modulation.Modulation of a signal is the process of varying certain properties of a periodic waveform

(carrier signal) with another signal (modulating signal). A general way of thinking aboutthis scheme is that the modulating signal contains information and the carrier signal controlswhere the radiated spectrum is located in frequency.

There are various ways to modulate a carrier wave using properties of waves. For a gen-eral signal in time

S(t) = Acos(ωt + φ) (2.17)

There are 3 degrees of freedom to modulate the signal. Amplitude A, frequency ω and phaseφ. The analog modulation schemes are properly called Amplitude Modulation (AM), FrequencyModulation (FM) and Phase Modulation (PM).

Digital modulation schemes use the same degrees of freedom as analog modulation, butuses it to encode digital bits of information. The digital counterpart to the analog modulation

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2.8. I/Q Data

schemes AM, FM and PM are Amplitude Shift Keying (ASK), Frequency Shift Keying (FSK) andPhase Shift Keying (PSK).

Using the basic principles of modulation presented in this section, more advanced meth-ods of modulation can be derived. For example, both amplitude and phase modulation cansimultaneously be utilized in the same modulation technique. [11].

2.8 I/Q Data

I/Q data is a form of data representation using the so-called in-phase and quadrature-phasecomponents of a sine wave. Using the trigonometric identity

cos(x + y) = cos(x)cos(y) ´ sin(x)sin(y) (2.18)

and applying it to a waveform

S(t) = Acos(ω0t + φ(t)) (2.19)

it givesAcos(ω0t + φ(t)) = A[cos(φ(t))cos(ω0t) ´ sin(φ(t))sin(ω0t)] (2.20)

whereSI(t) = Acos(φ(t))cos(ω0t) (2.21)

andSQ(t) = ´Asin(φ(t))sin(ω0t) (2.22)

are the in-phase and quadrature phase components of S(t).For RF application this result can be applied for modulating a single waveform (2.19) with

information contained in its I and Q components. It also means that the data stored in I andQ can be independently set and the resulting waveform is still in the form as in (2.19) [5].

In PSK, the most simple case is storing information with two states, where φ can storeeither binary 0 or binary 1. For this, the advantage of having information stored in I and Qcomponents does not even need to be utilized if φ0 and φ1 are 0 and π respectively.

This idea can be expanded by introducing more states. QPSK (or Quadrature Phase ShiftKeying) utilizes 4 states of φ while holding amplitude is constant. Each state can store twobits utilizing I/Q data. These states are φ11 = π

4 , φ01 = 3π4 , φ00 = ´ π

4 and φ10 = ´ π4 [11].

Introducing amplitude as a degree of freedom to the modulation scheme, more than 2bits per state as in QPSK can be utilized. An example of a I/Q modulation scheme usingboth amplitude and phase modulation is QAM (Quadrature Amplitude Modulation). QAMmodulation has number of states on the form as in (2.23).

M = 2n (2.23)

QAM modulation schemes are referred to by their number of states on the form M-QAM.For example, we have 4-QAM, 16-QAM, 32-QAM, 64-QAM and so on where the number ofbits per states is

n = log2(M) (2.24)

By this result we can conclude that QPSK and 4-QAM are identical modulation schemeseven though the theoretical background is different [11].

A graphical representation of the states encoded in I/Q data is the constellation diagram. Aconstellation diagram of QPSK states and 64-QAM states is presented in Fig. 2.4. X-axis datais the in phase component I, and the y-axis data the quadrature phase component Q.

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2.9. Receiver architectures

Figure 2.4: Left: QPSK, Right: 64-QAM. Simulated in VSS

2.9 Receiver architectures

This section introduces two types of receiver architectures, i.e., the superheterodyne and ho-modyne receivers.

General receiver architecture

The types of receivers which this thesis covers consist of the following parts: Receiving an-tenna, filtering, amplification, down-conversion, sampling, channel filtering and decoding.

Superheterodyne Receiver

The main functionality which identifies superheterodyne receivers is the use of an interme-diate frequency (IF). Superheterodyne receivers might use more than one down-conversionto overcome problems due to LO stability at high frequency RF. After each down-conversion,image frequencies created by the mixing process and ideally intermodulation products arefiltered out [7, 11]. A general schematic of a so called dual superheterodyne receiver, which usestwo down-conversion stages is presented in Fig. 2.5 and Fig. 2.6

Talking about superheterodyne receivers, one issue that appears is so called image rejection.The problem is characterized by a trade off between image rejection and adjacent channelsuppression. The problem of image rejection appears since the mixer outputs two dominantsignals of frequencies |ω1 ´ ω2| and |ω1 + ω2|. Since we have two cases where we can mix toa desired IF, this means RF frequencies of distance 2ωIF in frequency will mix to the same IF[12].

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2.9. Receiver architectures

Figure 2.5: Superheterodyne receiver architecture [13]

Figure 2.6: Superheterodyne receiver architecture with I and Q data [13]

Homodyne Receiver

Homodyne, Direct-conversion or Zero-IF receivers directly convert the RF signal into basebandwithout any IF stage. Down-conversion is achieved with a quadrature down-converter split-ting up in-phase (I) and quadrature-phase (Q) components of a signal, which is then filteredand sampled. The reasons for quadrature down-conversion of the signal in I and Q com-ponents is to avoid so called "folding" from the negative frequencies and in case of phasemodulated signals. In case of IQ modulated signals, the different sidebands of the RF signalcontains different information and splitting up these into two different phases at demodula-tion avoids folding since the different sidebands fall on each side of baseband [12].

The main difference here from a super heterodyne receiver is that channel selection isachieved with a low pass filter instead of a bandpass filter since the signal is already down-converted to baseband. The LO signal is tuned to the incoming RF frequency for achievingzero-IF [7].

Homodyne receivers come with some technical challenges. LO leakage from the mixersresult in so called self mixing which has the effect of adding a DC offset to the output of themixer. IQ imbalance is also an issue when talking about homodyne receivers, although thisis not necessarily unique to this type of receiver.

Two types of homodyne receivers are presented in Figures 2.7 and 2.8.

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2.9. Receiver architectures

Figure 2.7: Homodyne receiver architecture [13]

Figure 2.8: Homodyne receiver architecture with I and Q data [13]

Discrete-Time Receivers

In certain applications, the use of direct RF sampling can be used to advantage. One sim-ple case is to enable multi standard radio on one single front end architecture. This leavesmore design space for software defined radios (SDR), which have the possibility to increaseversatility and reduce bill of materials since a lot of the functionality lies in integrated digitalcircuits. However, RF sampling of various kinds comes with a new set of challenges. Remov-ing analog RF devices from the design puts high performance requirements on sampling andsignal processing in order to compete with established and well understood technologies.

A few different RF sampling architectures which have been reported on over the years arepresented here.

The so called analog processing receiver, uses analog filters and decimation instead of amixer after the LNA in order for the ADC to sample the signal at a reasonable rate. Interferingsignals and blocker signals are therefore not mixed down with LO harmonics as IM products,but instead aliased when sampled unless filtered. To tackle this problem, anti-aliasing filterscan be implemented or the sample rate of the ADC must be increased. The first reportedimplemented receiver of this type was presented in [15].

Direct digitization receivers apply ADC functionality directly after LNA without adding anyextra analog hardware. There are various types of these receivers depending on samplingmethod and of ADC [7].

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2.10. Digital Signal Processing

Another discrete-time receiver well worth mentioning but not discussed any further areHybrid-filter bank receivers [16] which use the principle of decomposing the signal in the fre-quency domain using a bank of analog filters. There are various other kinds of discrete-timereceivers and it is an active topic of research.

2.10 Digital Signal Processing

Digital signal processing deals with how the signal is handled from the ADC to the eventualrecreation or storage of the analog information. The first step of any digital processing is thesampling of the analog signal.

Sampling

Sampling is the act of measuring a signal value at certain points in time. How often thesemeasurements are done is called the "sampling rate" or "sampling frequency" [Fs]. How thissampling frequency relates to the signal frequency being measured dictates if the informationof the original signal will be preserved or not. Sampling frequency is derived through thetime between measurements, i.e, samples. It is the measurement of how many samples persecond that are performed.

The Nyqvist theorem states that any signal needs to be sampled for at least twice its fre-quency or simply put:

Fsignal,max ă Fs

2(2.25)

A signal that has a frequency higher than the Nyqvist frequency will naturally form amirror signal on the opposite side of the Nyqvist frequency due to having the samples fall onthe same places on the signal. The mirror signal will fall on Fs ´ FSignal as shown in Fig 2.9.This is also known as aliasing [9].

Figure 2.9: Signal mirroring (aliasing) around the Nyquist frequency [9]

Spectrum analysis

Spectrum analysis is a tool used when conducting measurements and analyzing signals.Fourier transformation of a signal decomposes it into its spectral components. In the case ofsignal in time, the transformed signal will be a function of frequency.

The discrete version of the Fourier Transform is called Discrete Fourier Transform (DFT)and is widely used to analyze sampled signals. The more samples analyzed, the higher thefrequency resolution will be on the Fourier Transformed signal.

As signals are sampled, some things need to be taken into account for when performingspectrum analysis using DFT. A finite frequency means aliasing will occur when measuringfrequencies above the Nyquist frequency.

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2.10. Digital Signal Processing

Another problem that arises with analyzing finite data is that we cannot assume first andlast sample continuously connect with perfect periodicity. This gives rise to uncertainty in thefrequency spectrum as the signals will appear to contain information far out from the center.

One way to tackle this issue is to apply so called Window functions to the spectrum tomitigate some of these effects. Windowing does this by applying different functions in timedomain that minimizes the amplitude of the discontinuos area of the signal that would other-wise cause high frequency spikes in the frequency domain. In Fig. 2.10 the difference betweena spectrum with applied window and one without is presented where the difference can beseen clearly.

Figure 2.10: VSS simulation of a QPSK signal spectrum with Hanning window (Blue) andwithout window function (pink)

Digital filtering

In order to minimize the risk of aliasing, the signal cannot contain frequencies above theNyquist frequency. This can be achieved by applying a low pass filter with a cut off frequencyat the Nyquist limit i.e., an anti-aliasing filter. However, because there is no filter with aninstant transition band, the cut off frequency needs to be slightly below the Nyquist limit inorder to ensure that the stop band attenuates the higher frequencies enough for the aliasingto be negligible [2].

A filter that is especially well suited for this is the Finite Impulse Response or FIR-filter,which is a type of digital filter. The FIR filter is finite because it settles to zero in a finite time.An IIR (Infinite Impulse Response) filter however can decay towards zero for an infinite time.FIR filters are based on a N-number of parallel "taps" as seen in Fig. 2.11.

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2.10. Digital Signal Processing

Figure 2.11: Transposed direct form FIR filter [2]

The mathematical expression of the output signal y given an input signal x through a FIRfilter with filter coefficients h is given by (2.26).

y[n] =N´1ÿ

i=0

h[i]x[n ´ i] (2.26)

In order to reduce the processing required if the sample rate is a lot higher than the signalfrequency, downsampling reduces the amount of samples that has to be processed. By ap-plying Half-band FIR filter and then downsampling (decimating) the signal, we can keep theinformation within the boundaries of the Nyquist frequency while minimizing effects fromaliasing.

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3 Development

This chapter presents the detailed approach to create a simulation platform with focus onthe budget analysis simulation tool. After some consideration about the complexity of acommunication system in terms in RF circuit design when non-idealities of the real-worldcomponents, process variations etc. must be considered, the receiver model is introducedalong with the added functionality as required by project description. The way temperature-and frequency-dependency are implemented in the model is detailed. Models for simulat-ing the effect of LO phase noise, mixer M x N products and IQ-imbalance are described aswell as models for gain calibration and automatic gain control. The receiver model includesalso aspects of digital signal processing (DSP) for complete characterization of the receiverperformance. Finally, the simulation platform and the developed templates for link budgetsimulations and time-domain simulation are presented in detail.

3.1 NI AWR Design Environment

In order to construct a simulation platform, a development platform is needed. One of thepurposes of the project, as mentioned, is to examine how well National Instruments AWRDesign Environment environment can handle such tasks. The NI AWR Design Environmentis an Electronic Design Automation (EDA) software tool dedicated to RF/microwave systemdesign [3]. The platform allows complex high-frequency systems to be modelled, simulatedand verified. Software segments like Microwave Office and Visual System Simulator (VSS)are included. Microwave Office is dedicated to the RF/microwave circuit design on compo-nent level and allows nonlinear, frequency- and time-domain analysis, as well as electromag-netic (EM) analysis [4]. VSS is dedicated to system design based on behavioral models.

The advantage of the AWR development platform is that it allows customization of codes(scripts) for desired tasks and functionality. This customization is enabled by the applicationprogramming interface (API). The programming languages are popular ones, e.g., C++. Thisleads to AWR being able to get new functions implemented faster as well as having fewerpersistent bugs. Their main competitor, Advanced Design System (ADS), Keysight Technolo-gies, uses their own proprietary language for coding. This has some advantages but put alimitation in the possible grade of customization.

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3.2. Receiver impairments

Visual System Simulator

Visual System Simulator (VSS) is the system-level simulation environment included in theAWR software. VSS is dedicated to wireless communication and radar design. It supportsmeasurements of system parameters for cascaded RF blocks, nonlinear behavior and spu-rious effects analysis, and measurement of metrics specific to communication applications,e.g., the Bit Error Rate (BER), [4]. It also supports signal processing in complex, real and dig-ital domain and a combination of these, [4]. As introduced in Chapter 1, the main goal ofthis project - a practical, user-friendly simulation platform for receiver budget analysis – willmake use of the VSS tool due to the customization possibilities that the software allows morethan other equivalent tools on the market.

3.2 Receiver impairments

Given the complexity of a communication system and of the signal processing performedwithin it, a series of non-idealities of the real-world component and design faults may affectthe performance of the entire system. A part of these non-idealities were mentioned in Chap-ter 2. Their effects on the signals to be processed should be identified and predicted throughsimulations. A few of these effects are listed:

• Non-linearity: compression, intermodulation, spectral regrowth

• LO-leakage: self-mixing, M x N harmonics

• Noise figure, not optimized: sensitivity, SNR at the output

• Process variations affecting all components in their electrical parameters, matching, etc.

• Temperature effects etc.

3.3 Receiver model implementation

This section describes the implementation method of the receiver model and the differentfeatures listed in list of requirements in Section 1.2.

As shown in Chapter 1, the main goal of the project is to create a simulation platformwith focus on the budget analysis simulation tool for wireless applications. This tool shouldbe user friendly and easily adapted to the company requirements, e.g., allowing parametersimulations of the component models. Budget analysis is a powerful method frequently usedin top-level system design. Through system budget simulations, linear and non-linear char-acteristics of the overall system can be determined as a function of the characteristics of thecomponents in the chain. A typical design cycle includes:

• Receiver modelling as a chain of components (filters, LNA, mixers, etc) according to theactual receiver architecture

• First-hand estimation of the component characteristics that are in parameter form,(gain,compression, noise figure, etc.)

• Budget simulation on top-level, e.g., on receiver level

• Compare the simulation results to the required specifications of the system (receiver)

• If specification not met, modify/optimize some components parameters and conductsimulation loops until the system specifications are met

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3.3. Receiver model implementation

From this pseudo flow-chart the results of how important top-level simulations are in thedesign of complex, wireless systems. Since they comprise of a multitude of circuits operat-ing under different circumstances, e.g., signal levels, frequency etc., and performing signalprocessing of high complexity, these system level simulations are necessary to make sure thesystem is working as intended.

Homodyne RX

The basic receiver lineup is based on a general homodyne receiver model presented in Fig.2.8. A system diagram of the receiver lineup is presented in Fig. 3.1 with a few differences.Since VSS supports the use of complex signals on the form S(t) = I(t) + jQ(t) a single mixeracts as an IQ demodulator by itself with the right settings. Another difference is that there isno Variable Gain Amplifier (VGA) in Fig. 3.1. The reason for this design choice was that thisfeature was not assessed as "basic". This feature will be presented in the next lineup used forthe project.

Figure 3.1: Basic homodyne receiver lineup

The receiver lineup implementation for this project however has a few more features in-cluded for a more detailed model. This lineup is constructed based on some of the specifica-tions of an existing 5G radio receiver and the implementation is presented in Fig. 3.2. It usesfeatures such as temperature dependent parameters, losses and VGA’s.

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3.3. Receiver model implementation

Figure 3.2: Homodyne receiver lineup with features

Temperature dependency

In order to approximate real system performance, the temperature dependency of certaincomponent parameters needs to be taken into account and subsequently modelled. In a lot ofcases, when temperature is static, component properties such as gain/loss behaves the sameindependent of temperature and can be modelled easily. However, when there is a systemthat will operate in a wide range of temperatures and the system itself is prone to self heating,the physical structure of the components causes the performance to drift.

In order to ensure correct performance and that the system meets regulatory and/or in-ternally set requirements, the temperature dependency needs to be taken into account.

Temperature variation is implemented with respect to a nominal temperature. The nomi-nal temperature is defined as the arithmetic average of the maximum and minimum temper-ature given in 3.1.

Tnom =Tmin + Tmax

2(3.1)

where temperatures are defined as either Celsius or Kelvin. For a temperature varyingparameter Q, the value is modelled as a function of T

Q(T) = Qnom +T ´ Tnom

Tmax ´ TnomQtemp (3.2)

where Qtemp is the user specified parameter for temperature variation. To give an exampleof how this works, lets say we have an amplifier with nominal gain Gnom = 10 dB and atemperature varying parameter Qtemp = ´1.2. At T = Tmax, G = 8.8 dB and at T = Tmin,G = 11.2 dB.

The gain/loss variation due to temperature can be compensated for by using a variablegain amplifier that can attenuate/amplify a signal depending on what temperature is in thesystem. This behaviour can be modelled in AWR by knowing the target gain for two differenttemperatures and interpolate the gain linearly between these two temperature values. Thedrift in gain/loss can thereby be compensated for in the model for static (time independent)simulations.

For time domain simulations, it is convenient to use a look up table of pre-measured gainsat different temperatures while sweeping temperature values for the system.

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Frequency dependency

As well as in the case above with temperature, components tend to vary in performancedepending on frequency. This is can be modelled in various ways in AWR depending on whatsimulations are being done and what components are being used. Frequency dependencycan be modelled linearly, like temperature dependency is modelled in this project, but sincetemperature dependent data for the different components may be difficult to obtain, it isinstead made part of the AGC system by taking the frequency dependent attenuation of thesystem blocks in S-parameter files. A number of points are placed on the S-parameter curvesand then an interpolation is made between these. The power measurement for the AGC ismade with regard to S21.

Frequency dependency could be implemented in this way for the entire lineup, but itwould require a complete redesign of the lineup as well as lose a lot of what makes VSSsimple to perform simulations in due to that the component properties would be complex tochange and would have to be specified in non-intuitive ways.

The various filters implemented in the model are also a way of representing the frequencydependency of the system. Frequencies are attenuated differently depending on where on thespectrum they fall while still being propagated through the system.

Process variation

There are two types of process variations implemented. One for each of the simulation plat-forms respectively. This was done because of how the component parameters for the analoglineup are specified in the different platforms. The budget document can perform yield anal-ysis as part of VSS built in functionality, where the user can specify the type of distributionand how much the chosen component parameter should vary Fig. 3.3.

Figure 3.3: Process variation for Gain, P1dB and IP3 for a component in the analog lineup inthe budget platform

When performing a yield analysis in VSS, a random number is generated in the specifiedinterval and used as the parameter value. This can be done multiple times as a sweep, leadingto a different approach being used in the time domain platform to reduce simulation time.

In the time domain platform, the process variation is specified alongside the other com-ponent values in the "Global Definitions"-folder as seen in Fig. 3.4.

Figure 3.4: Process variation as specified in the Time Domain platform

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Table 3.1: LO phase noise text file format

(,Hz) (,dB)

100 -801e3 -90

10e3 -95100e3 -100

1e6 -12510e6 -145

The process variation is then multiplied with a factor K_[...] indicating the maximum, minand normal case for the parameter. This is then added in turn to the component parameterin the analog lineup. This is suitable for the time domain platform since there are no sweepsinvolved and the most interesting cases of i.e. maximum, minimum or normal gain can besimulated with the manual input of the K_[...] factor. This can be seen in detail in Fig. 3.5.

Figure 3.5: Factor determining max, min and nominal case for process variation.

LO phase noise

Phase noise is modelled in AWR with a text file, a phase noise mask, attached to the LO inputtone of the mixer. The text data file contains frequency offset-dBc/Hz data in a format asTable 3.1.

The text file is then applied to a tone source as phase noise as shown in Fig. 3.6.

Figure 3.6: LO phase noise

Mixer M x N products

The mixers inside the IQ modulator outputs a signal on the form (2.7). However, to modelthe specific behavior of the mixer, the user needs to specify the output levels (dBc) of theintermodulation products on the form (2.8), where m and n are indices in a resulting matrix.In AWR, the user needs to input this matrix in the mixer model as a text file. The AWRimplementation of this feature is presented in Fig. 3.7. This example shows a matrix withindices 0x0 to 4x4.

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Figure 3.7: M x X text file as implemented in in the VSS mixer block

IQ imbalance

IQ imbalance models non ideal aspects of the IQ demodulator. It is implemented as a block,containing parameters DC offset, amplitude imbalance and phase imbalance. Units are volts,dB and radians.

Gain calibration

Gain calibration is used as to compensate for process variations and temperature variationsin the system. It is also vital for the system to estimate its gain for DSP operations. It usesVGA blocks as variable attenuators. It is therefore important that the "Target gain" is not setto high since we only compensate by attenuation.

Two different gain calibration methods were implemented in AWR. The first model calcu-lates the sum of gain parameters from the RX lineups (3.3) and the total temperature varyingparameter (3.4).

Gnom =N

ÿ

n=1

Gn (3.3)

Gtemp =N

ÿ

n=1

Gtempn (3.4)

Process variations are modelled by adding together the statistical gain variations in eachelement in the RX lineup as in (3.5).

Gprocess =N

ÿ

n=1

Gprocessn (3.5)

Adding together nominal gain, temperature varying gain and statistical gain variationswe can determine the total gain by (3.6).

Gtot = Gnom +T ´ Tnom

Tmax ´ TnomGtemp + Gprocess (3.6)

Gain calibration was then applied as an attenuation block attenuating the signal as in (3.7).

Lcal =

#

Gtot ´ GTarget, if Gtot ą GTarget

0, otherwise(3.7)

Implementation of this method in AWR is presented in Fig. 3.8.

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Figure 3.8: Gain calibration implementation using equations

The second implementation method of gain calibration uses a PID (Product, Integrator,Derivative) controlled gain calibration loop to calculates attenuation by gain compensationbefore the main simulation starts. The AWR implementation method is presented in Fig. 3.9.

Figure 3.9: Gain calibration implementation using PID controller

Receiver AGC models

Two types of AGC functions were implemented, one equation based feed forward model andone feedback model. The feedback model works exclusively for time domain simulationssince it operates on previous samples while the feed forward model was designed to operatein any type of simulations utilizing equations and boundary conditions.

As discussed in Section 2.5, AGC is used to limit signal power going to the ADC utilizehigher dynamic range for linear gain. As components exhibit nonlinear behavior to a higherdegree with stronger signal power, AGC can be implemented to mitigate some of these ef-fects.

AGC functionality however comes with some inherent problems itself. Looking back atFriis formula for noise (see (2.4) ), we find attenuating the signal in the system increases noise

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figure. In the moment we attenuate the signal, we also generate discontinuity in the datastream.

There are other problems that arise with control systems. Stability is one aspect that hasto be taken into account since we rely on negative feedback with added delays.

VGA placement in the receiver lineup along with power measurement placement alsomatter for optimal control.

Feed forward AGC

The feed forward model was implemented using estimation of the output signal power givenboundary conditions such as input signal power, frequency and linear gain. This model hasthe advantage of relieving computational power from simulation run-time but the disadvan-tage of guessing output conditions, giving room for inaccurate behavior. Simulation settingsand equations for this model are presented if Fig. 3.10.

Figure 3.10: AGC Feed forward model

The estimated output power is given by 3.8.

Pout = Pin + GTarget + H( fc) (3.8)

H( fc) is the filter response of the system at the center frequency input signal and GTarget

the target gain of the system from antenna to ADC. The power is given in RMS. The disad-vantage of this AGC model is that it is difficult to estimate RMS output power from multiplesignals with different properties. This AGC does not include hysteresis functionality unlikethe feedback AGC.

Feedback AGC

In order to model AGC functionality in the system for time-domain simulations, feedbackcontrol can be used instead of manual control.

The receiver feedback AGC model implemented in AWR utilized comparators with hys-teresis built in. In contrast to the regular logical comparator which outputs either True orFalse depending on if input passes the condition, the comparator with hysteresis utilizes twoconditions, one condition for initial state and when the first condition was passed. The elec-trical analog to this behavior is the well known Schmitt trigger design which is described in[1]. The comparator with hysteresis implemented in AWR is presented in Fig. 3.11.

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Figure 3.11: Comparator with hysteresis implementation in AWR

For an AGC, we are interested in power measurement in order to control VGA’s. An AGCcontroller consisting of four comparators with different threshold levels was implemented inorder to control a maximum of four VGA’s. This can be extended to any number of compara-tors. The AGC controller implemented in AWR is presented in Fig. 3.12.

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Figure 3.12: AGC Controller implementation in AWR

Power measurement is important for implementing AGC functionality. In the case for theAGC implementation for the project, the running average of N samples of the incoming RMSpower is utilized, where N is user specified. Other user specified parameters for the AGC arehysteresis levels, delay between triggering VGA’s and a start delay for simulation purposes.

The power measurement AWR implementation is presented in Fig. 3.13.

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Figure 3.13: Power measurement for AGC controller

ADC model

The Delta-Sigma (∆-Σ) ADC implemented and tested in VSS was a 2:nd order ∆-Σ as indi-cated by the number of integrators and/or the number of feedback loops in Fig. 3.14.

Figure 3.14: VSS schematic of the tested delta sigma ADC

This ADC model was not implemented due to the drastically increased simulation timeswhen included in the receiver lineup for time domain simulations. It was also not compatiblewith budget simulations and was therefore not used for that platform either.

Digital interface

The digital interface was modelled using frequency transformation, frequency decimationalong with FIR filters and a channel filter. A simple model of this is presented in Fig. 3.15.

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Figure 3.15: Digital interface with FIR filters

FIR filter implementation

FIR filters were implemented with the help of coefficient based FIR filters. These coefficientswere generated in Matlab with the help of built in FIR functions. The resulting coefficientswere then exported to the AWR project.

3.4 Simulation platforms

In Section 1.2, the requirements for the simulation tool are presented. In order to cover theserequirements, different simulation platforms in the form of system diagrams were imple-mented in AWR, where different aspects of the RF lineups were analyzed. For example, onedocument was created for analyzing budget parameter, while another had the purpose ofanalyzing AGC behavior. All these documents are presented below.

Impairment implementation for link budget simulation platform

In order to simulate blocking scenarios, i.e. when undesired signals are received by the sys-tem using budget simulations, functionality not native to VSS had to be implemented. Onemeasurement interesting for this simulation type is degradation. To accurately model degra-dation of a channel in a system, as many receiver impairments as possible needs to be takeninto account.

Increase in noise figure due to AGC attenuation can be implemented using available mea-surements built in to VSS. Estimation of phase noise can also be implemented with the help ofbuilt in measurements using the values in Table 3.1. IM3 signals generated from two signalscan also be estimated using built in measurements of IP3. Undesired spurious response fromthe IQ demodulator was not as easily implemented however. With the help of scripting usingVSS scripting editor, these mixer products can be estimated and taken into account for whenmeasuring Degradation.

ADC impairments such as sampling, aliasing and jitter were not implemented in the linkbudget simulation platform since these parameters only makes sense in a time domain sim-ulation. The exception being jitter which could be implemented using some more advancedscripting.

Impairment implementation for the time domain simulation platform

Unlike the budget simulation, the resulting degradation can be calculated with the help ofpower measurements in each channel. The time domain engine takes all impairments intoaccount listed in Section 1.2 except for ADC jitter since a simpler version of the ADC wasimplemented. This was due to simulation times being affected by the delta-sigma ADC.

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ADC sampling and aliasing are all taken into account for since finite sampling frequency anddecimation are used.

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4 Results

The results of the project are presented in this chapter. This includes implemented function-ality along with simulation examples from the AWR project documents.

4.1 Simulation platform results

Functionality

The AWR project ended up containing two different simulation platforms. The core function-ality includes:

• Temperature dependency

• Frequency dependency

• Gain calibration

• AGC

• IQ imbalance

• User specified M x N mixer behavior

• User specified phase noise

• Budget simulation platform

– Gain, Noise Figure, P1dB and IP3 measurements

– Blocking scenarios

– Yield analysis

• Time domain simulation platform

– Digital interface for channel filtering

– Blocking scenarios

– Spectrum analysis

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The project aimed to implement PLL functionality and a proper ADC model as well, butthis was not achieved, however the other goals of the project listed in Section 1.2 were. Thefunctionality can also be extended to include other types of measurements with the givensimulation platforms.

Link budget simulation platform

The contents of the template document for link budget simulations is presented in Fig. 4.1.The design philosophy, as in the other template documents to let the user choose receiverlineup and specify parameters relevant to the simulation in question. In the case of budgetsimulations, these are signal, VGA/AGC parameters and gain calibration. Budget simula-tions are performed between the input and the output of the DUT.

The link budget simulation platform uses yield parameters in each component in the RXlineup (Fig. 3.2). This means that process variations in each components are modelled withstatistical distributions, for example uniform, Gaussian and log-normal distributions. Thisfeature can be to simulate statistical variations in system parameters. This is not included inthe time domain simulation platform.

Figure 4.1: Budget setup

The budget simulation compensate for variations in power by a PID-controlled gain cal-ibration block as shown in Fig. 3.9. The budget simulations use the PID version of the gaincalibration since the VSS PID block simulates steady state when budget simulations are used.This is suitable for budget simulations since they are time independent and only performcalculations on the boundary conditions of the system. The PID block also supports time do-main simulations, but when implemented in those types of systems, the transient time of thecontroller causes the simulation time to increase drastically which is undesirable for a realtime simulation platform.

Time domain simulation platform

The time domain simulation platform includes the analog receiver lineup, gain correctionand FIR filter branches to simulate system parameters, and to visualize the spectrum of thechannel. The current system diagram in this platform is a demonstration of blocking signalscenarios. The user can specify an unwanted signal and see the resulting spectrum in thechannel with and without this signal. Degradation measurements are also performed. Thesystem diagrams present in the time domain simulation platform are presented in Fig. 4.2and Fig. 4.3.

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Figure 4.2: Time domain simulation platform - Blocking signal and noise source

Figure 4.3: Time domain simulation platform - Noise source

Gain correction for AGC is also included for time-domain simulations. Gain correction isa digital operation used to compensate for attenuation from AGC When a VGA attenuatoris turned on inside the analog RX block, the corresponding amplifier is turned on inside thegain correction block. In real systems, this operation is performed digitally after the ADC inorder to an extent achieve constant system gain. The system diagram for the gain correctionoperation is presented if Fig. 4.4.

Figure 4.4: Time domain simulation platform - Gain correction system diagram

The gain calibration system used in the time domain simulation platform is equationbased as seen in Fig. 3.8. This is an entirely equation based system and is used becausethe PID version of the gain calibration was considered too slow when implemented in timedomain simulations.

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ADC

The ADC model chosen is the same for both simulation platforms. It is a VSS amplifier blockwith 0 gain and ADC parameters such as IP3 and NF specified. This results in a simplegeneral component without the ADC characteristics such as jitter.

Feedback AGC

The power of the signal and the measured power by the AGC is plotted in Fig. 4.5. The powerlevel of the signal is what the AGC uses to trigger the control signals of the VGAs as shownin Fig. 4.6.

Figure 4.5: Power measurements of feedback AGC. Blue: Instant power in channel. Pink:measured power

The power meter block used to measure the power of the channel measures the averagepower and outputs it as a voltage for the AGC to use as input. Because it is an average, thereis a slight delay in the measurements, adding to the time it takes to simulate and making it sothat the response is not instant, as seen in Fig. 4.5. In the blue plot, three VGAs are triggered,reducing the power each time.

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Figure 4.6: Activation of control signals for the feedback AGC

The control signals are triggered and released dependent on if the measured power ex-ceeds the user specified trigger and hysteresis levels of the individual VGAs. In the caseof Fig. 4.6, three VGAs are triggered, at the 100 ns, 1100 ns, and 2100 ns respectively. Thecorresponding power level can be seen in Fig. 4.5 at the same time stamps.

Simulation times

In Tables 4.1 and 4.2, simulation time results are presented for the budget and the time do-main platform with a few different settings. In Table 4.1, number of sweeps as well as gaincalibration method are varied. Since there is only one AGC method (Equation based) usedfor the budget platform, these are the only parameters that the user can vary for differentresults. We find that using equation based gain calibration will improve simulation times,with the downside that yield analysis using the AWR built in tool cannot be performed inthis configuration.

Table 4.1: Simulation times - Budget platform

Simulation type Gain calibration No. of sweeps Time (s)

Budget (Cascaded) PID block 4 3.29Budget (Power Sweep) PID block 41 33.10Budget (Yield) PID block 404 303.18Budget (Blocking) PID block 41 60.48Budget (Cascaded) Equation based 4 0.24Budget (Power Sweep) Equation based 41 1.07Budget (Yield) Equation based - -Budget (Blocking) Equation based 41 2.84

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The time domain platform contains more parameters that can be varied unlike the budgetplatform such as simulation stop time and sampling rate. For the sake of keeping things sim-ple, sampling rate is kept constant for all simulations and only one gain calibration method isused (equation based). Table 4.2 clearly shows that when the feedback loop AGC is included,simulation times are negatively impacted. The simulation stop time setting is also importantfor total simulation time. Having a longer simulation stop time will give a more accurate rep-resentation of the output spectrum of the signal. The downside is a longer total simulationtime.

Table 4.2: Simulation times - Time Domain platform

Simulation type AGC Simulation stop time (ms) No. of sweeps Time (s)

Time Domain Equation based 1.25 1 37.48Time Domain Feedback loop 1.25 1 370.77Time Domain Equation based 0.5 17 362.06Time Domain Feedback loop 0.5 17 3962.91

These results might vary depending on which computer is running the simulation. Simu-lation times can also vary from simulation to simulation. The results presented in this sectionshould therefore be interpreted relative to each other. They should give an idea of how sim-ulation configuration parameters can impact simulation times.

4.2 Budget simulations

The user is presented with simulations for cascaded parameters and power sweeps. The userinterface for simulated cascaded parameters is presented in Fig. 4.7 and for power sweeps inFig. 4.8. The main difference between cascaded simulations and power sweep simulationsis that cascaded simulations plot block contributions as the x-axis, while power sweeps useinput power as x-axis.

Figure 4.7: User interface for cascaded parameter simulations

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Figure 4.8: User interface for power sweep simulations

Degradation measurements were obtained by adding impairments from gain compres-sion, AGC attenuation, mixer MxN behavior, IP3 and LO phase noise. Degradation resultswith LO phase noise from a blocking signal 20 MHz and 70 MHz from channel center fre-quency are presented in Fig. 4.9.

Figure 4.9: Degradation simulation with budget simulation platform. Left: Blocking signal 20MHz from channel. Right: Blocking signal 70 MHz from channel.

Gain calibration

Gain calibration in the budget document uses a PID model to control the attenuation level ofa VGA. The user can set a variable to ON/OFF to control this function. With gain calibrationturned off, the VGA gain level is constantly set to 0 dB. The cascaded gain of the receiverlineup with gain calibration turned off is presented in Fig. 4.10. Fig. 4.11 shown the resultswhen gain calibration turned on. Gain calibration target level was set to 28 dB.

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Figure 4.10: Cascaded gain with gain calibration turned off

Figure 4.11: Cascaded gain with gain calibration turned on

AGC

AGC functionality in budget simulations uses the feed forward model presented in Section3.3. This function can be toggled by setting a variable to either ON/OFF. When AGC is turnedoff, the power sweep of system gain is presented in Fig. 4.12 and with AGC turned on in Fig.4.13.

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Figure 4.12: Gain power sweep with AGC turned off

Figure 4.13: Gain power sweep with AGC turned on

Yield analysis

Yield analysis can be performed to emulate process variations in components. If yield anal-ysis is performed, the result is presented as in Fig. 4.14. The faded blue lines represent thevarious yield sweeps and the one darker blue line in each graph is the nominal result.

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4.3. Time domain simulations

Figure 4.14: Yield analysis for cascaded parameter simulations

4.3 Time domain simulations

Since the time domain simulations was divided into two simulation platforms, the results arepresented alongside its respective simulations. The channel spectrum simulation results con-tain the in- and out-spectrum of the DUT and the spectrum of each digital channel. This canbe seen in Fig. 4.15. In each of the graphs presented, there is brown and pink spectrum. Thepink spectrum represents the spectrum of each measured point with only the thermal noise,while the brown spectrum is the measurements taken at the same place but with blockingsignal as well as noise. This is to show how the blocking signal affects each channel. Eventhough the signal does not hit the channel, it clearly affects the noise floor as seen in Fig. 4.15

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Figure 4.15: Time domain channel simulation results. Channels: 10 MHz, 5 MHz, 3 MHz andthe in- and out-spectrum. Blocking signal 20 MHz from channel. Channel at center frequency.

The graphs presented as the results of the degradation simulations are presented in Fig.4.16, Fig. 4.17, Fig. 4.18 and Fig. 4.19. Degradation is a measurement of how a channel isaffected by interference with respect to the same channel without interference.

Figure 4.16: Output spectrum with blocking signal 70 MHz from channel. Channel at centerfrequency.

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Figure 4.17: Channel degradation with blocking signal 70 MHz from channel. Left: Timedomain simulation. Right: Budget simulation.

Figure 4.18: Output spectrum with blocking signal 20 MHz from channel. Channel at centerfrequency, with LO-phase noise on signal and intermodulation spurios interferers.

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Figure 4.19: Channel degradation with blocking signal 20 MHz from channel. Left: Timedomain simulation. Right: Budget simulation.

If spurious effects from the IQ demodulator land in the channel, the degradation becomesmore evident than in the cases only affected by noise increase from AGC attenuation andphase noise. This is presented in Fig. 4.20. Here, we see a mixer product falling inside the 10MHz channel, but not in the 3 MHz and 5 MHz channels.

Figure 4.20: Channel degradation with mixer product in channel. Left: Channel filter spec-trum with mixer product from blocking signal. Right: Channel degradation with mixer prod-uct from blocking signal.

Digital interface

The digital interface is the block after the gain correction block in the schematics. In the realsystem, the gain correction is done digitally in the digital IC and is therefore everything postADC in the DUT. The digital interface consists of three channels with different channel FIR-filters. The filter lineups are presented in Fig. 3.15.

The resulting spectrum graphs from the filter lineups are presented in Fig. 4.21, Fig. 4.22and Fig. 4.23. These show the different filter characteristics as well as the resulting channelfilter output marked in black.

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Figure 4.21: Input spectrum of the digital interface - 3 MHz channel

Figure 4.22: Input spectrum of the digital interface - 5 MHz channel

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Figure 4.23: Input spectrum of the digital interface - 10 MHz channel

These three spectral graphs above show the narrowing down of the digital filters to the in-dividual channels, marked in black, and the correct channel widths. each of the three figurescorresponds to a different channel with different widths and the coloured graphs representsthe filters in the filter chain of the channel. the first filter is the widest and the last in the chainis the most narrow as the signal propagates through the chain and is decimated and filteredin each step down to the final channel filter.

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5 Discussion

In the discussion part of the thesis, the result, method and work as a whole is analyzed to seewhat compromises and decisions were made. What could be improved or done differentlywill also be discussed as well as a reflection on the subject and its wider context, applicationsand where it could go from here.

5.1 Results

The results obtained from this project are not necessarily only what is shown in the graphs,but more the presentation and simulation setups that provide the results. The result is ratherthe set of functions included in the VSS project. Using the simulation platforms and modelsas a template for further work, a user can test various receiver lineups in this environmentfor system-level simulations in a more ”easy to understand” manner compared to previoussimulation tools.

However, not all functionalities from the project description were included in the finalAWR projects. This mainly includes functioning ADC models, which has an effect on thereliability of the simulation results. There are a number of design choices for modellingfunctionality such as gain calibration and AGC that have limitations. This will be furtherdiscussed in Section 5.2.

Since VSS is not a perfect platform, there are some functions that cannot be implementedthat might become possible to do if National Instruments is given feedback on the platform.For example, the component parameters (such as gain, NF, IP3 etc.) in the lineup are specifieddifferently in the time domain simulation platforms and in the budget one. This is because ofhow yield analysis is implemented in VSS. Since yield analysis is not practically possible intime domain it is only implemented in the budget platform.

The issue is that component parameter specified with variables rather than numbers can-not be used for yield analysis. This was one of the reasons why the simulation platform wassplit up in two project files, budget and time domain.

Since the project aimed to examine the possibilities to use VSS as a simulation tool forRF design that could be more user friendly than previous versions, how well the results aredepends not only on the accuracy of the simulations but on the simulation times and the us-ability of the system. In regards to the accuracy and usability, the platform performs verywell. However the simulation times varies with what version of the implemented gain cali-

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5.2. Method

bration systems and AGC is being used. This is however the reason there are two version ofeach implemented, in order to give options for the designer when performing simulations onthe receiver.

5.2 Method

Part of the process in designing this simulation platforms was the testing of different solutionsto various problems. The methodology was in many regards learning by doing what workedbest in VSS. Some solutions proved more suitable than others in regards to user friendlinessand simulation times. For example, three different AGC implementation methods and twodifferent gain calibration methods were tested and evaluated.

Compromises and decisions

It became apparent early in the project, that the scope of the project would become too bigif the project would include the TX-part of the radio link as first planed. This caused us tochange the project thesis and some of the research questions and focus more on RX. Becauseof the narrowing of the scope, more details in the RX-link were possible without making theproject to big. This shifted the scope slightly, more in the direction of time-domain simula-tions and higher accuracy in the results.

One of the first decisions made after some time of testing and implementing was that afully functional delta-sigma ADC would be more a burden than an asset. We tried differentsimple ADC:s and a fully functional feedback 1:st and 2:nd order delta-sigma. We got itto work, but implementing it with the different ADC impairments, would at best slow thesimulation down into non-usability due to the feedback nature of the ADC. The compromisemade was instead to solve the problem by implement a zero-gain amplifier block with theADC’s IP3, P1dB, NF and temperature dependency parameters. Using an amplifier block asan ADC model is a rough estimation of reality as it does not replicate the behavior of a realdelta-sigma ADC.

A decision regarding the layout of the simulation was reached to split up into two parts;budget and time domain. At first, the two simulation types were in the same project doc-ument but as the complexity of the two simulations increased, they were split up in twoproject files. The main advantage of the budget simulations are their fast simulation times.When the time domain simulation grew in complexity, the budget simulation times becameaffected due to it having to wait with the next step in the sweep for the time domain to finishup. More over, since the yield analysis tool built into VSS is only viable in budget simulationsand require the component parameters not specified as variables. This would mean that ifthey were to be used in the same document, the user would need to enable and disable a lotof measurements when doing each new simulation. There would also need to be double setsof component parameters to change in two different ways. The decision was then made toseparate the simulation types into two documents. Even though two simulation documentswould be an inconvenience, it would be a bigger inconvenience to try to fit everything into asingle document.

AGC functionality was implemented in three versions, with one of them being used inthe end. The first version of the AGC tested was a very simple AGC with four manuallycontrolled VGAs. This has the advantage of not slowing the simulation down since AGCstate is set manually before simulation run time. The disadvantage however is that it doesnot have threshold or hysteresis values and by being ON or OFF at the very start of eachsimulation, this AGC does not react dynamically to the signals or distortions propagatingthrough the system. This makes this version of the AGC to simple and a different version isneeded.

The next version of the AGC tested was a full time domain feedback AGC that measuresthe power of the system at the ADC input and triggered any one of the four VGAs. This

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5.3. Improvements

version contains all the functionality and behaviour needed. However, it is a complicatedsystem to understand, and most importantly of all, the simulation times become far too longfor any simulations to be practical for a designer as shown in Table. 4.2.

The third and final solution to the AGC problem was the equation based system thatwas described in Section 3.3. This version had good performance but lacked hysteresis andwas also relatively easy to use and fast to simulate. The issue with this version of AGCimplementation is that it assumes linear behavior over the full dynamic range of the system.As input signal strength increases, the system goes into compression and this affects linearity.This aspect is not taken into account. This version was finally implemented in both projects.

The implementation of the gain calibration was also iterated upon in three steps. Thesimplest model implemented was a VGA with a look up table that compensated for the tem-perature dependent gain shift. The implementation of this version was however not accurateand flexible enough to make it to the final version.

There were two different solutions implemented after the look up table. These two aredescribed in Section 3.3. The PID controlled gain calibration system is used in the budgetplatform since the VSS PID block instantly goes to a steady state, which is needed for budgetsimulations, since they assumes state and only simulates on the boundary condition of thesystem. this version is therefore not appropriate for time domain simulations. It is also notpossible to do gain calibration in steps of i.e., 0.1 dB which is desirable to model real systembehavior. For the Time domain platform, the most "real-life" accurate version of the gaincalibration is used. This version is viable because of the VSS function Round(X1, X2) thatenables the gain compensation step size. Both versions work well in their respective platform.It would be preferable to use the same version in both platform for ease of use and consequentdesigning.

5.3 Improvements

Since this simulation platform is brand new, it will act as a demonstration concept for whata VSS can do in terms of budget simulations. This platform can be iterated and built uponto achieve new functionality not present current tools. Some of these new improvementsmight even lead to new ways of looking at the radio systems and how to approach the designprocess of new radio links.

Right now, the resulting simulation platforms have modeled frequency dependency onlywith the help S-Parameter filter models and their effect on signals. Frequency dependencyhowever is an intrinsic part of each and every component, including traces and lines. Thiscould be modeled with the built in frequency dependency parameters in each blocks. Evenadding S-parameter blocks after the amplifiers and normalizing their gain would greatly in-crease the accuracy of the AGC. This however could give a higher entry level for usage andmake the gain harder and more time consuming to change if necessary.

While on the subject of the AGC, a more accurate time domain model of the AGC couldbe implemented if VSS started supporting that functionality natively.

As of the latest version of the VSS platform, the temperature dependency of the systemis modeled with linear interpolation between two temperature points. This however is notnecessarily accurate for all components and even so, the implementation of the temperaturedependency could be different. The linear interpolation could for example be implementedusing more than two points, to more accurately replicate temperature dependency in realcomponents.

An improvement to the digital part of the lineup is the addition of more signal types. Itis for example possible to add decimation filters for all LTE-channels of interest instead ofthe three general channel bandwidths as seen in this report in Fig. 4.21, Fig. 4.22 and Fig.4.23. The way filters are handled in the current version of the digital interface could also be

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improved with more accurate models of the filters. This would increase the accuracy of theresults even further.

In the current version of the project, the ADC at the end of the analog lineup is onlyrepresented as a zero gain amplifier block with noise, IP3, and P1dB impairments. This ishowever only the tip of the iceberg when it comes to the types of ADC impairments affectingan RF receiver, such as jitter due to the sampling clock signal. As mentioned in chapter:5.2 under compromises and decisions, the implemented delta-sigma ADC was too slow to use,however with another method of implementation, a more complex ADC could perhaps beput into place, that more accurately exhibits the true characteristics of an ADC.

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6 Conclusion

In this project, the possibility of implementation of a simulation platform for radio receiverdevelopment with focus on budget link evaluation was firstly investigated. The commercialAWR Design Environment with Visual System Simulator (VSS) were chosen to implementthe simulation platform, mainly due the fact that AWR allows customization of codes accord-ing to company requirements and specifications. The work included modeling of a receiverlineup with necessary functionalities so that that it would be a powerful tool to design com-plex systems such as modern receivers. In contrast to the existing simulation platform, thenew one should offer more opportunities to visualize the simulation results concerning differ-ent receiver impairments while being able to perform complex frequency- and time domainsimulations. The main idea was to utilize as many as possible of the built-in functions in VSSto create a more user-friendly experience for the radio designers than the current existingsimulation platforms provide, without compromises in complexity and accuracy.

It was shown that the VSS-environment offers the possibilities to create simulation plat-forms that are easy to understand and work with. Moreover, the VSS and the developedsimulation platform provided the grade of adaptability to the receiver architectures and to re-ceiver specifications as the company has required. Compromises because of usability turnedout to be few. The functionalities that were not natively supported by AWR VSS, were stillpossible to be implemented via a VBA scripting editor that is featured in the AWR envi-ronment. Making changes to this is not as intuitive as making changes in the VSS systemdiagrams, but a user performing simulations in the developed platform it is not required tomake changes to that part of the system in order to perform simulations, once the scriptswere implemented. Some problems were encountered in how the time-domain simulationsaffected the budget simulation run times when parameter sweep were performed. This leadto the decision to split the platform into two separate files that had different strengths andweaknesses e.g., a lack of yield analysis in time-domain and simpler input signals in the bud-get file.

Finally, the project clearly demonstrates the strengths of using a simulation environmentsuch as VSS when designing radio systems. It can provide fast, reliable receiver model imple-mentation and receiver simulations. Also, it was shown that using VSS and its customizationfeatures, actual receiver specification in terms of receiver architectures, receiver characteris-tics and individual block specifications can be modelled and simulations can be performed inan practical way with short run times while simulation results can be graphically presented

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and hence they can be easily interpreted. The developed receiver model has included the re-ceiver front-end, from the antenna to the ADC, including the AGC, gain calibration VGA anddown-converter as well as elements after the ADC such as digital gain correction and threeof the filter branches present in the digital signal processing unit of the modeled receiver.

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[2] Oscar Gustafsson. “Application Specific Integrated Circuits for Digital Signal Process-ing (TSTE87), Lecture 3”. In: Linköping University (January 2019).

[3] National Instruments. 2019. URL: https://www.awr.com/software/products/ni-awr-design-environment.

[4] National Instruments. 2019. URL: https : / / www . awr . com / serve / ni - awr -design-environment-brochure.

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