Computer Hardware Design Projects for Undergraduate Students

IEEE TRANSACTIONS ON EDUCATION, VOL. E-26, NO. 3, AUGUST 1983

Computer Hardware Design Projects for

-Undergraduate Students

CHARLES W. MERRIAM, SENIOR MEMBER, IEEE

Abstract-A laboratory-based approach is described for making a diver-sified set of computer hardware design projects available to large groupsof undergraduate students at a modest cost. Memory and input/outputfunctions are provided as common resources to groups of students usingeither minicomputer or microcomputer systems. These computersystems also serve vital functions of providing interactive operating andtesting aids to students, such as issWng prompts for actions by the stu-dents, loading internal secondary and external primary main memories,postmortem dumping of main memory, diagnosing input/output errors,and, in some cases, loading an external control memory. Students con-nect to this common-resource computer system via a programmablebidirectional parallel interface that was designed for the purpose ofimplementing communications between computing machines in a flexibleand low-cost manner.

I. INTRODUCTIONM,{INICOMPUTER systems, and more recently microcom-

puter systems, are available in most electrical andcomputer engineering departments for general use. Thesesystems also are employed frequently to offer design projectsin a laboratory setting for teaching software engineering topicssuch as operating systems. Interdata 6/16 and 7/16 minicom-puters, and associated input/output peripheral devices, havebeen used at the University of Rochester for these purposesfor some time.More recently, the need to offer laboratory-based undergrad-

uate instruction in hardware and firmware aspects of computerengineering has led to many novel uses for these minicomputers.The novel instructional uses for these rather simple and inexpen-sive minicomputers have been successful, in part, because ofthe following.

1) The incremental cost of hardware interfaces needed tomake secondary main memory and input/output functionsavailable as common resources for hardware and firmwareprojects is small.2) Microprogramming techniques have been incorporated

into the design ofthese interfaces so that they can be specializedto a wide variety of applications with minimal instructor timeand effort.3) The minicomputer systems and interfaces implement

many operational and testing functions that are essential for theefficient use of laboratory facilities by students.4) Access to these common resources is not needed for

much of the design and breadboarding phases of studenthardware design projects.

Manuscript received November 29, 1982; revised March 11, 1983.The author is with the Department of Electrical Engineering, Univer-

sity of Rochester, Rochester, NY 14627.

Although all experience at the University of Rochester hasbeen with Interdata 16-bit minicomputers, any other mini-computer or microcomputer system could be used, in principle,for these purposes if the system includes a standard bidirectionalparallel interface. Moreover, such a system could be used withminor changes to the microprogrammable interface describedbelow in the Appendix, if the standard system interface has16-bit parallel input and output channels.Logic and other circuitry designed by students is bread-

boarded by them in portable logic-design kits. Each logic-desigr kit includes

1) 5-V 4.5-W dc-power supply;2) four SK-10 sockets which provide a total of 512 pin

locations for dual in-line integrated-circuit packages and cableconnectors;3) eight toggle switches and two debounced pushbutton

switches;4) eight LED's.This portable logic-design kit is mounted in an attache case

of standard size, such as the one depicted in Wakerly [1, p. 31,so that breadboarding of circuitry can be accompllshed outsideof the computer laboratory at whatever location is convenientfor the student.Central campus computing facilities are also used by students

for preparing macrocode and, in some cases, microcode atremote locations outside the computer laboratory. A numberof language processors and computer simulators are maintainedon these central facilities for aiding instructors in preparingmicrocode for the interface and for aiding students in preparingtest code for their machines.Use of portable logic-design kits for breadboarding circuitry

and use of central campus computer facilities for code devel-opment result in an ability to assign a relatively large numberof students to each available laboratory station. Typically, tendesign teams ofstudents are assigned per laboratory station. Indesign projects where three-person design projects are formed,for example, the laboratory at the University of Rochester withtwo minicomputer systems would serve sixty students whowere engaged in term projects for an undergraduate course oncomputer organization.The reader should recognize that all facilities described here,

with the possible exception of the particular complement ofintegrated circuits used by students, were acquired for otherpurposes. Hence, these facilities may be regarded as virtuallycost free in the context of making computer hardware designprojects available to undergraduate students. For example,the logic-design kits mentioned above were acquired to teach

0018-9359/83/0800-0077$01.00 © 1983 IEEE

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logic design to large numbers of first-year students. Also, themicroprogrammable interface, which is described briefly inthe Appendix to this paper, was designed primarily for imple-menting a variety of experimental computing machines forresearch purposes in a low cost fashion.

II. PROJECTS WITH HARDWIRED CONTROL UNITSComputer design projects with hardwired control units are

assigned at the University of Rochester, in part for ABETaccreditation purposes, in a junior/senior course on computerorganization. Students have previously completed a courseon logic design and are assumed to have familiarity withnumerous SSI, MSI, and LSI integrated circuits from a singlelogic family such as TTL.The types and numbers of integrated circuits that a student

design team is typically given access to can be stocked forapproximately $200 per design team. The primary integratedcircuit ALU made available at the University of Rochester forCPU design projects is the SN74181; appropriate integratedcircuits for processor registers and combinational logic also aremade available to students.Such a complement of integrated circuits enables students to

design and construct a wide variety of machines having variousarchitectural forms, including accumulator, general register,storage-to-storage, and stack machines. Students also have somefamiliarity with basic notions of computer architecture beforethey enroll in this course on computer organization.Students are formed into either two-person or three-person

design teams, depending upon the complexity of the centralprocessing unit that they will be expected to design. Corre-spondingly, a design team eventually will be allocated two orthree logic-design kits so that each student will be responsiblefor circuitry in the equivalent of one logic-design kit.

A. Machine SpecificationsComputer design projects then are posed to students in terms

of various architectural and physical constraints. Beyondsatisfying these constraints, students are encouraged to be asinnovative as time permits.1) Architectural Constraints: Typical architectural con-

straints that must be satisfied may includea) data word-length of 8 bits for signed integers;b) two's complement representation of signed integers;c) word length of 10 bits for addressing 8-bit memory

words;d) data movement instructions between main memory and

the CPU;e) program control instructions, some of which must be

conditioned on program data and machine status;f) arithmetic instructions for signed integers, but not nec-

essarily machine instructions for multiply and divide;g) logical and shift instructions, sufficient to implement

field extraction, field insertion, and rotation of datawords;

h) input and output instructions, a pair of which must im-plement direct-memory-access input/output functions;

i) miscellaneous instructions such as halt, pause, and no-operation;

j) an ability to nest, to an unspecified depth, nonrecursivecalls to and returns from subroutines;

k) an ability to multiply and divide signed integers withcorrect single-length results, at least by software means.

A CPU designed by students to meet these architectural con-straints typically will have approximately 20 instructions.2) Physical Constraints: Typical physical constraints may

includea) the CPU and its front-panel controls meet the pin and

power constraints of either two or three logic-designkits, corresponding to design-team size;

b) the CPU and its front-panel controls can be constructedfrom the given complement of integrated circuits;

c) all interconnections between logic-design kits, includingthose involving the microprogrammable interface, bemade with 16-conductor ribbon cables that connect di-rectly to SK-10 sockets in the logic-design kits;

d) controls be incorporated into the CPU front panel fortesting and running the computer system, such as startand stop switches, switching to select one of a few dif-ferent sources of clock pulses, such as a manual pulserand a variable-frequency pulser, and switching forsingle-pulse, single-instruction, and perhaps even break-point memory-address modes of operation.

A CPU designed by students to meet these physical constraintstypically will, in fact, use all of the available pin locations.

B. Reporting RequirementsAn effort is made to both monitor and guide progress of

student design teams throughout the project via laboratorydemonstrations, conferences with each design team at appro-priate stages of the work, and laboratory bench testing of theirmachines when various phases of the work are complete. Inorder to accomplish this purpose, the work is divided into threedesign phases at the University of Rochester, plus a final reporton the design.1) Architectural Design Phase: The architectural design

phase of the project is mainly concerned with design ofthe CPUfrom the point of view of a systems programmer. Instructionformats and an instruction set must be selected. In addition,student design teams are required to formulate a register-trans-fer diagram so that they plan the registers and data pathsneeded for their CPU as soon as possible. This step is particu-larly useful in estimating circuit complexity of the machinebeing proposed and in getting the students to utilize all resourcesavailable to them via the microprogrammable interface.This phase of the project is completed by the submission of

a report and then a conference with an instructor.2) Phase ILogic Design: Phase I logic design is concerned

primarily with design of CPU front-panel controls, handshakelogic for communicating with the microprogrammable inter-face, and operational sequences needed to test and run themachine. In addition, the prototype ofan instruction sequenceris required, so that a variety of synchronization tests can bemade in the laboratory before the students are faced with thetask of making their completed machine run.This phase of the project is completed by the submission of

a report, a conference with an instructor, student wiring and

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MERRIAM: COMPUTER HARDWARE DESIGN PROJECTS

testing the corresponding circuitry, and then testing of thiscircuitry by an instructor in the laboratory.3) Phase IILogic Design: Phase II logic design involves

completion of the instruction-sequencer design, as well ascompleting logic design details for all registers and data paths.Although somewhat tedious, this phase of the project gener-ally proceeds smoothly, requiring little interaction with aninstructor.This last phase of the project is completed by submission of

a final report and then a laboratory demonstration by studentsof the execution of required software on their machines for aninstructor.

C Memory and Input/Output System SpecificationsSpecifications of the memory and input/output system used

for the design project outlined above involve considerable detail.A brief description of communication sequences used for thesecomputer design projects is given below; however, the readeris referred to [2] for complete details given out in a recentcourse.1) Functions: The interface, which is described briefly in

the Appendixes to this paper, is microprogrammed, and corre-spondingly, the minicomputer service routine is programmedto implement, typically, the following eight functions.

1) Halt H is used to halt the computer system and to causethe minicomputer service routine to terminate after an inter-active postmortem dump of main memory.2) Restart R is used to implement a pause instruction for

the computer system.3) Memory fetch CM is used to transmit instructions and

data words to the CPU from the minicomputer memorysystem.4) Memory deposit MC is used to transmit data words from

the CPU to the minicomputer memory system.5) Memory input MI is used to implement direct-memory-

access input instructions by transmitting a block of data wordsfrom an input device to the memory of the minicomputersystem.6) Memory output OM is used to implement direct-memory-

access output instructions by transmitting a block of data wordsfrom memory to an output device of the minicomputer system.7) CPU input CI is used to implement input instructions by

transmitting a single data word from an input device of theminicomputer system to the CPU.

8) CPU output OC is used to implement output instructionsby transmitting a single data word from the CPU to an outputdevice of the minicomputer system.These eight functions permit implementation ofvirtually any

CPU instruction type.2) Communication Sequences: The aforementioned func-

tions ofthe memory and input/output system are implementedusing corresponding communication sequences. These se-quences are depicted by the state-transistion diagram given inFig. 1.Every communication sequence begins in state SI by trans-

mitting a 16-bit command word CMD from the CPU to themicroprogrammable interface and minicomputer system. An8-bit priority-encoded field of command word CMD identifies

L 1 = L24L3+L4 Iia.ai cond,tionsl

L2= H+R

L3= MC+MI+OM+OC+(CM+CI).LATCHL4= (CM+CI1)LATCH (ev.cJ3)

Fig. 1. State transitions for CPU design projects.

the particular function to be performed by the memory andinput/output system. Additional information, in the form ofan 8-bit Interdata-standard I/0-function code, is also trans-mitted in another field of command word CMD and is usedwith input/output functions MI, OM, CI, and OC.Functions H and R involve no additional communications

with the memory and input/output system, even though stateS2 is traversed as a cycle state in this case.Communication sequences for all functions other than H and

R next transmit a 16-bit input address word ADR from the CPUto the microprogrammable interface and minicomputer systemusing state S2. A field of address word ADR contains a 10-bitmain memory address. An additional field of ADR contains 2memory-control bits for requesting 8-bit and 16-bit data trans-missions, as well as similar transmissions of data with bytes inreversed positions. The remaining field of address word ADRcontains a 4-bit input /output device address for functions MI,OM, CI, and OC.

State S3 is used next to transmit either an input or an outputdata word WRD for all functions other than H and R. Inputdata words from the CPU to the minicomputer memory andinput/output system occur for functions MC, MI, OM, and OC.Output data words from the minicomputer memory andinput/output system to the CPU occur for functions CM andCI. Word WRD transmits either 8-bit or 16-bit data for func-tions MC, CM, OC, and CI, whereas word WRD transmits a10-bit byte-count for direct-memory-access functions OM andMI.

Last, state S4 is used, only when output data words for func-tions CM and CI are to be latched into register LDOC for eitherinstruction decoding or addressing external memories.

D. Typical Computers Designed by StudentsComputers designed by two- and three-person design teams

of students exhibit widely varying architectural and organiza-tional characteristics, so general statements about these com-puters are not particularly meaningful. A typical student

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computer, however, has a general-purpose set ofapproximately24 instructions which support software multiply and divideroutines, nesting of subroutine calls and retums, and a varietyof input/output functions.A computer system designed by three students and repre-

sentative of the above general statements is pictured in Fig. 2.Layout and wiring in two of the three logic-design kits used bythis student design team are also pictured in Fig. 3.Samples of representative student work are maintained at

the University of Rochester in the form of a file of final reportswhich can be made available on a limited basis upon request tothe author.

III. PROJECTS WITH MICROPROGRAMMED CONTROL UNITS

Computer design projects, such as described in the previoussection, can be easily modified by replacing the implicit require-ment for a hardwired control unit by an explicit requirementfor a microprogrammed control unit. This modification ispossible because output register DOC, latched output registerLDOC, and write-enable signal WE are readily available to theuser for loading external memories under control of the mini-computer service routine. Loading of external memories occursat the same time that microcode is being loaded into the micro-programmable interface.Few other changes in the computer design project described

in the previous section are required for microprogrammedcontrol units. At the University of Rochester, the changes usedare as follows.

1) An additional logic-design kit is made available for con-structing an external memory.2) Six RAM's, each with 256 4-bit words, are added to the

complement of available integrated circuits.3) A Signetics 8X02 control-memory sequencer is added to

the complement of available integrated circuits.Students can, of course, be expected to design and construct

more extensive instruction sets, particularly from the point ofview of incorporating additional addressing modes, when amicroprogrammed control unit is employed. Phase I logicdesign is also somewhat more complicated because a controlmemory must be successfully loaded as part of prototypingan instruction sequencer. In addition, symbolic micropro-gramming techniques are useful during Phase II logic design. Atthe University of Rochester, a general-purpose microassembler,such as the one described by [3], is available on central campuscomputing facilities for preparation of student microcode, butuse of the microassembler is not required.Computer design projects with microprogrammed control

units are assigned at the University of Rochester either ashonors projects for undergraduate students or projects forgraduate students who are enrolled in the first course on com-puter organization.

IV. PROJECTS WITH MICROPROCESSORS

Computer design projects with 8- and 16-bit microprocessorscan also be readily installed using the microprogrammableinterface pictured in Fig. 8. However, special-purpose circuitryrequired to decode microprocessor control lines generallydictates that, as part of the project, students design an inter-

Fig. 2. A typical student computer system.

Fig. 3. Partial layout of the student computer system.

face front-panel for the particular microprocessor being used.Moreover, full utilization of microprocessor input/outputinstructions generally dictates that, as an additional part ofthe design project, students write a service routine for imple-mentation of the memory and input/output system on aminicomputer. The third part of these design projects withmicroprocessors involves writing microcode for the micro-programmable interface that specifies state sequences requiredfor communications between the microprocessor and thememory and input/output system.These three-part design projects are best suited for more

advanced students who have acquired some previous experiencein computer hardware and software design. At the Universityof Rochester, seniors undertake these design projects withmicroprocessors, under registration in a special projects coursefor which normal course credit is given.Computer design projects with microprocessors offer students

an excellent opportunity to design a complete system encom-passing hardware, firmware, and software. Moreover, the costofthese design projects is minimal because the integrated-circuitpackages involved typically require less than one logic-designkit. Fully successful design projects can also be used to aug-ment computer laboratory facilities because the interface

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front-panel designed by the student, plus the correspondinginterface microcode and minicomputer service routine, consti-tute a very low-cost macrocode prototyping system for manyapplications of the microprocessor used in the design.An example of a microprocessor prototyping system designed

in this manner is pictured in Fig. 4. This particular prototypingsystem is based on the Signetics 2650 microprocessor whichwas selected for convenience because

1) only a single 5 V power supply is required;2) only a single-phase TTL-compatible clock is required;3) the microprocessor is implemented with static RAM

throughout so that there is no minimum clock frequency;4) microprocessor handshake lines are convenient for inter-

facing with asynchronous memory and input/output systems.A brief summary of this microprocessor prototyping system

is given below, and the reader is referred to [4] for completedetails.The hardware-design portion of this project resulted in 16

integrated-circuit packages, in addition to the 2650 micropro-cessor, which are mounted on the back side of the front panelpictured in Fig. 4. Convenient controls are also included onthe front panel, such as controls for selecting automatic andmanual clocks and for inducing a single-instruction mode ofoperation. Serial input and output lines to and from the 2650microprocessor are made available to the user via a 16-pinconnector mounted on the front panel. In a similar fashion,an 8-bit branch-address interrupt-vector for the microprocessorcan also be supplied by the user via the front panel.The software-design portion of the project primarily involves

decisions concerning main-memory size and utilization ofmicroprocessor input/output instructions. In the case of the2650 microprocessor, main memory was selected to have 40968-bit words, and all but one microprocessor input instructionwas utilized. The resulting prototyping system is very powerful,particularly from an input/output-system point of view.The firmware-design portion of the project typically results

in only 12 lines of interface microcode, but is indeed challeng-ing because the student must implement in firmware handshakelogic for communications between two asynchronous coop-erating processes. A typical state-transition diagram for thispurpose is shown in Fig. 5 where

1) state S corresponds to the contents of register S in themicroprogrammable interface;2) WAIT/RUN is a wait-run status line from the 2650

microprocessor;3) M/IO is a memory-input/output request line from the

2650 microprocessor;4) INTACK is an interrupt-acknowledge line from the

2650 microprocessor;5) OPREQ is an operation request line from the 2650

microprocessor which is activated whenever M/IO and INTACKare valid and stable;6) OPACK is an operation-acknowledge line to the 2650

microprocessor which is activated when either the requestedmemory-input/output operation is complete or a branch-address interrupt-vector is valid and stable;7) El is a line to enable the input channel of the micropro-

grammable interface; and

Fig. 4. Interface with the 2650 front panel.

EO 9,2 El 8,2) / n = S

N5 M/10

8 N8 OPREQ

F 8.3) N90= WAIT/RUNN%T = INTACK

F, = OPACKN8

Fig. 5. State transitions for handshaking with the 2650 microprocessor.

8) EO is a line to enable the output channel of the micro-programmable interface.This state-transition diagram includes three loops for respec-

tively executing 2650 instructions (i.e., the loop including waitstate 8,3), decoding the 2650 halt instruction and a front-panelinduced pause for the single-instruction mode (i.e., the loopincluding wait state 16, 3), and vectoring interrupt branch-addresses (i.e., the loop including wait state 16, 1).When a microprocessor prototyping system such as the one

described here is added to the computer laboratory facility atthe University of Rochester, an assembler is also placed oncentral campus computing facilities for use by students in pre-paring source macrocode for the microprocessor in question.For the 2650 microprocessor, see [5] for details. A function

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ofthe minicomputer service routine for the prototyping systemis to decode from a transportable medium the object macrocodeproduced by the assembler, and then load the code into mainmemory in the computer laboratory.

V. CONCLUSIONSUse of a suitably designed microprogrammable interface and

either a minicomputer or microcomputer system for providingmemory and input/output as a shared resource offers a low-cost approach to providing computer design projects for a largenumber of students. These computer design projects can beeasily set up by instructors and varied substantially from timeto time as appropriate. Moreover, these projects either can bedirected to specific aspects of computer design, such as hard-wired or microprogrammed control units, or can be directedto more general aspects of computer system design using micro-processors, including the interaction between hardware, firm-ware, and software.Experience at the University of Rochester has shown that the

key to high success rates by students with these design projectsis intensive interaction between students and instructors duringearly stages of the projects. Laboratory demonstrations byinstructors, laboratory simulations of critical operational func-tions by students, and student reporting to and conferenceswith instructors have been particularly effective in this regard.This form of intensive interaction between students and in-structors also offers a unique opportunity to teach studentshow to plan design projects for the purpose of readily testingand evaluating performance of their machines, as well asteaching them many details about computer design.

APPENDIX AMICROPROGRAMMABLE INTERFACE

An interface was designed at the University of Rochester forthe purpose of implementing secondary main memory andinput/output systems as common resources for a variety ofcomputer hardware design and research projects. This interfacesequences bidirectional data communications to and from theuser, who may be a student such as in the applications describedabove.Data transfer is parallel, involving up to 16 bits per transfer.

Data-communication sequences, as well as control signals to theuser, are determined by the instructor using microprogrammingtechniques for each type of design project. Correspondingly,the instructor also provides an appropriate minicomputer ormicrocomputer service routine that responds to requests forsecondary main memory and input/output service by the com-puter systems. These service routines also implement thenecessary function of loading microcode into RAM microstoreof the interface as need be. Standard high-level and assembly-language programming techniques are used to write these serviceroutines which are, therefore, not discussed further in thispaper.A brief description of this microprogrammable interface

is given in the next four sections; complete details are available

A. Data TransferData transfer between the user and the minicomputer or

microcomputer system is depicted in Fig. 6 for the interfaceused at the University of Rochester.Input register DIC is used for data transmissions from the

user to the minicomputer memory and input/output systems.

Inputs to register DIC are 4-to-I data-selected independentlyfor high-order and low-order bytes. Data selection for theseinputs is under microprogram control using internal controlsignals BH, AH, BL, and AL. This rather flexible form ofinputdata selection is intended to eliminate as much data-selectioncircuitry as possible, which otherwise would have to be repli-

cated by each user.

Output register DOC is actually located in the Interdata inter-face and is always used for output data transmissions from theminicomputer memory and input/output system to the user.

Auxiliary output register LDOC can- also be utilized undermicroprogram control, using internal control signal LATCH as

a latch register for purposes such as addressing external memo-ries or decoding instructions. Inclusion of register LDOC inthe microprogrammable interface again is intended to eliminateas much simple circuit replication by users as possible.

B. Control-Data TransferInterface control is accomplished by microcode stored in the

interface and status input signals from the user. Organizationof the control structure used is depicted in Fig. 7.Control store CS consists of 1024 24-bit words and is ad-

dressed using outputs of 10-bit state register S. Register S isimplemented with master-slave flip-flops and with five of itsinputs formed directly by data-output signals from the RAMcontrol store CS. The other five inputs to register S, one ofwhich is 8-to-1 data selected under microprogram controlusing internal control signals C, B, and A, function as statusinput signals from the user. Each of the five flip-flops instate register S corresponding to user status signals can beindependently clocked under microprogram control using fiveintemal control signals. This simple control structure, there-fore, resembles the Wilkes scheme for implementing a micro-programmed controller, such as described in [7, pp. 469-470].Outputs of state register S and their complements are

accessible by the user as control output signals from the inter-face. In addition, microprogramming by the instructor may beused to form an arbitrary 4-bit switching function F of outputsof the 10-bit state register S for control purposes by the user.

C. HandshakingHandshake signals for the user are also depicted in Fig. 7.Interface input signals RUN, STP, CLK, and PLS from the

user form the S (i.e., set), M (i.e., mode), C (i.e., clock), andR (i.e., reset) inputs, respectively, to an SN74120 pulsesynchronizer in the interface. See, for instance, [8, pp. 658-6611 for a description of this integrated circuit. Use of anintegrated-circuit pulse synchronizer results in reliable clockingof the interface under a variety of circumstances typically

in [6].

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encountered during user testing and running of the interface.


INTER DATA

Fig. 6. Data transfer in the interface.

Fig. 7. Control-data transfer in the interface.

Interface output status signals IDR (i.e., input data received),ODA (i.e., output data available), and B/D (i.e., busy/done)are used most frequently by the user in order to handshakeproperly with the interface. The interface is in its done state(i.e., with B/D low) and is ready to be clocked when and onlywhen both IDR and ODA are high. Clock pulses are ignoredwhen the interface is in its busy state (i.e., with B/D high).

In a typical situation, the user need only use RUN and B/Din the level-mode sense for handshaking purposes. However,the user must assume that all secondary main memory andinput/output operations performed by the minicomputerrequire an indeterminant amount of time, and hence fallingedges of status signal B/D must be regarded as asynchronous

events. External main and control memories, on the otherhand, can be clocked synchronously up to a 2 MHz rate.

D. Front Panel

The microprogrammable interface built at the University ofRochester is shown in Fig. 8 without a blank front panel, butin a fully functional condition. All user connections are madeusing the 13 16-pin connectors mounted on the right of thecircuit board. All outputs to the user are buffered with linedrivers so that a certain amount of accidental abuse by theuser, such as short circuits, can be tolerated by the interface.In a similar fashion, all input signals from the user are con-

ditioned by hne receivers with hysteresis inputs in order to

T83


S W _ _ _ _ _ _

.

Fig. 8. Interface without a front panel.

improve noise margins. These precautions permit from 0 to2 MHz clock rates using 2-3 ft unshielded cables between theinterface and users.Switches RUN (i.e., for running the interface in the mode

depicted in Figs. 6 and 7), LOAD (i.e., for loading microcodeinto the interface under control of a minicomputer serviceroutine), and CLEAR (i.e., for clearing flip-flops in stateregister S) are mounted on the front panel at the bottom ofthe interface shown in Fig. 8, for control purposes. In addi-tion to LED's IN, OUT, and LATCH (which are microcodedintemal control signals for activating the input channel, acti-vating the output channel, and latching register LDOC, respec-tively), 12 1 6-pin connectors are mounted on the front panelin order to allow the user to probe nearly every logic signalin the interface. Each connector is wired with 5 V and eightlogic signals that are outputs of open-collector inverter gates.A series combination of a pull-up resister and LED can thenbe connected between each 5 V logic-signal pair of pins neededfor diagnostic purposes. This probing arrangement constitutesa very low-cost way to give users access to whatever signals aredeemed helpful during the testing of their hardware. Moreover,these logic probes can be moved during power-on operationswithout danger of causing contact static that otherwise mightupset operation of the interface.

APPENDIX BFRONT PANELS FOR MICROPROGRAMMABLE INTERFACEThe microprogrammable interface designed at the University

of Rochester was intended for a variety of applications. Thepenalty for the generality of this device from the user's pointof view is a corresponding lack of simplifying special-purposecircuitry for any given application. This problem is circum-vented by adding special-purpose front panels to the micropro-grammable interface, as pictured in Fig. 8, corresponding tovarious applications.The microprogrammable interface is also pictured in Fig. 9,

with a front panel added for a typical application. Circuitryfor this particular front panel consists of an additional sevenintegrated-circuit packages which are mounted on the back

Fig. 9. Interface with the CPU front panel.

Fig. 10. A complete computer system for demonstration purposes.

side of the front panel. Complete details for this particularfront panel are available in [9], and applications of the frontpanel pictured in Fig. 9 were described briefly in previoussections on pertinent student design projects.Specialized circuitries built into front panels, such as the one

pictured in Fig. 9, serve a number of functions in conjunctionwith corresponding interface microcode; for example, they

1) specify particular communication sequences to beemployed by the user for the application;2) include LED's which indicate to users the states that

correspond to these communication sequences;3) decode user input signals which control the interface and

the minicomputer memory and input/output system so thatusers are permitted as many don't-care conditions as possible;4) minirnize the number of user connectors.These last two functions of front panels greatly decrease the

amount of external hardware that must be made available toeach user. For example, the complete computer systempictured in Fig. 10 has a general-purpose set of 16 instructionsthat can be easily implemented with two logic-design kits usedby students.

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REFERENCES

J. F. Wakerly, Logic Design Projects Using Standard IntegratedCircuits. New York: Wiley, 1976.C. W. Merriam, "Memory and I/O system specifications for CPUdesign projects," Univ. Rochester, Rochester, NY, 1982.Signetics Micro Assembler Reference Manual, Signetics, Sunnyvale,CA, 1977.C. W. Merriam, "UR2650 microprocessor prototyping system,"Univ. Rochester, Rochester, NY, 1980.Signetics Microprocessor 2650, Signetics, Sunnyvale, CA, 1975.C. W. Merriam, "UR port," Univ. Rochester, Rochester, NY,1980.A. M. Abd-alla and A. C. Meltzer, Principles ofDigital ComputerDesign, vol. 1. Englewood Cliffs, NJ: Prentice-Hail, 1976.W. l. Fletcher, An Engineering Approach to Digital Design. Engle-wood Cliffs, NJ: Prentice-Hall, 1980.C. W. Merriam, "UR CPU interface," Univ. Rochester, Rochester,NY, 1980.

Charles W. Merriam (M'59-SM'73) was born inBirmingham, AL, on March 31, 1931. Hereceived the Sc.B. degree (cum laude) inengineering from Brown University, Providence,RI, and the M.S. and Sc.D. degrees from theMassachusetts Institute of Technology, Cam-bridge, in 1955 and 1958, respectively.He was an Assistant Professor of Electrical

Engineering at the Massachusetts Institute ofTechnology from 1958 to 1962, but he took aleave of absence from M.I.T. in 1959 to join

the General Electric Research Laboratory where he remained until1964. From 1964 to 1971 he was a Professor of Electrical Engineeringat Cornell University, Ithaca, NY. In 1971 he became Professor andChairman of the Department of Electrical Engineering at the Universityof Rochester, Rochester, NY. Since relinquishing the Chairmanship in1980, he has continued his teaching and research interests at the Uni-versity of Rochester in computer organization and computer applicationsto control and image-processing problems. He has published four booksand has consulted for numerous companies in the area of computerapplications to control-system design.

Microprocessor-Based Projects at WorcesterPolytechnic Institute

FREDERICK J. LOOFT, MEMBER, IEEE, AND WILHELM H. EGGIMANN, MEMBER, IEEE

Abs'mwt-Worcester Polytechnic Institute (WPI), Worcester, MA, hasan unusual educational environment based, in part, on the successfulcompletion of a substantial project by each student in his/her major field.To meet the microprocessor (,uP) computational needs ofgraduate thesisstudents and undergraduate project students in the Department of Elec-trical Engineering and Biomedical Engineering, several reusable 8085-based uP systems have been developed for project applications. Thesupport and use of these systems is described within the context of therequired undergraduate project and graduate thesis formaL FinaRy,several projects are described to ilustrate the wide range of applicationsand capabilities of our systems.

I. INTRODUCTION

W, tORCESTER Polytechnic Institute (WPI) has an unusualWeducational program based, in part, on the successful

completion of a project by each student in his/her major field[1]. This project, known as the Major Qualifying Project(MQP), is supported by the faculty of the various departmentswith equipment, technical support, and general project advicefor both on-campus and off-campus projects.The project requirement and the support of such projects

have presented problems other institutions rarely encounter atthe undergraduate level. The purpose ofthis paper is to describe

Manuscript received October 22, 1982; revised February 28, 1983.The authors are with the Worcester Polytechnic Institute, Worcester,

MA 01609.

how the Departments of Electrical Engineering (EE) and Bio-medical Engineering (BME) at WPI support microprocessor

(,uP) based MQPs. This support, including general jP systemand software development, is in several aspects significantlydifferent than that which is required for a structured laboratoryenvironment for which, presumably, most needs and problemsare foreseen and accounted. For contrast, a description ofvari-ous structured laboratory methods may be found in [3].

II. BACKGROUND

All undergraduates at WPI are required to complete an engi-neering project in their major area as one of their graduationrequirements. Within the Department of Electrical Engineering,approximately 20 percent of these projects are performed offcampus, supported by local industry, while the remainder are

student or faculty originated projects and are performed pri-marily on campus.

As part of the industry wide trend toward microprocessor-based equipment, we have been faced with an increasing needto support pP-based MQPs and M.S. theses. In past years, if astudent was involved with a project employing a pP, the projectwas either sponsored by a local company or originated througha WPI faculty research program. This latter situation was par-

ticularly true for BME projects performed at the University ofMassachusetts Medical Center (UMMC) Internship Center. Ineither case, the primary responsibility for documentation,hard-

0018-9359/83/0800-0085$01.00 1983 IEEE

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[4]

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Documents

Computer Hardware Design Projects for Undergraduate Students