Computer Arithmetic

1

Arithmetic & Logic Unit

• Does the calculations• Everything else in the computer is there to

service this unit• Handles integers• May handle floating point (real) numbers• May be separate FPU (maths co-processor)• May be on chip separate FPU (486DX +)

ALU Inputs and Outputs

Integer Representation

• Only have 0 & 1 to represent everything• Positive numbers stored in binary

—e.g. 41=00101001• No minus sign• No period• Sign-Magnitude• Two’s compliment

Sign-Magnitude Representation

• simplest form of representation• If the sign bit is 0, the number is positive.• if the sign bit is 1, the number is negative.• In an n-bit word, the rightmost bits hold the

magnitude of the integer.

Draw backs of Singed magnitude representation

Problems Need to consider both sign and magnitude

in arithmetic Two representations of zero (+0 and -0)

• sign-magnitude representation is rarely used inimplementing the integer portion of the ALU.

• the most common scheme is twos complement representation

Two’s complement Representation

• Uses the most significant bit as a sign bit, making it easy to test whether an integer is positive or negative

• Range of numbers to be represented -2n-1 to 2n-1-1

• Unlike signed magnitude, there is only a single representation for number 0

Complements(quick revision)

There are two types of complements for each base-r system: the radix complement and diminished radix complement.

Diminished Radix Complement - (r-1)’s Complement

Given a number N in base r having n digits, the (r–1)’s complement of N is defined as:

(rn –1) – N Example for 7-digit binary numbers:

1’s complement is (rn – 1) – N = (27–1)–N = 1111111–N1’s complement of 1011000 is 1111111–1011000 =

0100111 Observation:

Subtraction from (rn – 1) will never require a borrowDiminished radix complement can be computed digit-by-

digitFor binary: 1 – 0 = 1 and 1 – 1 = 0

Complements(revision)

• Radix Complement

• Example: Base-2

The r's complement of an n-digit number N in base r is defined as rn – N for N ≠ 0 and as 0 for N = 0. Comparing with the (r 1) 's complement, we note that the r's complement is obtained by adding 1 to the (r 1) 's complement, since rn – N = [(rn 1) – N] + 1.

The 2's complement of 1101100 is 0010100 The 2's complement of 0110111 is 1001001

• 2’s Complement (Radix Complement)—Take 1’s complement then add 1—Toggle all bits to the left of the first ‘1’ from the

rightExample:Number:1’s Comp.:

0 1 0 1 0 0 0 0

1 0 1 1 0 0 0 0

0 1 0 0 1 1 1 1

+ 1

OR

1 0 1 1 0 0 0 0

00001010

Two’s complement Representation(cont’d)

Two’s Compliment

• +3 = 00000011• +2 = 00000010• +1 = 00000001• +0 = 00000000• -1 = 11111111• -2 = 11111110• -3 = 11111101

Benefits

• One representation of zero• Arithmetic works easily • Negating is fairly easy

—3 = 00000011—Boolean complement gives 11111100—Add 1 to LSB 11111101

The Arithmetic with Complements

• Subtraction with Complements—The subtraction of two n-digit unsigned numbers M

– N in base r can be done as follows:

Complements• Example 1.7

—Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X – Y ; and (b) Y X, by using 2's complement.

There is no end carry. Therefore, the answer is Y – X = (2's complement of 1101111) = 0010001.

Negation Special Case 1

• 0 = 00000000• Bitwise not 11111111• Add 1 to LSB +1• Result 1 00000000• Overflow is ignored, so:• - 0 = 0

Negation Special Case 2

• -128 = 10000000• bitwise not 01111111• Add 1 to LSB +1• Result 10000000• So:• -(-128) = -128 X• Monitor MSB (sign bit)• It should change during negation

Range of Numbers

• 8 bit 2s compliment—+127 = 01111111 = 27 -1— -128 = 10000000 = -27

• 16 bit 2s compliment—+32767 = 011111111 11111111 = 215 - 1— -32768 = 100000000 00000000 = -215

Conversion Between Lengths

• Positive number pack with leading zeros• +18 = 00010010• +18 = 00000000 00010010• Negative numbers pack with leading ones• -18 = 111101110• -18 = 11111111 11011110• i.e. pack with MSB (sign bit)

Addition and Subtraction

• Normal binary addition• Monitor sign bit for overflow

• Take twos compliment of substahend and add to minuend—i.e. a - b = a + (-b)

• So we only need addition and complement circuits

Hardware for Addition and Subtraction

Multiplication

• Complex• Work out partial product for each digit• Take care with place value (column)• Add partial products

Multiplication Example

• 1011 Multiplicand (11 dec)• x 1101 Multiplier (13 dec)• 1011 Partial products• 0000 Note: if multiplier bit is 1 copy• 1011 multiplicand (place value)• 1011 otherwise zero• 10001111 Product (143 dec)• Note: need double length result

Unsigned Binary Multiplication

Execution of Example

Flowchart for Unsigned Binary Multiplication

Multiplying Negative Numbers

• This does not work!• Solution 1

—Convert to positive if required—Multiply as above—If signs were different, negate answer

• Solution 2—Booth’s algorithm

Booth’s Algorithm

• Booth algorithm gives a procedure for multiplying binary integers in signed –2’s complement representation.

• The algorithm shall be explained with the help of example

• Example, (2)ten x (- 4)ten • 0010 two * 1100 two

Step 1-Making The Booth Table

• I. From the two numbers, pick the number with the smallest difference between a series of consecutive numbers, and make it a multiplier.

• 0010 -- From 0 to 0 no change, 0 to 1 one change, 1 to 0 another change ,so there are two changes

• 1100 -- From 1 to 1 no change, 1 to 0 one change, 0 to 0 no change, so there is only one change on this one.

• Therefore, multiplication of 2 x (– 4), where 2ten (0010two) is the multiplicand and (– 4) ten (1100two) is the multiplier.

Step 1-cont’d

II. Let X = 1100 (multiplier) and Y = 0010 (multiplicand)

Take the 2’s complement of Y and call it –Y,= 1110

III. Load the Multiplier Register(M) value in the table.

IV. Load 0 for x-1 value it should be the previous first least significant bit of x

V. Load 0 in Upper and Lower Product Register which will have the product of X and Y at the end of operation.

VI. Make four rows for each cycle; this is because we are multiplying four bits numbers

Step 2-Booth Algorithm

• Booth algorithm requires examination of the multiplier bits, and shifting of the partial product.

• Prior to the shifting, the multiplicand may be added to partial product, subtracted from the partial product, or left unchanged according to the following rules:

• Look at the first least significant bits of the multiplier “X”, and the previous least significant bits of the multiplier “X - 1”.

Step 2(cont’d)

1. 0 0 Shift only 1 1 Shift only. 0 1 Add Y to U, and shift 1 0 Subtract Y from U, and shift or add (-Y)

to U and shift II. Take U & V together and shift arithmetic

right shift which preserves the sign bit of 2’s complement number.

Thus a positive number remains positive, and a negative number remains negative.

III. Shift X circular right shift because this will prevent us from using two registers for the X value.

Booth(cont’d)

Y=0010 and Y’=1110Product Register Multiplier X-1 cycles

U V

0 0 0 0 0 0 0 0 1 1 0 0 0

0 0 0 0 0 0 0 0 0 1 1 0 0 1

0 0 0 0 0 0 0 0 0 0 1 1 0 2

+ 1 1 1 0 3

1 1 1 0 0 0 0 0

1 1 1 1 0 0 0 0 1 0 0 1 1 3a

1 1 1 1 1 0 0 0 1 1 0 0 1 4

Booth’s Algorithm

Example of Booth’s Algorithm

Division

• More complex than multiplication• Negative numbers are really bad!• Based on long division

001111

Division of Unsigned Binary Integers

1011

00001101

100100111011001110

1011

1011100

Quotient

Dividend

Remainder

PartialRemainders

Divisor

Flowchart for Unsigned Binary Division

Real Numbers

• Numbers with fractions• Could be done in pure binary

—1001.1010 = 24 + 20 +2-1 + 2-3 =9.625

• Where is the binary point?• Fixed?

—Very limited

• Moving?—How do you show where it is?

Floating Point (a brief look)• We need a way to represent

—numbers with fractions, e.g., 3.1416

—very small numbers, e.g., .000000001

—very large numbers, e.g., 3.15576 ´ 109

• Representation:

—sign, exponent, significand: (–1)sign

* significand * 2exponent

—more bits for significand gives more accuracy

—more bits for exponent increases range

• IEEE 754 floating point standard:

—single precision : 8 bit exponent, 23 bit significand

—double precision: 11 bit exponent, 52 bit significand

IEEE 754 floating-point standard

• Leading “1” bit of significand is implicit

• Exponent is “biased” to make sorting easier—all 0s is smallest exponent all 1s is largest—bias of 127 for single precision and 1023 for double precision—summary: (–1)sign significand) 2exponent – bias

• Example:—decimal: -.75 = -3/4 = -3/22

—binary : -.11 = -1.1 x 2-1

—floating point: exponent = -1+bias = 126 = 01111110—IEEE single precision:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Floating Point Complexities• Operations more complicated: align, renormalize, ...

• In addition to overflow we can have “underflow”

• Accuracy can be a big problem

—IEEE 754 keeps two extra bits, guard and round, and additional sticky bit (indicating if one of the remaining bits unequal zero)

—four rounding modes

—positive divided by zero yields “infinity”

—zero divide by zero yields “not a number”

—other complexities• Implementing the standard can be tricky• Not using the standard can be even worse

—see text for description of 80x86 and Pentium bug!

Floating Point Examples

Signs for Floating Point

• Mantissa is stored in 2s compliment• Exponent is in excess or biased notation

—e.g. Excess (bias) 128 means—8 bit exponent field—Pure value range 0-255—Subtract 128 to get correct value—Range -128 to +127

Normalization• FP numbers are usually normalized• i.e. exponent is adjusted so that leading bit

(MSB) of mantissa is 1• Since it is always 1 there is no need to store it• Representation for non-integral numbers

—Including very small and very large numbers

• Like scientific notation—–2.34 × 1056 (normalized)—+0.002 × 10–4 (not normalized)—+987.02 × 109 (not normalized)

• In binary—±1.xxxxxxx2 × 2yyyy

FP Ranges

• For a 32 bit number—8 bit exponent —+/- 2256 1.5 x 1077

• Accuracy—The effect of changing lsb of mantissa—23 bit mantissa 2-23 1.2 x 10-7

—About 6 decimal places

Expressible Numbers

Density of Floating Point Numbers

IEEE 754

• Standard for floating point storage• 32 and 64 bit standards• 8 and 11 bit exponent respectively• Extended formats (both mantissa and

exponent) for intermediate results

IEEE 754 Formats

FP Arithmetic +/-

• Check for zeros• Align significands (adjusting exponents)• Add or subtract significands• Normalize result

FP Addition & Subtraction Flowchart

FP Arithmetic x/

• Check for zero• Add/subtract exponents • Multiply/divide significands (watch sign)• Normalize• Round• All intermediate results should be in

double length storage

Floating Point Multiplication

Floating Point Division

Required Reading

• Stallings Chapter 9• IEEE 754 on IEEE Web site