CSE331 W02.1 Irwin Fall 2001 PSU

Computer Architecture Discussion

Lecture # 2

MIPS Programming

CSE331 W02.3 Irwin Fall 2001 PSU

MIPS Arithmetic Instruction

MIPS assembly language arithmetic statement

add $t0, $s1, $s2

sub $t0, $s1, $s2

Each arithmetic instruction performs only one operation

Each arithmetic instruction specifies exactly three operands

destination source1 op source2

Those operands are contained in the datapath’s register file ($t0, $s1,$s2)

Operand order is fixed (destination first)

CSE331 W02.5 Irwin Fall 2001 PSU

Compiling More Complex Statements

Assuming variable b is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to be left in $s0, what is the assembler equivalent to the C statement

h = (b - c) + d

sub $t0, $s1, $s2

add $s0, $t0, $s3

CSE331 W02.7 Irwin Fall 2001 PSU

Accessing Memory

MIPS has two basic data transfer instructions for accessing memory

lw $t0, 4($s3) #load word from memory

sw $t0, 8($s3) #store word to memory

(assume $s3 holds 2410)

The data transfer instruction must specify where in memory to read from (load) or write to (store) – memory

address where in the register file to write to (load) or read from (store) –

register destination (source)

The memory address is formed by summing the constant portion of the instruction and the contents of the second register

28

32

CSE331 W02.10 Irwin Fall 2001 PSU

Compiling with Loads and Stores

Assuming variable b is stored in $s2 and that the base address of array A is in $s3, what is the MIPS assembly code for the C statement

A[8] = A[2] - b

$s3

$s3+4

$s3+8

$s3+12

. . .

A[2]

A[3]

. . .

A[1]

A[0]lw $t0, 8($s3)

sub $t0, $t0, $s2

sw $t0, 32($s3)

CSE331 W02.11 Irwin Fall 2001 PSU

MIPS Instructions, so far

Category Instr Op Code Example Meaning

Arithmetic

(R format)

add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3

subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3

Data

transfer

(I format)

load word 35 lw $s1, 100($s2) $s1 = Memory($s2+100)

store word 43 sw $s1, 100($s2) Memory($s2+100) = $s1

CSE331 W02.12 Irwin Fall 2001 PSU

0 $zero constant 0 (Hdware)

1 $at reserved for assembler

2 $v0 expression evaluation &

3 $v1 function results

4 $a0 arguments

5 $a1

6 $a2

7 $a3

8 $t0 temporary: caller saves

. . . (callee can clobber)

15 $t7

Review: Naming Conventions for Registers

16 $s0 callee saves

. . . (caller can clobber)

23 $s7

24 $t8 temporary (cont’d)

25 $t9

26 $k0 reserved for OS kernel

27 $k1

28 $gp pointer to global area

29 $sp stack pointer

30 $fp frame pointer

31 $ra return address (Hdware)

CSE331 W02.13 Irwin Fall 2001 PSU

[R] format and [I] format

CSE331 W02.15 Irwin Fall 2001 PSU

Instructions, like registers and words of data, are also 32 bits long Example: add $t0, $s1, $s2 registers have numbers $t0=$8, $s1=$17, $s2=$18

Instruction Format:

Machine Language - Arithmetic Instruction

op rs rt rd shamt funct

000000 10001 10010 01000 00000 100000

CSE331 W02.17 Irwin Fall 2001 PSU

MIPS Instruction Fields

op

rs

rt

rd

shamt

funct

op rs rt rd shamt funct6 bits 5 bits 5 bits 5

bits5 bits

6 bits

= 32 bits

opcode indicating operation to be performed

address of the first register source operand

address of the second register source operand

the register destination address

shift amount (for shift instructions)

function code that selects the specific variant of the operation specified in the opcode field

CSE331 W02.19 Irwin Fall 2001 PSU

Consider the load-word and store-word instructions, What would the regularity principle have us do? New principle: Good design demands a compromise

Introduce a new type of instruction format I-type for data transfer instructions previous format was R-type for register

Example: lw $t0, 24($s2)

Machine Language - Load Instruction

op rs rt 16 bit number

35 18 8 24

100011 10010 01000 0000000000011000

CSE331 W02.21 Irwin Fall 2001 PSU

Example: sw $t0, 24($s2)

A 16-bit address means access is limited to memory locations within a region of 213 or 8,192 words (215 or 32,768 bytes) of the address in the base register $s2

Machine Language - Store Instruction

op rs rt 16 bit number

43 18 8 24

101011 10010 01000 0000000000011000

CSE331 W02.23 Irwin Fall 2001 PSU

Assembling Code Remember the assembler code we compiled last lecture

for the C statement

A[8] = A[2] - b

lw $t0, 8($s3) #load A[2] into $t0sub $t0, $t0, $s2 #subtract b from A[2]sw $t0, 32($s3) #store result in A[8]

Assemble the MIPS code for these three instructions

35lw 19 8 8

43sw 19 8 32

0sub 8 18 8 0 34

CSE331 W02.24 Irwin Fall 2001 PSU

Beyond Numbers

Most computers use 8-bit bytes to represent characters with the American Std Code for Info Interchange (ASCII)

ASCII Char ASCII Char ASCII Char ASCII Char ASCII Char ASCII Char

0 Null 32 space 48 0 64 @ 96 ` 112 p

1 33 ! 49 1 65 A 97 a 113 q

2 34 “ 50 2 66 B 98 b 114 r

3 35 # 51 3 67 C 99 c 115 s

4 EOT 36 $ 52 4 68 D 100 d 116 t

5 37 % 53 5 69 E 101 e 117 u

6 ACK 38 & 54 6 70 F 102 f 118 v

7 39 ‘ 55 7 71 G 103 g 119 w

8 bksp 40 ( 56 8 72 H 104 h 120 x

9 tab 41 ) 57 9 73 I 105 i 121 y

10 LF 42 * 58 : 74 J 106 j 122 z

11 43 + 59 ; 75 K 107 k 123 {

12 FF 44 , 60 < 76 L 108 l 124 |

15 47 / 63 ? 79 O 111 o 127 DEL

CSE331 W02.25 Irwin Fall 2001 PSU

Book Exercises

Book exercises solved:

2,3,4,6,13,20

and some exercises for R & I format