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Computer Architecture - UPB, FILS, 2014 Computer Architecture - UPB, FILS, 2014 1 Computer Architecture Computer Architecture 1 Introduction 2 Computer Logic 3 Computer Arithmetic 4 Instruction Set 5 Assembly Language 6 Processing Unit 7 Memory System 8 Input-Output 9 High Performance Computing

Computer Architecture 1

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  • Computer Architecture1 Introduction2 Computer Logic3 Computer Arithmetic4 Instruction Set5 Assembly Language6 Processing Unit7 Memory System8 Input-Output9 High Performance Computing

  • Historical Evolution

  • ENIAC1943-1946Electronic Numerical Integrator And Computer18.000 vacuum tubes30 tones150 m2140 kWDecimal5000 additions per secondJohn von Neumann

  • Computer Types

  • Abstract layers of computer useUser InterfaceApplicationOperating SystemDrivers, BIOSHardware

  • Abstract layers of computerProblem-oriented language levelLevel 5Translation (compiler)Assembly language levelLevel 4Translation (assembler)OS machine levelLevel 3Partial interpretation (operating system)Instruction set architecture levelLevel 2Interpretation (mprog) or direct executionMicroarchitecture levelLevel 1HardwareDigital Logic LevelLevel 0

  • Computer Structure Data BusAddress BusControl Bus

  • PC structurePower SourceCircuit Board - MotherBoardProcessorMemory SlotsChipsRear/Front ConnectorsSockets where the edge connectors of I/O boards can be inserted

  • PC structure

    Main MemoryVideo Controller

    CPUMonitorKeyboard ControllerKeyboardHD Controller

    HD

    Network ControllerNetwork Bus

  • Device ControllersThe job of a controller is to control its I/O device and handle bus access for it.When a program wants data from the disk for example, it gives a command to the disk controller, which then issues seeks and other commands to the drive. When the proper track and sector have been located, the drive begins outputting the data as a serial bit stream to the controller. The controller breaks the bit stream up into units and sends them further.A controller that reads or writes data to or from memory without CPU intervention performs DMA (Direct Memory Access). When the transfer is completed, the controller normally causes an interrupt, forcing the CPU to suspend running its current program and start running a special procedure, called an interrupt handler, to check for errors, take any special action needed, and inform the operating system that the I/O is now finished. When the interrupt handler is finished, the CPU continues with the program that was suspended when the interrupt occurred

  • Later PC Structure

    Main MemoryVideo Controller

    CPUMonitorSCSI ControllerSCSI chain

    USB Controller

    USB chain

    Network ControllerNetwork PCI Bus

    PCI Bridge

    ISA Bridge ISA BusPrinter ControllerModemSound CardMemory Bus

  • CPU Structure