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Computer Arch. And Embedded Processors
Embedded Real-TimeSignal Processing Systems
Prof. Brian L. EvansThe University of Texas at Austin
August 26, 2008
http://www.ece.utexas.edu
http://signal.ece.utexas.edu
http://www.cps.utexas.edu
http://www.wncg.org
Computer Arch. And Embedded Processors
Introduction
• Embedded systemso Implement dedicated, application-specific taskso Work behind the scenes
• Real-time behavioro Guaranteed delivery [Prof. Yale Patt]o Often reactive to environment
• Signal processingo Signals are acquired measurements or modelso Processing transforms input signals to output
signals
Computer Arch. And Embedded Processors
Embedded Systems
• Computers masquerading as non-computers
Casio Camera Watch
Nokia 7110 Browser Phone
Sony Playstation 2
Philips DVD player
Philips TiVo Recorder
Slide courtesy of Prof. Stephen A. Edwards of Columbia University
Computer Arch. And Embedded Processors
Signal Processing Applications
• 2007 units shipped, consumer productso 800M cell phones 100M DSL
modemso 250M PCs 60M cars/truckso 100M digital still cameras 30M printers
• Embedded processor cost?
Product (2004 Calendar Year)
Average Unit Price
Annual Revenue
Wireless phone $136 $11.5 Billion
Digital cameras $271 $ 4.2 Billion
Portable CD players $ 48 $ 0.9 Billion
MP3 players $137 $ 0.7 Billion
Compact audio systems $111 $ 0.5 Billion
CEA
Mark
et
Rese
arc
h
(US)
Computer Arch. And Embedded Processors
One Family: Digital Signal Processors
• As low as $2/processor in volume orders• Small physical area and volume• Predictable input/output rates
o Deterministic interrupt service routine latency
• On-chip direct memory access controllerso Streams input/output separately from CPUo Sends interrupt to CPU when block read/written
• Power consumptiono For battery-powered products: 10-100 mWo For wall-powered products: 1-10 W
Computer Arch. And Embedded Processors
Embedded Signal Processing Lab
• Signal processing for communication systems• Image acquisition, analysis, and display• Electronic design automation (EDA)• Alumni: 16 PhD, 8 MS, 100 BS students• Current: 8 PhD, 3 MS, 8 BS students
Sys. Subsys. Theory Alg. Release Design Embed. Release
ADSL equalizer Y Y Matlab Y HW/SW DSP/C
OFDM res. alloc. Y Y LabVIEW Y SW DSP/C
Xceiver RFI mitig. Y Y Matlab Y
Display halftoning Y Y Matlab/C Y
EDA fix. pt. con. Y Matlab Y HW
Founded 1996
Computer Arch. And Embedded Processors
Computer Platform RFI
• RFI from clocks, clock harmonics, busseso Reduces communication performance for
embedded wireless data transceivers
• Objectiveo Improve data reliability by factor of 10
• Approacheso Model RFI using impulsive
noise modelso Filtering/detection based
on RFI models
Computer Arch. And Embedded Processors
8
Common Spectral Occupancy
StandardCarrier (GHz)
Wireless Networking
Interfering Clocks and Busses
Bluetooth 2.4Personal Area
NetworkGigabit Ethernet, PCI Express
Bus, LCD clock harmonics
IEEE 802. 11 b/g/n
2.4Wireless LAN
(Wi-Fi)Gigabit Ethernet, PCI Express
Bus, LCD clock harmonics
IEEE 802.16e
2.5–2.69 3.3–3.8
5.725–5.85
Mobile Broadband
(Wi-Max)
PCI Express Bus,LCD clock harmonics
IEEE 802.11a
5.2Wireless LAN
(Wi-Fi)PCI Express Bus,
LCD clock harmonics
Computer Arch. And Embedded Processors
Statistical Models
• Middleton Class A • Symmetric Alpha Stable
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-10
-8
-6
-4
-2
0
2
4
6
8
10
Frequency
Pow
er S
pect
rum
Mag
nitu
de (
dB)
Power Spectal Density of Class A noise, A = 0.15, = 0.1
Power Spectral Density Power Spectral Density
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-10
-8
-6
-4
-2
0
2
4
6
8
10
FrequencyP
ower
Spe
ctru
m M
agni
tude
(dB
)
Power Spectal Density of S S noise, = 1.5, = 10, = 0
with A = 0.15 and = 0.1 with = 1.5, = 0 and = 10
Computer Arch. And Embedded Processors
10
Proposed Contributions
Computer Platform Noise Modelling
Evaluate fit of measured RFI data to noise modelsNarrowband Interference: Middleton Class A modelBroadband Interference: Symmetric Alpha Stable
Parameter Estimation Evaluate estimation accuracy vs complexity tradeoffs
Filtering / Detection Evaluate communication performance vs complexity tradeoffs• Middleton Class A: Correlation receiver, Wiener filtering and Bayesian detector• Symmetric Alpha Stable: Myriad filtering, hole punching, and Bayesian detector
Computer Arch. And Embedded Processors
-5 -4 -3 -2 -1 0 1 2 3 4 50
0.2
0.4
0.6
0.8
1
Measured Data Fitting
Noise amplitude
Pro
babi
lity
Den
sity
Fun
ctio
n
Measured PDF
Estimated AlphaStable PDFEstimated MiddletonClass A PDF
Estimated Equi-powerGaussian PDF
11
Estimated Parameters
Symmetric Alpha Stable ModelLocalization (δ) 0.0043
Distance 0.0514
Characteristic exp. (α) 1.2105
Dispersion (γ) 0.2413
Middleton Class A ModelOverlap Index (A) 0.1036 Distance
0.0825Gaussian Factor (Γ) 0.7763
Gaussian ModelMean (µ) 0 Distance
0.2217Variance (σ2) 1
Distance: Kullback-Leibler divergence
Results for Measured RFI Data Set
• 80,000 samples collected using 20 GSPS scope
Computer Arch. And Embedded Processors
12
Pulse shapeRaised cosine
10 samples per symbol10 symbols per pulse
ChannelA = 0.35
= 0.5 × 10-3
Memoryless
Method Comp. Detection Perform.
Correl. Low Low
Wiener Medium Low
Bayesian Approx.
Medium High
Bayesian High High
Detection in Middleton Class A Noise
SNR is signal-to-noise ratio, i.e. transmitted signal power over channel noise power
Computer Arch. And Embedded Processors
13
Method Comp. Detection Perform.
Hole Punching
Low Medium
Selection Myriad
Low Medium
Bayesian Approx.
Medium High
Optimal Myriad
High Medium-10 -5 0 5 10 15 20
10-2
10-1
100
Generalized SNR
BE
R
Communication Performance (=0.9, =0, M=12)
Matched FilterHole PunchingMAPMyriad
Use dispersion parameter in place of noise variance to generalize SNR
Detection for Symmetric Alpha Stable
Computer Arch. And Embedded Processors
Conclusion
• Using impulsive noise models, reduce bit error rates (i.e. increase data reliability)o By factor of 10-100 for Middleton Class A modelo By factor of 10 for Symmetric Alpha Stable model
• Tractable parameter estimation algorithmso Middleton Class A: iterative + polynomial rootingo Symmetric Alpha Stable: non-iterative
• UT Austin RFI Mitigation Toolboxhttp://www.ece.utexas.edu/~bevans/projects/rfi
• Future extensions
Computer Arch. And Embedded Processors
References• D. Middleton, “Non-Gaussian noise models in signal
processing for telecommunications: New methods and results for Class A and Class B noise models”, IEEE Trans. Info. Theory, vol. 45, no. 4, pp. 1129-1149, May 1999.
• S. M. Zabin and H. V. Poor, “Efficient estimation of Class A noise parameters via the EM algorithms”, IEEE Trans. Info. Theory, vol. 37, no. 1, pp. 60-72, Jan. 1991.
• G. A. Tsihrintzis and C. L. Nikias, "Fast estimation of the parameters of alpha-stable impulsive interference", IEEE Trans. Signal Proc., vol. 44, Issue 6, pp. 1492-1503, Jun. 1996.
• A. Spaulding and D. Middleton, “Optimum Reception in an Impulsive Interference Environment-Part I: Coherent Detection”, IEEE Trans. Comm., vol. 25, no. 9, Sep. 1977.
• A. Spaulding and D. Middleton, “Optimum Reception in an Impulsive Interference Environment-Part II: Incoherent Detection”, IEEE Trans. Comm., vol. 25, no. 9, Sep. 1977.
Computer Arch. And Embedded Processors
References
• B. Widrow et al., “Principles and Applications”, Proc. of the IEEE, vol. 63, no.12, Sep. 1975.
• J. G. Gonzalez and G. R. Arce, “Optimality of the Myriad Filter in Practical Impulsive-Noise Environments”, IEEE Transactions on Signal Processing, vol 49, no. 2, Feb. 2001.
• M. Nassar, K. Gulati, A. K. Sujeeth, N. Aghasadeghi, B. L. Evans and K. R. Tinsley, "Mitigating Near-Field Interference in Laptop Embedded Wireless Transceivers", Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Proc., Mar. 30-Apr. 4, 2008.
• K. Gulati, A. Chopra, R. W. Heath, Jr., B. L. Evans and K. R. Tinsley, and X. E. Lin, "MIMO Receiver Design in the Presence of Radio Frequency Interference", Proc. IEEE Global Communications Conf., Dec. 2008, accepted for publication.