Compal LA-5071P - Schematics. ...LA-4421P 0.2 Cover Page B Monday, April 06, 2009 1 42 2006/08/18 2007/8/18 Compal Electronics, Inc. Intel Diamondville Processor with Calistoga(945GSE)

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Title

Size Document Number Rev

Date: Sheet o f

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-4421P 0.2

Cover Page

B

1 42Monday, April 06, 2009

2006/08/18 2007/8/18

Compal Electronics, Inc.

Intel Diamondville Processor with Calistoga(945GSE) + DDRII + ICH7M

KIUN0 Schematics Document

REV: 1.0

Compal Confidential

2009-03-31

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Date: Sheet o f







LA-4421P 0.1

Block Diagrams

B


2006/08/18 2007/8/18


Compal Confidential

Model Name : KIUN0

X2 mode

File Name : LA-5071P

Touch Pad

CRT Conn

LPC BUS

page 22

27x27mm

H_A#(3..31) H_D#(0..63)

page 25

page 16

page 22Int.KBDpage 27

400/533MHz

ALC272

DMI

Diamondville SC

FSB

Transfermer

Power ON/OFF

page 27

page 15

FCBGA8

DDRII-SO-DIMM Calistoga GSE

FCBGA998

SPI ROM

page 41.8V DDRII 400/533

page 4,5

page 29

Aralia Codec

Memory BUS(DDRII)

31x31mm

page 6,7,8,9,10

ICH7M

BGA652

Thermal Sensor page 13

page 17,18,19,20

page 29

ENE KBC

KB926

AMP & INT

Speaker

10/100 EthernetRTL8103E(L)

page 25

Card Reader

RTS5159

MINI Card x1

PCI-Express

EMC1402LCD Conn.

page 26

page 21

LVDS

SPI

INT MIC HeadPhone &

MIC Jack

RGB

page 30

USB Port X3

page 25

RJ45

SD/MMC/MS

CONN

DC/DC Interface

3VALW/5VALW

1.8V/VCCP

1.5VS/0.9VS/

2.5VS

CPU_CORE

Clock Generator

CK505page 14

page 23page 22

page 26

page 28

page 31

page 40

page 37

page 38

page 39

USB

BlueTooth

CMOS CAM

page21

page24

HDA

page 34

page 35

page 36CHARGER

DC IN

BATT IN

437Pins

22x22mm

MINI Card x2

page 21

SATA

page 24

HDDpage 21

SSD

ZZZ3

PCB

DAZ@

ZZZ

PCB

ZZZ1

PCB

DAZ@

ZZZ2

PCB

DAZ@

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet o f







LA-4421P 0.2

Notes List

B


2006/08/18 2007/8/18


ON

SLP_S3#

S5 (Soft OFF)

S4 (Suspend to Disk)

S3 (Suspend to RAM)

LOW

ONON

ON

ON

ON

ON

ON

ON

HIGH

OFF

OFF

OFF

OFF

OFF

SLP_S4#

OFF

ON

ON

LOWLOW

LOW

OFF

OFF

SLP_S5#

HIGH

HIGH HIGH HIGH

HIGHHIGHHIGH

LOW

LOW LOW

+VALW

HIGH

+V +VS Clock

S1(Power On Suspend)

Full ON

STATE

OFF

OFF

ON

ON OFF

OFFOFFON

ON

+CPU_CORE

1.5V switched power rail

OFF

Voltage Rails

+2.5VS

+1.5VS

0.9V switched power rail for DDR terminator+0.9VS

OFFOFFON

Adapter power supply (19V)

1.8V power rail for DDR

B+

VIN

S5

+1.8V

S3S1

VCCP switched power rail

Core voltage for CPU

AC or battery power rail for power circuit.

OFFON

OFFON

DescriptionPower Plane

N/A N/A N/A

N/AN/AN/A

OFF

SIGNAL

Address

100_11000001 011X b

1010 000XbDDR DIMMA

IDSEL #

1101 001Xb

ICH7M SM Bus address

DEVICE REQ/GNT #

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.Address

Address

Clock Generator(SLG8SP556VTR)

Device

PIRQ

EMC1402

External PCI Devices

Device

EC SM Bus1 address

Smart Battery

Device

EC SM Bus2 address

No PCI Device

+VCCP

ON

OFF

OFF

+5VS

3.3V always on power rail

5V always on power rail


+RTCVCC RTC power

+3VALW

+3VS

+5VALW

ON ON*

5V switched power rail

+VSB VSB always on power rail ON ON*

ONON

ON

ON

OFFON

ON

ON ON*

OFF

ON


ID

0

8.2K

18K

R01 (EVT)

NC

R03 (PVT)

0V

0.25V

0.50V

3.3V

R02 (DVT)

R10A (MP)

Rb VabBRD ID0

1

2

3

BOARD ID Table(Page 25)

Ra

NC

100K

100K

100K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_DBSY#

H_ADSTB#0

H_ADS#

H_A20M#

H_THERMDA

H_REQ#4

H_REQ#2

H_DEFER#

H_THERMTRIP#

H_IGNNE# CLK_CPU_BCLK#

H_LOCK#

CLK_CPU_BCLK

H_HITM#

H_DRDY#

H_REQ#0

H_BPRI#

H_BR0#

H_TRDY#

H_ADSTB#1

H_THERMDC

H_REQ#1

H_HIT#

H_RESET#

H_REQ#3

H_FERR#

H_BNR#

H_A#7

H_A#18

H_A#10

H_A#28

H_A#12

H_A#26

H_A#29

H_A#9

H_A#13

H_A#23

H_A#27

H_A#22

H_A#4

H_A#19

H_A#15

H_A#21

H_A#17

H_A#11

H_A#24H_A#25

H_A#8

H_A#14

H_A#3

H_A#5

H_A#20

H_A#16

H_A#31

H_A#6

H_A#30

H_A#32H_A#33H_A#34H_A#35

H_A#32H_A#33H_A#34H_A#35

H_AP1

H_AP0

H_A20M#H_IGNNE#

H_IERR#H_INIT#_R

H_RS#1H_RS#2

H_RS#0

ITP_TMSITP_TDI

ITP_TCKITP_TRST#

H_PROCHOT#_R

ITP_TRST#

ITP_TDOITP_TDIITP_TCKPREQ#

ITP_TMS

H_D#57

H_D#36

H_D#11

CPU_BSEL2

H_D#3

H_D#12

H_D#39

H_D#32

CPU_BSEL0

H_DINV#3

H_D#59

H_D#40

H_D#23

H_D#18

H_D#16

H_DINV#0

H_D#52

H_D#48

H_D#43

H_D#25

H_DSTBP#2H_DINV#2

H_D#55

H_D#46

H_D#42

H_D#4H_D#35

H_D#14

H_PWRGOOD

H_D#62

H_D#44

H_D#26

H_D#50H_D#49

H_D#33

H_D#31

H_D#24

H_D#20

COMP1

H_D#7

H_D#37

H_D#34

H_D#21

H_D#1

COMP0

CPU_BSEL1

H_DSTBN#2

H_D#27

H_D#2

COMP3

H_CPUSLP#

H_D#63

H_D#6

H_D#51

H_D#29

H_D#22

H_D#17

H_D#15

H_DSTBP#0

H_DPSLP#

H_D#61H_D#60

H_D#58

H_D#56

H_D#41

H_D#38

H_D#30

COMP2

H_DPRSTP#

H_D#8

H_D#54

H_DSTBP#1

H_D#47

H_D#10

H_D#0

H_D#53

H_D#5

H_D#45

H_DSTBN#0

H_D#9

H_D#28

H_D#19

H_DSTBP#3

H_D#13

H_DINV#1

H_DSTBN#1 H_DSTBN#3

H_DP#0

H_DP#1

ACLKPHDCLKPH

H_DP#2

H_DP#3

H_DPWR#

H_THERMDA

H_THERMDC

EC_SMB_CK2

EC_SMB_DA2

ITP_TDO

H_SMI#

H_INTRH_STPCLK#

H_NMI

PREQ#

+VCC_FAN1

+VCC_FAN1

EN_FAN1

H_A20M#

H_FERR#

H_IGNNE#

H_INTR

H_NMI

H_STPCLK#

H_SMI#

H_A#[3..16]

H_DINV#0

CPU_BSEL0CPU_BSEL1CPU_BSEL2

H_RESET#

H_THERMTRIP#

H_BR0#

H_HITM#

H_DEFER#

H_BPRI#

H_A20M#

H_REQ#[0..4]

H_HIT#

H_ADSTB#1

H_ADS#

H_TRDY#

H_FERR#

H_BNR#

H_DBSY#

CLK_CPU_BCLK

H_LOCK#

CLK_CPU_BCLK#

H_ADSTB#0

H_IGNNE#

H_DRDY#

H_A#[17..31]

H_INIT#

H_RS#[0..2]

H_PROCHOT#

H_DPSLP#

H_DINV#3

H_CPUSLP#

H_DINV#1

H_DPRSTP#

H_DINV#2

H_PWRGOOD

H_D#[48..63]

H_D#[32..47]

H_D#[16..31]

H_D#[0..15]

H_DSTBP#0H_DSTBN#0

H_DSTBP#1H_DSTBN#1

H_DSTBN#2 H_DSTBP#2

H_DSTBN#3 H_DSTBP#3

H_DPWR#

EC_SMB_CK2

EC_SMB_DA2

H_SMI#

H_STPCLK#H_INTRH_NMI

FAN_SPEED1

EN_FAN1

+CPU_GTLREF

+VCCP

+CPU_GTLREF

+VCCP

+VCCP

+VCCP +VCCP

+VCCP

+VCCP

+CPU_CMREF

+CPU_CMREF

+VCCP

+CPU_EXTBGREF

+CPU_EXTBGREF

+3VS

+3VS

+5VS

+3VS

+5VS

Title


Date: Sheet o f







LA-4421P 0.2

Diamondville(1/2)

Custom


2006/08/18 2007/8/18


H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil

Close to CPU pin within 500mils.Zo=55ohm

This shall place near CPU



Layout note:COMP0,2 connect with Zo=27.4ohm +/-15%, maketrace length shorter than 0.5"COMP1,3 connect with Zo=55ohm +/-15%, maketrace length shorter than0.5"

Address:100_1100

CPU THERMAL SENSOR

Close to CPU

Close to CPU

40mil

FAN1 Conn

DIODEClosed toConnector

ESD request

T6 PAD

C2960.1U_0402_16V4Z

1

2

R2561K_0402_5%

12

C391 100P_0402_50V8J1 2

R28 56_0402_5%1 2

C711U_0603_10V4Z

1

2

R22

56_0402_5%

12

C396 100P_0402_50V8J1 2

C3142.2U_0603_10V6K

1 2

C2950.1U_0402_16V4Z

1

2

R52 1K_0402_5%@1 2

C312 2.2U_0603_10V6K

1 2

R2402K_0402_1%

12

C311

100P_0402_50V8J

1

2

C79

2200P_0402_50V7K1 2

R25 54.9_0402_1%12

ADDR

GROUP

0

ADDR GROUP 1

CONTROL

XDP/ITP SIGNALS

H CLK

THERM

NC

U9A

AU80586GE025512_FCBGA437

.N270@

A[10]#M19

A[11]#H21

A[12]#L20

A[13]#M20

A[14]#K19

A[15]#J20

A[16]#L21

A[17]#C19

A[18]#F19

A[19]#E21

A[20]#A16

A[21]#D19

A[22]#C14

A[23]#C18

A[24]#C20

A[25]#E20

A[26]#D20

A[27]#B18

A[28]#C15

A[29]#B16

A[3]#P21

A[30]#B17

A[31]#C16

RSVD1A3

RSVD2C1

RSVD3C21

A[4]#H20

A[5]#N20

A[6]#R20

A[7]#J19

A[8]#N19

A[9]#G20

A20M#U18

ADS#V19

ADSTB[0]#K20

ADSTB[1]#B19

BCLK[0]V11

BCLK[1]V12

BNR#Y19

BPM[0]#K17

BPM[1]#J18

BPM[2]#H15

BPM[3]#J15

BPRI#U21

BR0#T20

BR1#V15

DBSY#Y18

DEFER#T21

DRDY#T19

FERR#T16

HIT#AA17

HITM#V20

IERR#F16

IGNNE#J4

INIT#V16

LINT0T15

LINT1R15

LOCK#W20

PRDY#K18

PREQ#J16

PROCHOT#G17

REQ[0]#N21

REQ[1]#J21

REQ[2]#G19

REQ[3]#P20

REQ[4]#R19

RESET#D15

RS[0]#W18

RS[1]#Y17

RS[2]#U20

SMI#U17

STPCLK#R16

TCKM17

TDIN16

TDOM16

THERMTRIP#H17

THRMDAE4

THRMDCE5

TMSL17

TRDY#W19

TRST#K16

NC5K5

NC4K4

NC3H6

NC2G6

NC1D6

NC6M15

A[32]#A17

A[33]#B14

A[34]#B15

A[35]#A14

NC7L16

AP0D17

AP1M18

R19 56_0402_5%1 2

R36 56_0402_5%1 2

R2382K_0402_1%

12

C392 100P_0402_50V8J1 2

R2411K_0402_1%

12

R24 22_0402_5%1 2

U9

N280N280@

R231 1K_0402_5%1 2

U12

APL5607KI-TRG_SO8

EN1

VIN2

VOUT3

VSET4

GND8

GND7

GND6

GND5

D201N4148_SOT23@

1 2

C394 100P_0402_50V8J1 2

DATA GRP 0

DATA GRP 1

DATA GRP 2

DATA GRP 3

MISC

U9B

AU80586GE025512_FCBGA437N270@

COMP[0]T1

COMP[1]T2

COMP[2]F20

COMP[3]F21

D[0]#Y11

D[1]#W10

D[10]#W15

D[11]#AA13

D[12]#Y16

D[13]#W13

D[14]#AA9

D[15]#W9

D[16]#AA5

D[17]#Y8

D[18]#W3

D[19]#U1

D[2]#Y12

D[20]#W7

D[21]#W6

D[22]#Y7

D[23]#AA6

D[24]#Y3

D[25]#W2

D[26]#V3

D[27]#U2

D[28]#T3

D[29]#AA8

D[3]#AA14

D[30]#V2

D[31]#W4

D[32]#R3

D[33]#R2

D[34]#P1

D[35]#N1

D[36]#M2

D[37]#P2

D[38]#J3

D[39]#N3

D[4]#AA11

D[40]#G3

D[41]#H2

D[42]#N2

D[43]#L2

D[44]#M3

D[45]#J2

D[46]#H1

D[47]#J1

D[48]#C2

D[49]#G2

D[5]#W12

D[50]#F1

D[51]#D3

D[52]#B4

D[53]#E1

D[54]#A5

D[55]#C3

D[56]#A6

D[57]#F2

D[58]#C6

D[59]#B6

D[6]#AA16

D[60]#B3

D[61]#C4

D[62]#C7

D[63]#D2

D[7]#Y10

D[8]#Y9

D[9]#Y13

DINV[0]#W16

DINV[1]#Y6

DINV[2]#L1

DINV[3]#C5

DPRSTP#R18

DPSLP#R17

DPWR#U4

DSTBN[0]#Y14

DSTBN[1]#Y4

DSTBN[2]#K2

DSTBN[3]#E2

DSTBP[0]#Y15

DSTBP[1]#Y5

DSTBP[2]#K3

DSTBP[3]#F3

GTLREFA7

PWRGOODV17

SLP#N18

BSEL[0]J6

BSEL[1]H5

BSEL[2]G5

ACLKPHU5

BINIT#T17

DCLKPHV5

DP#0V9

DP#1R4

DP#2M4

DP#3D4

EDMR6

CORE_DETA13

CMREF[1]B7

EXTBGREFM6

FORCEPR#N15

HFPLLN6

MCERR#P17

RSP#T6

R244 1K_0402_5%1 2

R23 56_0402_5%1 2

C393 100P_0402_50V8J1 2

R21 56_0402_5%1 2

R55 1K_0402_5%1 2

U2

EMC1402-1-ACZL-TR_MSOP8

DN3

DP2

VDD1

ALERT#6

SMCLK8

THERM#4

GND5

SMDATA7

R2371K_0402_1%

12

T7PAD

R232 1K_0402_5%1 2

R233 1K_0402_5%1 2

R5810K_0402_5%

@

12

R492K_0402_1%

12

R242330_0402_5%

12

T8PAD

R481K_0402_1%

12

R230 1K_0402_5%1 2

C80

0.1U_0402_16V4Z~D

1

2

T9 PAD

T5PAD

D19

1SS355_SOD323@

12

JP12

ACES_85204-03001ME@

11

22

33

G14

G25

C3131000P_0402_50V7K

1 2

C395 100P_0402_50V8J1 2

R243 27.4_0402_1%1 2T4 PAD

R50 1K_0402_5%@1 2

R20 56_0402_5%1 2

R26 27.4_0402_1%12

R53 54.9_0402_1%1 2

C397 100P_0402_50V8J1 2R31 1K_0402_5%1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU_VID1CPU_VID0

CPU_VID3CPU_VID4

CPU_VID2

CPU_VID5CPU_VID6

+1.5VS

VCCSENSE

VSSSENSE

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

VCCSENSE

VSSSENSE

+VCCP

+CPU_CORE

+VCCP

+1.5VS

+CPU_CORE +CPU_CORE

Title

Size Document Number R ev

Date: Sheet o f







LA-4421P 0.2

Diamondville(2/2)

B


2006/08/18 2007/8/18


Length match within 25 milsThe trace space 7 mils,Zo=27.4ohm

PLACE IN CORRIDOR AND CLOSE TO CPU

PLACE IN CAVITY

PLACE IN CAVITY

2 x 330uF(9mohm/2)

130mA

C78

10U_0805_10V6K

1

2

C47

1U_0402_6.3V6K

1

2

C61

1U_0402_6.3V6K

1

2

C62

1U_0402_6.3V6K

1

2

U9C

AU80586GE025512_FCBGA437N270@

VCCQ1A9

VCCFV10

VCCPC63F13

VCCPC62E14

VCCPC61E13

VCCQ2B9

VCCAD7

VTT9H14

VTT8H8

VTT7G14

VTT6G8

VTT5F9

VTT4F8

VTT32U14

VTT31U13

VTT30U12

VTT3E9

VTT29U11

VTT28U10

VTT27U9

VTT26U8

VTT25T14

VTT24T8

VTT23R14

VTT22R8

VTT21P14

VTT20P8

VTT2D9

VTT19N14

VTT18N8

VTT17M14

VTT16M8

VTT15L14

VTT14L8

VTT13K14

VTT12K8

VTT11J14

VTT10J8

VTT1C9

VID[0]F15

VID[1]D16

VID[2]E18

VID[3]G15

VID[4]G16

VID[5]E17

VID[6]G18

VSSSENSED13

VCCSENSEC13

VCCP1A10

VCCP2A11

VCCP3A12

VCCP4B10

VCCP5B11

VCCP6B12

VCCP7C10

VCCP8C11

VCCP9C12

VCCP10D10

VCCP11D11

VCCP12D12

VCCP13E10

VCCP14E11

VCCP15E12

VCCP16F10

VCCP33L12

VCCP32L11

VCCP31L10

VCCP30K12

VCCP29K11

VCCP28K10

VCCP27J12

VCCP26J11

VCCP25J10

VCCP24H12

VCCP23H11

VCCP22H10

VCCP21G12

VCCP20G11

VCCP19G10

VCCP18F12

VCCP17F11

VCCP34M10

VCCP35M11

VCCP36M12

VCCP37N10

VCCP38N11

VCCP39N12

VCCP40P10

VCCP41P11

VCCP42P12

VCCP43R10

VCCP44R11

VCCP45R12

VCCPC64F14

C294

10U_0805_10V6K

1

2

C53

1U_0402_6.3V6K

1

2

C48

1U_0402_6.3V6K

1

2

C291

10U_0805_10V6K

1

2

C70

10U_0805_10V6K

1

2

C72

1U_0402_6.3V6K

1

2

C290

10U_0805_10V6K

1

2

C65

1U_0402_6.3V6K

1

2

C49

1U_0402_6.3V6K

1

2

+ C278

330U 2.5V Y

1

2

C45

0.1U_0402_10V7K

1

2

C64

1U_0402_6.3V6K

1

2

C76

10U_0805_10V6K

1

2

C50

1U_0402_6.3V6K

1

2

+ C275

330U 2.5V Y

1

2

C286

10U_0805_10V6K

1

2

C51

1U_0402_6.3V6K

1

2

C280

10U_0805_10V6K

1

2

C41

0.1U_0402_10V7K

1

2

C40

10U_0805_10V6K

1

2

C52

1U_0402_6.3V6K

1

2

C68

1U_0402_6.3V6K

1

2

C58

1U_0402_6.3V6K

1

2

C77

10U_0805_10V6K

1

2

C46

1U_0402_6.3V6K

1

2

C59

1U_0402_6.3V6K

1

2

C75

10U_0805_10V6K

1

2

U9D

AU80586GE025512_FCBGA437N270@

VSS99AA12

VSS98AA15

VSS97AA18

VSS96AA19

VSS95AA20

VSS9B1

VSS84N4

VSS83M21

VSS82M13

VSS81M9

VSS80M7

VSS8A20

VSS79M5

VSS78M1

VSS77L19

VSS76L18

VSS75L15

VSS74L13

VSS73L9

VSS72L7

VSS71L6

VSS70L5

VSS7A19

VSS69L4

VSS68L3

VSS67K21

VSS66K15

VSS65K13

VSS64K9

VSS63K7

VSS62K6

VSS61K1

VSS60J17

VSS6A18

VSS59J13

VSS58J9

VSS57J7

VSS56J5

VSS55H19

VSS54H18

VSS53H16

VSS52H13

VSS51H9

VSS5A15

VSS49H7

VSS48H4

VSS46H3

VSS45G21

VSS42G13

VSS41G9

VSS4A8

VSS39G7

VSS38G4

VSS37G1

VSS36F18

VSS35F17

VSS34F7

VSS33F6

VSS32F5

VSS31F4

VSS30E19

VSS29E16

VSS28E15

VSS27E8

VSS26E7

VSS25E6

VSS24E3

VSS23D21

VSS22D18

VSS21D14

VSS20D8

VSS2A4

VSS19D5

VSS18D1

VSS17C17

VSS16C8

VSS158N17

VSS157P3

VSS156P4

VSS155P5

VSS154P6

VSS153P7

VSS152P9

VSS151P13

VSS15B21

VSS149P15

VSS148P16

VSS147P18

VSS146P19

VSS145R1

VSS144R5

VSS143R7

VSS142R9

VSS141R13

VSS140R21

VSS14B20

VSS139T4

VSS138T5

VSS137T7

VSS136T9

VSS135T10

VSS134T11

VSS133T12

VSS132T13

VSS131T18

VSS130U3

VSS13B13

VSS129U6

VSS128U7

VSS127U15

VSS126U16

VSS125U19

VSS124V1

VSS123V4

VSS122V6

VSS121V7

VSS120V8

VSS12B8

VSS119V13

VSS118V14

VSS117V18

VSS116V21

VSS115W1

VSS114W5

VSS113W8

VSS112W11

VSS111W14

VSS110W17

VSS11B5

VSS109W21

VSS108Y1

VSS107Y2

VSS106Y20

VSS105Y21

VSS104AA2

VSS103AA3

VSS102AA4

VSS101AA7

VSS100AA10

VSS10B2

VSS1A2

VSS159N13

VSS160N9

VSS161N7

VSS162N5

C63

1U_0402_6.3V6K

1

2

C60

1U_0402_6.3V6K

1

2

+

C289

220U_B2_2.5VM_R35

1

2

C284

10U_0805_10V6K

1

2

C670.1U_0402_10V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+H_VREF

H_D#55

H_D#37

H_D#14

H_D#12

H_D#2

H_XRCOMP

H_D#52

H_D#42

H_D#36

H_D#33

H_D#17

H_XSCOMP

H_D#54

H_D#7

H_D#5H_D#4

H_D#56

H_D#18

H_D#44

H_YRCOMP+H_SWNG0

+H_SWNG1

H_D#27

H_D#25

H_D#15

H_D#11

H_D#63

H_D#61

H_D#41

H_D#34

H_D#20

H_D#10

H_D#1

+H_SWNG1

H_D#46

H_D#40

H_D#26

H_D#59

H_D#30

H_D#19

H_D#0

H_D#57

H_D#49

H_D#28

H_D#24

H_D#22

H_D#8

H_D#58

H_D#50

H_D#47

H_D#35

H_D#32

H_D#6

H_D#3

H_D#16

H_D#13

H_D#23

H_D#9

H_D#53

H_D#51

H_D#43

H_D#39

H_YSCOMP

+H_SWNG0

H_D#62

H_D#60

H_D#48

H_D#38

H_D#29

H_D#45

H_D#31

H_D#21

H_A#3H_A#4H_A#5H_A#6H_A#7

H_A#11

H_A#8H_A#9

H_A#12

H_A#10

H_A#15

H_A#13H_A#14

H_A#17

H_A#20

H_A#18

H_A#21

H_A#19

H_A#22

H_A#27H_A#26H_A#25

H_A#23

H_A#28

H_A#31

H_A#24

H_A#29H_A#30

H_A#16

H_ADS#

H_ADSTB#1H_ADSTB#0

+H_VREFH_BNR#H_BPRI#

+H_VREFH_RESET#H_BR0#

CLK_MCH_BCLK#CLK_MCH_BCLKH_DBSY#H_DEFER#

H_DINV#2

H_DINV#0

H_DINV#3

H_DINV#1

H_DPWR#H_DRDY#

H_DSTBP#0

H_DSTBP#2H_DSTBP#3

H_DSTBN#3

H_DSTBP#1

H_DSTBN#1H_DSTBN#0

H_DSTBN#2

H_HIT#H_HITM#H_LOCK#

H_CPUSLP#H_TRDY#

H_RS#0

H_RS#2H_RS#1

H_REQ#4

H_REQ#0

H_REQ#2H_REQ#1

H_REQ#3

DMI_RXP0DMI_RXP1

DMI_TXP0DMI_TXP1

DMI_RXN0DMI_RXN1

DMI_TXN0DMI_TXN1

DDR_CS0#

DDR_CKE0

M_CLK_DDR0

M_CLK_DDR#0

M_ODT0

SMRCOMPNSMRCOMPP

MCH_CLKSEL0MCH_CLKSEL1MCH_CLKSEL2

PM_EXTTS#0

PM_EXTTS#0

CFG5

ICH_POKPLTRST_R#

H_THERMTRIP#

PM_EXTTS#1

PM_EXTTS#1

M_CLK_DDR1

M_CLK_DDR#1

DDR_CKE1

DDR_CS1#

M_ODT1

H_D#[0..63] H_A#[3..31]

H_ADS# H_ADSTB#0 H_ADSTB#1

H_BNR# H_BPRI#

H_RESET# H_BR0#

CLK_MCH_BCLK# CLK_MCH_BCLK H_DBSY# H_DEFER#

H_DINV#3

H_DINV#0 H_DINV#1 H_DINV#2

H_DPWR# H_DRDY#

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_HIT# H_HITM# H_LOCK#

H_RS#[0..2]

H_CPUSLP# H_TRDY#

H_REQ#[0..4]

DMI_TXN0DMI_TXN1DMI_TXP0DMI_TXP1

DMI_RXN0DMI_RXN1DMI_RXP0DMI_RXP1

M_CLK_DDR0

M_CLK_DDR#0

DDR_CKE0

DDR_CS0#

M_ODT0

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_ICH_SYNC# PM_BMBUSY# PM_EXTTS#0

PM_DPRSLPVR

ICH_POK

CLK_MCH_DREFCLK# CLK_MCH_DREFCLK MCH_SSCDREFCLK# MCH_SSCDREFCLK MCH_CLKREQ#

PLTRST#

H_THERMTRIP#

M_CLK_DDR1

M_CLK_DDR#1

DDR_CKE1

DDR_CS1#

M_ODT1

+VCCP

+VCCP

+VCCP

+VCCP

+1.8V

+3VS

+DIMM_VREF

Title


Date: Sheet o f







LA-4421P 0.2

Calistoga(1/5)-GTL/DMI/DDR

Custom


2006/08/18 2007/8/18


Layout Note:H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /H_SWNG1 trace width and spacing is 10/20.

*Low = DMI x 2

High = DMI x 4CFG5

Strap Pin Table

Layout Note: +DIMM_VREF tracewidth and spacingis 20/20.

10uA

C be placed

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_DM0

DDR_A_DM3

DDR_A_DM1

DDR_A_DM4

DDR_A_DM6

DDR_A_DM2

DDR_A_DM5

DDR_A_DM7

DDR_A_DQS0

DDR_A_DQS2DDR_A_DQS1

DDR_A_DQS6

DDR_A_DQS3

DDR_A_DQS7

DDR_A_DQS4DDR_A_DQS5

DDR_A_DQS#1

DDR_A_DQS#4DDR_A_DQS#3

DDR_A_DQS#6

DDR_A_DQS#2

DDR_A_DQS#5

DDR_A_DQS#7

DDR_A_DQS#0

DDR_A_D43

DDR_A_D27

DDR_A_D32

DDR_A_D2

DDR_A_D58

DDR_A_D26

DDR_A_D49

DDR_A_D15

DDR_A_D11

DDR_A_D47

DDR_A_D41

DDR_A_D6

DDR_A_D42

DDR_A_D23

DDR_A_D5

DDR_A_D48

DDR_A_D46

DDR_A_D36

DDR_A_D40

DDR_A_D1

DDR_A_D8

DDR_A_D20

DDR_A_D54

DDR_A_D14

DDR_A_D10

DDR_A_D24

DDR_A_D63

DDR_A_D57

DDR_A_D39

DDR_A_D45

DDR_A_D37

DDR_A_D18

DDR_A_D9

DDR_A_D4

DDR_A_D30

DDR_A_D16

DDR_A_D13

DDR_A_D62

DDR_A_D17

DDR_A_D51

DDR_A_D19

DDR_A_D60

DDR_A_D53

DDR_A_D7

DDR_A_D61

DDR_A_D52

DDR_A_D3

DDR_A_D38

DDR_A_D50

DDR_A_D12

DDR_A_D44

DDR_A_D29

DDR_A_D59

DDR_A_D0

DDR_A_CAS#DDR_A_RAS#

DDR_A_WE#

DDR_A_D55

DDR_A_D22DDR_A_D21

DDR_A_D25

DDR_A_D34DDR_A_D35

DDR_A_D28

DDR_A_D33

DDR_A_D31

DDR_A_D56

DDR_A_MA13

DDR_A_MA11

DDR_A_MA1

DDR_A_MA6

DDR_A_MA9DDR_A_MA8

DDR_A_MA10

DDR_A_MA12

DDR_A_MA5

DDR_A_MA0

DDR_A_MA7

DDR_A_MA4

DDR_A_MA2DDR_A_MA3

DDR_A_DM[0..7]

DDR_A_DQS[0..7]

DDR_A_DQS#[0..7]

DDR_A_MA[0..13]

DDR_A_CAS#DDR_A_RAS#

DDR_A_WE#

DDR_A_D[0..63]

DDR_A_BS0DDR_A_BS1DDR_A_BS2

Title


Date: Sheet o f


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.


LA-4421P 0.2

Calistoga(2/5)-DDR2

Custom


2006/08/18 2007/8/18


DDR2 SYSTEM MEMORY

Calistoga-GSE_FCBGA998

U8C

SA_DQ_0AC31

SA_DQ_1AB28

SA_DQ_2AE33

SA_DQ_3AF32

SA_DQ_4AC33

SA_DQ_5AB32

SA_DQ_6AB31

SA_DQ_7AE31

SA_DQ_8AH31

SA_DQ_9AK31

SA_DQ_10AL28

SA_DQ_11AK27

SA_DQ_12AH30

SA_DQ_13AL32

SA_DQ_14AJ28

SA_DQ_15AJ27

SA_DQ_16AH32

SA_DQ_17AF31

SA_DQ_18AH27

SA_DQ_19AF28

SA_DQ_20AJ32

SA_DQ_21AG31

SA_DQ_22AG28

SA_DQ_23AG27

SA_DQ_24AN27

SA_DQ_25AM26

SA_DQ_26AJ26

SA_DQ_27AJ25

SA_DQ_28AL27

SA_DQ_29AN26

SA_DQ_30AH25

SA_DQ_31AG26

SA_DQ_32AM12

SA_DQ_33AL11

SA_DQ_34AH9

SA_DQ_35AK9

SA_DQ_36AM11

SA_DQ_37AK11

SA_DQ_38AM8

SA_DQ_39AK8

SA_DQ_40AG9

SA_DQ_41AF9

SA_DQ_42AF8

SA_DQ_43AK6

SA_DQ_44AF7

SA_DQ_45AG11

SA_DQ_46AJ6

SA_DQ_47AH6

SA_DQ_48AN6

SA_DQ_49AM6

SA_DQ_50AK3

SA_DQ_51AL2

SA_DQ_52AM5

SA_DQ_53AL5

SA_DQ_54AJ3

SA_DQ_55AJ2

SA_DQ_56AG2

SA_DQ_57AF3

SA_DQ_58AE7

SA_DQ_59AF6

SA_DQ_60AH5

SA_DQ_61AG3

SA_DQ_62AG5

SA_DQ_63AF5

SB_CAS#AG19

SB_RAS#AG21

SB_WE#AG20

SB_MA_0AN20

SB_MA_1AL21

SB_MA_2AK21

SB_MA_3AK22

SB_MA_4AL22

SB_MA_5AH22

SB_MA_6AG22

SB_MA_7AF21

SB_MA_8AM21

SB_MA_9AE21

SB_MA_10AL20

SB_MA_11AE22

SB_MA_12AE26

SB_MA_13AE20

SA_CAS#AJ17

SA_RAS#AK18

SA_RCVENIN#AN28

SA_RCVENOUT#AM28

SA_WE#AH17

SA_MA_0AJ15

SA_MA_1AM17

SA_MA_2AM15

SA_MA_3AH15

SA_MA_4AK15

SA_MA_5AN15

SA_MA_6AJ18

SA_MA_7AF19

SA_MA_8AN17

SA_MA_9AL17

SA_MA_10AG16

SA_MA_11AL18

SA_MA_12AG18

SA_MA_13AL14

SA_DQS#_0AC29

SA_DQS#_1AK30

SA_DQS#_2AJ33

SA_DQS#_3AM25

SA_DQS#_4AN8

SA_DQS#_5AJ8

SA_DQS#_6AM3

SA_DQS#_7AE2

SA_DQS_0AC28

SA_DQS_1AJ30

SA_DQS_2AK33

SA_DQS_3AL25

SA_DQS_4AN9

SA_DQS_5AH8

SA_DQS_6AM2

SA_DQS_7AE3

SA_DM_0AB30

SA_DM_1AL31

SA_DM_2AF30

SA_DM_3AK26

SA_DM_4AL9

SA_DM_5AG7

SA_DM_6AK5

SA_DM_7AH3

SA_BS_0AK12

SA_BS_1AH11

SA_BS_2AG17

SB_BS_0AH21

SB_BS_1AJ20

SB_BS_2AE27

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LCTLA_CLK

LCTLB_DATA

LCTLA_CLK

L_IBG

LCTLB_DATA

GMCH_CRT_R

GMCH_CRT_B

GMCH_CRT_G

LVDS_ACLK#LVDS_ACLK

LVDS_A0

LVDS_A1#

LVDS_A1

LVDS_A2#

LVDS_A2

LVDS_A0#

PEGCOMP

CRT_IREF

LVDS_SDALVDS_SCL

GMCH_CRT_G

GMCH_CRT_B

GMCH_CRT_RCLK_MCH_3GPLL#CLK_MCH_3GPLL

GMCH_CRT_DATA

GMCH_CRT_R

GMCH_CRT_VSYNCGMCH_CRT_HSYNC

GMCH_CRT_G

GMCH_CRT_CLK

GMCH_CRT_B

GMCH_ENVDD

LVDS_ACLKLVDS_ACLK#

LVDS_A0#LVDS_A1#LVDS_A2#

LVDS_A0LVDS_A1LVDS_A2

GMCH_ENBKL

LVDS_SCLLVDS_SDA

+3VS

+1.5VS

+1.5VS_PCIE

Title


Date: Sheet o f







LA-4421P 0.2

Calistoga(3/5)-VGA/LVDS/TV

B


2006/08/18 2007/8/18


Close to U8.H25

Disable TV

R38 1.5K_0402_1%12

R223 150_0402_1%12

R222 150_0402_1%12

R40 10K_0402_5%1 2

R4524.9_0402_1%

1 2

R224 100K_0402_5%12

R32 10K_0402_5%1 2

SDVO

LVDS

VGA

TV

MISC


U8F

SDVO_CTRLCLKJ27

G_CLKNY26

G_CLKPAA26

SDVO_CTRLDATAH27

TV_DACAA21

TV_DACBC20

TV_DACCE20

TV_IREFG23

TV_IRTNAB21

TV_IRTNBC21

TV_IRTNCD21

CRT_DDC_CLKH20

CRT_DDC_DATAH22

CRT_BLUEA24

CRT_BLUE#A23

CRT_GREENE25

CRT_GREEN#F25

CRT_REDC25

CRT_RED#D25

CRT_VSYNCF27

CRT_HSYNCD27

CRT_IREFH25

L_BKLTCTLH30

L_BKLTENG29

L_CLKCTLAF28

L_CTLBDATAE28

L_DDC_CLKG28

L_DDC_DATAH28

L_VDDENK30

L_IBGK27

L_VBGJ29

L_VREFHJ30

L_VREFLK29

LA_CLKND30

LA_CLKPC30

LA_DATAN_0G31

LA_DATAN_1F32

LA_DATAN_2D31

LA_DATAP_0H31

LA_DATAP_1G32

LA_DATAP_2C31

SDVO_REDN28

SDVO_GREENM32

SDVO_BLUEP33

SDVO_CLKPR32

SDVO_RED#P28

SDVO_GREEN#N32

SDVO_BLUE#P32

SDVO_CLKNT32

SDVO_TVCLKINM30

SDVO_INTP30

SDVO_FLDSTALLT30

SDVO_TVCLKIN#N30

SDVO_INT#R30

SDVO_FLDSTALL#T29

EXP_A_COMPIR28

EXP_A_ICOMPOM28

LB_DATAN_0F33

LB_DATAN_1D33

LB_DATAN_2F30

LB_DATAP_0E33

LB_DATAP_1D32

LB_DATAP_2F29

LB_CLKNA30

LB_CLKPA29

TV_DCONSEL0G26

TV_DCONSEL1J26

R39 255_0402_1%12

R225 150_0402_1%12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.5VS+VCCP

+VCCP

Title


Date: Sheet o f







LA-4421P 0.2

Calistoga(4/5)-PWR/GND

Custom


2006/08/18 2007/8/18


NC


U8G

NC1W33

NC2AM33

NC3AL33

NC4C33

NC5B33

NC6AN32

NC7A32

NC8AN31

NC9W28

NC10V27

NC11W29

NC12J24

NC13H24

NC14W32

NC15G24

NC16F24

NC17E24

NC18D24

NC19K33

NC20A31

NC21E21

NC22C23

NC23AN19

NC24AM19

NC25AL19

NC29AN3

NC30Y9

NC31J19

NC32H19

NC33G19

NC34F19

NC35E19

NC36D19

NC37C19

NC38B19

NC41G16

NC42F16

NC43E16

NC44D16

NC45C16

NC46B16

NC47AN2

NC49Y7

NC50AM4

NC51AF4

NC52AD4

NC53AL4

NC54AK4

NC57AH4

NC58AG4

NC59AE4

NC60AM1

NC64Y5

NC63AL1

NC62Y6

NC61W30

RESERVED26Y25

RESERVED27Y24

RESERVED28AB22

RESERVED29AB21

RESERVED30AB19

RESERVED31AB16

RESERVED32AB14

RESERVED33AA12

RESERVED34W24

RESERVED35AA24

RESERVED36AB24

RESERVED37AB20

RESERVED38AB18

RESERVED39AB15

RESERVED40AB13

RESERVED41AB12

NC28AH19

NC26AK19

NC27AJ19

NC39A19

NC40Y8

NC48A16

NC55W31

NC56AJ4

RESERVED42AB17

NC65Y10

NC66W10

NC67W25

NC68V24

NC69U24

NC70V10

NC71U10

NC72K18

VSS


U8E

VSS_1AH33

VSS_2Y33

VSS_3V33

VSS_4R33

VSS_6AK32

VSS_7AG32

VSS_8AE32

VSS_9AC32

VSS_10AA32

VSS_11U32

VSS_12H32

VSS_13E32

VSS_14C32

VSS_15AM31

VSS_16AJ31

VSS_17AA31

VSS_18U31

VSS_19T31

VSS_20R31

VSS_21P31

VSS_22N31

VSS_23M31

VSS_24J31

VSS_25F31

VSS_26AL30

VSS_27AG30

VSS_28AE30

VSS_29AC30

VSS_30AA30

VSS_31Y30

VSS_32V30

VSS_33U30

VSS_34G30

VSS_35E30

VSS_36B30

VSS_37AA29

VSS_38U29

VSS_39R29

VSS_40P29

VSS_41N29

VSS_42M29

VSS_43H29

VSS_44E29

VSS_45B29

VSS_46AK28

VSS_47AH28

VSS_48AE28

VSS_49AA28

VSS_50U28

VSS_51T28

VSS_52J28

VSS_53D28

VSS_54AM27

VSS_55AF27

VSS_56AB27

VSS_57AA27

VSS_58Y27

VSS_59U27

VSS_60T27

VSS_61R27

VSS_62P27

VSS_63N27

VSS_64M27

VSS_65G27

VSS_67C27

VSS_68B27

VSS_69AL26

VSS_71W26

VSS_72U26

VSS_73AN25

VSS_74AK25

VSS_77J25

VSS_78G25

VSS_79A25

VSS_80H23

VSS_81F23

VSS_111J16

VSS_112AL15

VSS_113AG15

VSS_114W15

VSS_115R15

VSS_116F15

VSS_117D15

VSS_118AM14

VSS_119AH14

VSS_120AE14

VSS_121H14

VSS_122B14

VSS_123F13

VSS_124D13

VSS_125AL12

VSS_126AG12

VSS_127H12

VSS_128B12

VSS_129AN11

VSS_130AJ11

VSS_131AE11

VSS_132AM9

VSS_134AB9

VSS_135W9

VSS_136R9

VSS_137M9

VSS_138J9

VSS_139F9

VSS_140C9

VSS_141A9

VSS_142AL8

VSS_143AG8

VSS_144AE8

VSS_145U8

VSS_146AA7

VSS_147V7

VSS_148R7

VSS_149N7

VSS_150H7

VSS_151E7

VSS_152B7

VSS_153AL6

VSS_154AG6

VSS_155AE6

VSS_156AB6

VSS_157W6

VSS_158T6

VSS_159M6

VSS_160K6

VSS_161AN5

VSS_162AJ5

VSS_163B5

VSS_164AA4

VSS_165V4

VSS_166R4

VSS_167N4

VSS_168K4

VSS_169H4

VSS_170E4

VSS_171AL3

VSS_172AD3

VSS_173W3

VSS_174T3

VSS_5G33

VSS_133AJ9

VSS_175B3

VSS_176AK2

VSS_177AH2

VSS_178AF2

VSS_179AB2

VSS_180M2

VSS_181K2

VSS_182H2

VSS_183F2

VSS_184V1

VSS_185R1

VSS_66E27

VSS_70AH26

VSS_75AG25

VSS_76AE25

VSS_82B23

VSS_84AJ22

VSS_85AF22

VSS_86G22

VSS_83AM22

VSS_87E22

VSS_88J21

VSS_89H21

VSS_90F21

VSS_91AM20

VSS_100AF18

VSS_99AH18

VSS_98AM18

VSS_96W19

VSS_95D20

VSS_94AF20

VSS_92AK20

VSS_93AH20

VSS_97R19

VSS_101U18

VSS_102H18

VSS_103D18

VSS_104AK17

VSS_105V17

VSS_106T17

VSS_107F17

VSS_108B17

VSS_109AH16

VSS_110U16

NCTF


U8H

VCC_NCTF1T25

VCC_NCTF2R25

VCC_NCTF3P25

VCC_NCTF4N25

VCC_NCTF5M25

VCC_NCTF6P24

VCC_NCTF7N24

VCC_NCTF8M24

VCC_NCTF9Y22

VCC_NCTF10W22

VCC_NCTF11V22

VCC_NCTF12U22

VCC_NCTF13T22

VCC_NCTF14R22

VCC_NCTF15P22

VCC_NCTF16N22

VCC_NCTF17M22

VCC_NCTF18Y21

VCC_NCTF19W21

VCC_NCTF20V21

VCC_NCTF21U21

VCC_NCTF22T21

VCC_NCTF23R21

VCC_NCTF24P21

VCC_NCTF25N21

VCC_NCTF26M21

VCC_NCTF27Y20

VCC_NCTF28W20

VCC_NCTF29V20

VCC_NCTF30U20

VCC_NCTF31T20

VCC_NCTF32R20

VCC_NCTF33P20

VCC_NCTF34N20

VCC_NCTF35M20

VCC_NCTF36Y19

VCC_NCTF37P19

VCC_NCTF38N19

VCC_NCTF39M19

VCC_NCTF40Y18

VCC_NCTF41P18

VCC_NCTF42N18

VCC_NCTF43M18

VCC_NCTF44Y17

VCC_NCTF45P17

VCC_NCTF46N17

VCC_NCTF47M17

VCC_NCTF48Y16

VCC_NCTF49P16

VCC_NCTF50N16

VCC_NCTF51M16

VCC_NCTF52Y15

VCC_NCTF53P15

VCC_NCTF54N15

VCC_NCTF55M15

VCC_NCTF56Y14

VCCAUX_NCTF1AD25

VCCAUX_NCTF2AC25

VCCAUX_NCTF3AB25

VCCAUX_NCTF4AD24

VCCAUX_NCTF5AC24

VCCAUX_NCTF6AD22

VCCAUX_NCTF7AD21

VCCAUX_NCTF8AD20

VCCAUX_NCTF9AD19

VCCAUX_NCTF10AD18

VCCAUX_NCTF11AD17

VCCAUX_NCTF12AD16

VCCAUX_NCTF13AD15

VCCAUX_NCTF14AD14

VCCAUX_NCTF15K14

VCCAUX_NCTF16AD13

VCCAUX_NCTF17Y13

VCCAUX_NCTF18W13

VCCAUX_NCTF19V13

VCCAUX_NCTF20U13

VCCAUX_NCTF21T13

VCCAUX_NCTF22R13

VCCAUX_NCTF23P13

VCCAUX_NCTF24N13

VCCAUX_NCTF25M13

VCCAUX_NCTF26AD12

VCCAUX_NCTF27Y12

VCCAUX_NCTF28W12

VSS_NCTF1AN33

VSS_NCTF2AA25

VSS_NCTF3V25

VSS_NCTF4U25

VSS_NCTF5AA22

VSS_NCTF6AA21

VSS_NCTF7AA20

VSS_NCTF8AA19

VSS_NCTF9AA18

VSS_NCTF10AA17

VSS_NCTF11AA16

VSS_NCTF12AA15

VSS_NCTF13AA14

VTT_NCTF1T10

VTT_NCTF2R10

VTT_NCTF3P10

VTT_NCTF4N10

VTT_NCTF5L10

VCC_NCTF57W14

VCC_NCTF58V14

VCC_NCTF59U14

VCC_NCTF60T14

VCC_NCTF61R14

VCCAUX_NCTF29V12

VCCAUX_NCTF30U12

VCCAUX_NCTF31T12

VCCAUX_NCTF32R12

VCCAUX_NCTF33P12

VCCAUX_NCTF34N12

VCCAUX_NCTF35M12

VCCAUX_NCTF36AD11

VCCAUX_NCTF37AD10

VCCAUX_NCTF38K10

VCC_NCTF62P14

VCC_NCTF63N14

VCC_NCTF64M14

VTT_NCTF6D1

VSS_NCTF14AA13

VSS_NCTF15A4

VSS_NCTF16A33

VSS_NCTF17B2

VSS_NCTF18AN1

VSS_NCTF19C1

RSVD_3M10

RSVD_4A18

RSVD_5AB10

RSVD_6AA10

CFG_19K28

RESERVED10K25

RESERVED11K26

RESERVED12R24

RESERVED13T24

RESERVED14K21

RESERVED15K19

RESERVED16K20

RESERVED17K24

RESERVED18K22

RESERVED19J17

RESERVED20K23

RESERVED21K17

RESERVED22K12

RESERVED23K13

RESERVED24K16

RESERVED25K15

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

U1_AA1

U1_A14

U1_F1

U1_A7

+1.5VS_3GPLL

+2.5VS_CRTDAC

+1.5VS

U1_AM32U1_AB33

+VCCP

+1.5VS

+VCCP

+1.5VS

+3VS

+1.8V

+1.5VS_MPLL+1.5VS_HPLL+1.5VS_DPLLA+1.5VS_DPLLB+1.5VS

+2.5VS

+1.5VS+1.5VS_3GPLL

+1.5VS_MPLL +1.5VS_HPLL

+1.5VS

+1.5VS_DPLLA+1.5VS_DPLLB

+1.5VS +1.5VS

+2.5VS

+2.5VS

+1.5VS_PCIE

+1.5VS_3GPLL+2.5VS

+2.5VS

+2.5VS+VCCP

+1.5VS

+2.5VS

+1.5VS

+1.5VS

+2.5VS

Title


Date: Sheet o f







LA-4421P 0.2

Calistoga(5/5)-PWR/GND

Custom


2006/08/18 2007/8/18


PCI-E/MEM/PSB PLL decoupling

45mA Max.

close pin B31

Route +2.5VS from GMCH pinN33 to

decoupling cap

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_DQS#7

DDR_A_D60

DDR_A_D39

DDR_A_D37

DDR_A_D14

DDR_A_DM1

DDR_A_D5

DDR_A_D27

DDR_A_D25

DDR_A_D16

DDR_A_D62

DDR_A_DQS7

M_CLK_DDR1

DDR_A_DQS5

DDR_A_DM4

DDR_A_DQS#3

DDR_A_D22

DDR_A_D12

DDR_CKE1

DDR_A_D15

M_CLK_DDR#0

DDR_A_D56

DDR_A_D43

DDR_A_DM5

DDR_A_DQS4DDR_A_DQS#4

DDR_A_D24

DDR_A_D10

DDR_A_DQS#0

DDR_A_D54

DDR_A_D57

DDR_A_D34

DDR_A_D2

DDR_A_D53DDR_A_D52

DDR_A_D29

DDR_A_D59

DDR_A_DQS#1

DDR_A_D3

DDR_A_DQS0

DDR_A_D1

DDR_A_D28

DDR_A_DQS#5

DDR_A_D30

DDR_A_D35

DDR_CKE0

DDR_A_DQS#2

DDR_A_D63

DDR_A_DQS3

DDR_A_DM0

DDR_A_D49

DDR_A_D61

M_CLK_DDR#1

DDR_A_D36DDR_A_D33

DDR_A_D17

DDR_A_DM6

DDR_A_D46

DDR_A_D7

CLK_SMBCLK

DDR_A_D58

DDR_A_D51

DDR_A_D0

DDR_A_D45

DDR_A_D31

DDR_A_D4

DDR_A_DQS1

DDR_A_D44

DDR_A_D38

DDR_A_D19

DDR_A_D20

DDR_A_D40

DDR_A_D32

M_CLK_DDR0

DDR_A_D47

CLK_SMBDATA

DDR_A_D50

DDR_A_DQS#6

DDR_A_D55

DDR_A_D21

DDR_A_D48

DDR_A_D42

DDR_A_D41

DDR_A_D9

DDR_A_DM2

DDR_A_D6

DDR_A_DM7

DDR_A_DQS6

DDR_A_BS2

DDR_A_D26

DDR_A_DM3

DDR_A_D18

DDR_A_DQS2

DDR_A_D11

DDR_A_D8

DDR_A_D23

DDR_A_D13

M_ODT1

DDR_A_BS1

DDR_A_MA4DDR_A_MA2

DDR_A_MA6

DDR_A_RAS#

DDR_A_MA11

DDR_CS1#

DDR_A_BS2

DDR_A_MA0

DDR_A_MA7

DDR_A_MA13

DDR_CKE1

DDR_A_BS0DDR_A_WE#

DDR_A_CAS#DDR_A_MA5

DDR_CKE0

DDR_A_MA9

DDR_A_MA10

DDR_A_MA12

DDR_A_MA8

M_ODT0

DDR_A_MA1DDR_A_MA3

DDR_CS0#

DDR_A_MA3

DDR_A_MA12

DDR_A_MA1

DDR_A_MA5

DDR_A_MA9DDR_A_MA8

DDR_CS1#DDR_A_CAS#

M_ODT1

DDR_A_WE#

DDR_A_MA10DDR_A_BS0

DDR_A_MA2DDR_A_MA0

DDR_A_MA11

DDR_A_BS1DDR_A_RAS#

DDR_A_MA6

M_ODT0

DDR_A_MA4

DDR_A_MA7

DDR_A_MA13

DDR_CS0#

M_CLK_DDR1

DDR_CKE1

CLK_SMBDATA

M_CLK_DDR#1

CLK_SMBCLK

M_CLK_DDR#0

DDR_A_BS2

M_CLK_DDR0

DDR_CKE0

DDR_A_DQS#[0..7]

DDR_A_DM[0..7]

DDR_A_D[0..63]

DDR_A_MA[0..13]

DDR_A_DQS[0..7]

PM_EXTTS#0

DDR_A_WE#DDR_A_BS0

DDR_A_CAS#DDR_CS1#

M_ODT1

DDR_A_BS1 DDR_A_RAS# DDR_CS0#

M_ODT0

+1.8V

+3VS

+3VS

+DIMM_VREF

+1.8V +1.8V

+0.9VS

+1.8V

+DIMM_VREF

+DIMM_VREF

+0.9VS

Title


Date: Sheet o f







LA-4421P0.2

DDRII-SODIMMA

B


2006/08/18 2007/8/18


20mils

DIMMA

Layout Note:Place near JDIM1

Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS

Share +DIMM_VREF for 1.DDRII VREF2.GMCH SM_VREF_0 SM_VREF_1

Layout Note:Place these resistorclosely DIMMA,alltrace lengthMax=1.3"

Layout Note:Place these resistorclosely DIMMA,alltrace length

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FSB

FSC

CLK_XTAL_IN

VGATE

CLK_XTAL_OUT

ITP_EN

H_STP_CPU#

CLK_SMBDATA

CLK_SMBCLK

CLK_SMBDATA

CLK_SMBCLK

CLK_PCIE_LAN

CLK_CPU_BCLK

CLK_PCIE_LAN#

CLK_CPU_BCLK#

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_MCH_DREFCLK

CLK_MCH_DREFCLK#

MCH_SSCDREFCLK

MCH_SSCDREFCLK#

FSA

FSB

FSC

CLK_XTAL_OUT

CLK_XTAL_IN

PCI2_TME

ITP_EN PCI4_SEL PCI2_TME

WLAN_CLKREQ#MCH_CLKREQ#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_WLAN#

CLK_PCIE_WLAN

CLK_PCIE_ICH#

CLK_PCIE_ICH

WLAN_CLKREQ#

MCH_CLKREQ#

CLKREQ_LAN#

PCI4_SEL

FSA

H_STP_PCI#

SATA_CLKREQ#

CLK_PCIE_SATA

CLK_PCIE_SATA#

SATA_CLKREQ#CLKREQ_LAN#

CLK_48M_CR

CLK_ICH_48M

CLK_ICH_14M

VGATE

H_STP_PCI#

H_STP_CPU#

CLK_PCI_ICH

ICH_SMBDATA

ICH_SMBCLK

CLK_SMBDATA

CLK_SMBCLK

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_CPU_BCLK#

CLK_CPU_BCLK

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_MCH_DREFCLK

CLK_MCH_DREFCLK#

MCH_SSCDREFCLK

MCH_SSCDREFCLK#

CPU_BSEL0

MCH_CLKSEL0

CPU_BSEL1

MCH_CLKSEL1

CPU_BSEL2

MCH_CLKSEL2

CLK_MCH_3GPLL#

CLK_MCH_3GPLL

CLK_PCIE_WLAN#

CLK_PCIE_WLAN

CLK_PCIE_ICH

CLK_PCIE_ICH#

WLAN_CLKREQ#

CLKREQ_LAN#

MCH_CLKREQ#

CLK_PCI_LPC

SATA_CLKREQ#

CLK_PCIE_SATA#

CLK_PCIE_SATA

CLK_48M_CR

+1.05VM_CK505

+3VM_CK505

+3VS

+3VS+3VM_CK505

+3VS

+1.05VM_CK505

+VCCP

+VCCP

+VCCP

+VCCP

+3VS+3VS +3VS

+3VS

Title


Date: Sheet o f







0.2

Clock Generator CK505


2007/10/15 2008/10/15


LA-4421P

SRC PORT LIST

REQ_3#

DEVICEPORT

REQ PORT LIST

REQ_4#REQ_6#REQ_7#REQ_9#REQ_10#REQ_11#REQ_A#

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#

1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS

PCIE_WLAN

PCIE_LAN

MCH_3GPLL

Routing the trace at least 10mil

1000

CLKSEL1

0

PCIMHz

266

SRCMHz

CPUMHzCLKSEL2

33.30

FSACLKSEL0

FSC FSB REFMHz

DOT_96MHz

USBMHz

14.318 96.0 48.0

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1 Reserved SA000020K00 (Silego : SLG8SP556VTR )

SA000020H10 (ICS : ICS9LPRS387AKLFT)

SRC10SRC11

PCIE_ICH

SRC6SRC4

MCH_3GPLL

SRC0

DEVICE

SRC3

MCH_DREFCLKSRC2

SRC7

SRC9SRC8

PCIE_LAN

PCIE_WLAN

For PCI2_TME:0=Overclocking of CPU and SRC allowed(ICS only) 1=Overclocking of CPU and SRC NOT allowed

PORT

PCIE_SATA

PCIE_SATA

R791K_0402_5%

1 2

C139

0.1U_0402_16V4Z

1

2

R690_0402_5%

1 2

R92

1K_0402_5%@1

2

C38710P_0402_50V8J@

1 2

R1190_0402_5%

1 2

C160

0.1U_0402_16V4Z

1

2

Y1

14.31818MHZ_16PF_DSX840GA

12

R71

10K_0402_5%

12

R91

2.2K_0402_5%

C38610P_0402_50V8J

@

1 2

R762.2K_0402_5%

12

R95

10K_0402_5%@1

2

R77

10K_0402_5%

@

12

R73

1K_0402_5%@

12

C169

0.1U_0402_16V4Z

1

2

R7522_0402_5%

1 2

R113

1K_0402_5%@1

2

R68

56_0402_5%@

12

C148

0.1U_0402_16V4Z

1

2

C138

0.1U_0402_16V4Z

1

2

R89

10K_0402_5%

12

R8033_0402_5% 1 2

R137 0_0805_5%1 2

C388

10P_0402_50V8J

@

1

2

C175

10U_0805_10V4Z

1

2

R85

10K_0402_5%@1

2

R138 0_0805_5%1 2

R87

0_0402_5%@

12

U4

SLG8SP556VTR_QFN72_10X10

CKPWRGD/PD#1

FS_B/TEST_MODE2

VSS_REF3

XTAL_OUT4

XTAL_IN5

VDD_REF6

REF_0/FS_C/TEST_7

REF_18

SDA9

SCL10

NC11

VDD_PCI12

PCI_113

PCI_214

PCI_315

PCI_4/SEL_LCDCL16

PCIF_5/ITP_EN17

VSS_PCI18

VDD_4819

USB_0/FS_A20

USB_1/CLKREQ_A#21

VSS_4822

VDD_IO23

SRC_0/DOT_9624

SRC_0#/DOT_96#25

VSS_IO26

VDD_PLL327

LCDCLK/27M28

LCDCLK#/27M_SS29

VSS_PLL330

VDD_PLL3_IO31

SRC_232

SRC_2#33

VSS_SRC34

SRC_335

SRC_3#36

VDD_CPU72

CPU_071

CPU_0#70

VSS_CPU69

CPU_168

CPU_1#67

VDD_CPU_IO66

CLKREQ_7#65

SRC_8/CPU_ITP64

SRC_8#/CPU_ITP#63

VDD_SRC_IO62

SRC_761

SRC_7#60

VSS_SRC59

CLKREQ_6#58

SRC_657

SRC_6#56

VDD_SRC55

PCI_STOP#54

CPU_STOP#53

VDD_SRC_IO52

SRC_10#51

SRC_1050

SLKREQ_10#49

SRC_1148

SRC_11#47

CLKREQ_11#46

SRC_9#45

SRC_944

CLKREQ_9#43

VSS_SRC42

CLKREQ_4#41

SRC_4#40

SRC_439

VDD_SRC_IO38

CLKREQ_3#37

VSS73

R106 10K_0402_5%12

R105 10K_0402_5%12

Q10A

2N7002DW-T/R7_SOT363-6

6 1

2

R10433_0402_5% 1 2

R9810K_0402_5%

12

C140

0.1U_0402_16V4Z

1

2

C173

0.1U_0402_16V4Z

1

2

Q10B

2N7002DW-T/R7_SOT363-6

3

5

4

R671K_0402_5%

1 2

C172

0.1U_0402_16V4Z

1

2

C146

0.1U_0402_16V4Z

1

2

R110

0_0402_5%@

12

R90

10K_0402_5%

12

C39012P_0402_50V8J

1 2

R72

2.2K_0402_5%

R1151K_0402_5%

1 2

R8633_0402_5% 1 2

C161 22P_0402_50V8J

R74

22_0402_5%1 2

C389

10P_0402_50V8J

@

1

2

R840_0402_5%

1 2

C137

0.1U_0402_16V4Z

1

2

C164 22P_0402_50V8J

C167

0.1U_0402_16V4Z

1

2

R121 10K_0402_5%12

C174

10U_0805_10V4Z

1

2

R78 10K_0402_5%12

C165

0.1U_0402_16V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LVDS_SDA

LVDS_SCL

BKOFF#LVDS_SDALVDS_SCL

BKOFF#INVT_PWM

+LCDVDD_L

+INVPWR_B+

+LCDVDD_L

LVDS_A0

LVDS_A2

LVDS_A0#

LVDS_A2#

LVDS_A1LVDS_A1#

LVDS_ACLKLVDS_ACLK#

BKOFF#

INVT_PWM

LVDS_SCL

LVDS_SDA

GMCH_ENVDD

BKOFF#

INVT_PWM

LVDS_A0#

LVDS_A2#

LVDS_A0

LVDS_A1

LVDS_A2

LVDS_A1#

LVDS_ACLK# LVDS_ACLK

+3VS

+LCDVDD

+LCDVDD+3VS+3VALW

+3VS

+LCDVDD

B+

Title


Date: Sheet o f







LA-4421P 0.2

LVDS /INVERTER

B


2006/08/18 2007/8/18


LCD/PANEL BD. Conn.

W=20mils

W=20mils

LCD POWER CIRCUIT

L8 FBMA-L11-201209-221LMA30T_0805

1 2

JLVDS1

ACES_87213-2000G

ME@

11

22

33

44

55

66

77

88

99

1010

1111

1212

1313

1414

1515

1616

1717

1818

1919

2020

GND21

GND22

C12

4.7U_0805_10V4Z

1 2

R219

47K_0402_5%

12

Q20

DTC124EK_SC59

2

13

R6

10K_0402_5%

12

R218150_0603_5%

12

G

D

S

Q212N7002_SOT23

2

13

R221

100K_0402_5%

12

L1 FBMA-L11-201209-221LMA30T_0805

1 2

G

D

S

Q22SI2301BDS_SOT23

2

13

C10

220P_0402_50V7K

12

C11220P_0402_50V7K

12

C18 0.1U_0603_50V4Z

C261

0.1U_0402_16V4Z

1

2

C260

4.7U_0805_10V4Z@

1

2

R7

10K_0402_5%

12

C262

0.1U_0402_16V4Z1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

GREEN

JVGA_VS

BLUE

RED

JVGA_HS

CRT_VSYNC_1

CRT_HSYNC_1

VGA_DDC_DAT

VGA_DDC_CLK

RED

JVGA_VS

BLUE

VGA_DDC_DAT

VGA_DDC_CLK

JVGA_HS

GREEN

GMCH_CRT_VSYNC

GMCH_CRT_DATA

GMCH_CRT_CLK

GMCH_CRT_B

GMCH_CRT_G

GMCH_CRT_R

GMCH_CRT_HSYNC

+CRT_VCC

+CRT_VCC

+CRT_VCC

+3VS

+3VS

+CRT_VCC+5VS

Title


Date: Sheet o f







LA-4421P 0.2

CRT PORT

B


2006/08/18 2007/8/18


Place closed to chipset

CRT PORT

W=40mils

Close to CRT CONN for ESD.

L15BK1608LL121-T_2P

1 2

C299

100P_0402_50V8J

@ 1

2

C30410P_0402_50V8J@

1

2

C30710P_0402_50V8J

@

1

2

L11 FCM1608CF-121T03_2P

1 2

C30610P_0402_50V8J@

1

2

L14BK1608LL121-T_2P

1 2

R253

150_0402_1%

12

C305

100P_0402_50V8J

@ 1

2

D17PSOT24C_SOT23-3

@

231

R246

2.2K_0402_5%

12

D2

RB491D_SOT23-3

21

3

R255

150_0402_1%

12

C123

0.1U_0402_16V4Z

1 2

C30210P_0402_50V8J

@

1

2

R24939_0402_5%

1 2

Q24A

2N7002DW-T/R7_SOT363-6

61

2

L13 FCM1608CF-121T03_2P

1 2

C301 0.1U_0402_16V4Z1 2

R24739_0402_5%

1 2

L12BK1608LL121-T_2P

1 2

Q24B

2N7002DW-T/R7_SOT363-6

3

5

4

U10

SN74AHCT1G125DCKR_SC70-5

A2

Y4OE#

1

G3

P5

R245

2.2K_0402_5%

12

R251

2.2K_0402_5%

12

R248

2.2K_0402_5%

12

C298 0.1U_0402_16V4Z

@

1 2

C310

22P_0402_50V8J

@

1

2

C303

22P_0402_50V8J

@

1

2

F1

1.1A_6V_SMD1812P110TF

2 1

C30010P_0402_50V8J

@

1

2

JCRT1

SUYIN_070546FR015SX28XR

ME@

61117

1228

1339

144

10155

1617

D18

PSOT24C_SOT23-3

@

231

C308

22P_0402_50V8J@

1

2

U11

SN74AHCT1G125DCKR_SC70-5

A2

Y4O

E#

1

G3

P5

R250

150_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#

PCI_FRAME#

PCI_IRDY#

PCI_PLOCK#

PCI_SERR#

PCI_PERR#

PCI_PIRQC#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQD#

PCI_PIRQH#

PCI_PIRQG#

PCI_PIRQF#

PCI_PIRQE#

PCI_REQ#0

PCI_REQ#2

PCI_REQ#1

PCI_REQ#3

CLK_PCI_ICH

PCI_REQ#3

PCI_SERR#

PCI_REQ#5

PCI_PIRQG#PCI_PIRQB# PCI_PIRQF#PCI_PIRQC#

PCI_PIRQE#

PCI_PIRQD#

PCI_PIRQA#

PCI_PIRQH#

PLTRST#

PCI_REQ#1

PCI_REQ#4

PCI_REQ#2

CLK_PCI_ICH

PCI_DEVSEL#

PCI_FRAME#PCI_TRDY#

PCI_PERR#

PCI_STOP#

PCI_IRDY#

PCI_PLOCK#

PCI_REQ#0

PCI_REQ#4

PCI_REQ#5

PLTRST#

PCI_RST#

PLTRST#

PCI_RST#

MCH_ICH_SYNC#

CLK_PCI_ICH

PCI_RST#

PLTRST#

+3VS

+3VS

Title


Date: Sheet o f







LA-4421P 0.2

ICH7M(1/4)HUB,PCI,HOST


2006/08/18 2007/8/18


Place closely pin A9

For EMI, close to ICH7

For EC request.

R150 8.2K_0402_5%1 2

R151 8.2K_0402_5%1 2

R130 8.2K_0402_5%1 2

C1868.2P_0402_50V8D

@1

2

R133 8.2K_0402_5%1 2

R142

100K_0402_5%

12

R152 8.2K_0402_5%1 2

R153 8.2K_0402_5%1 2

R155 8.2K_0402_5%1 2

C187

0.1U_0402_16V4Z

@

1

2

R132 8.2K_0402_5%1 2

R131 8.2K_0402_5%1 2

R156 8.2K_0402_5%1 2

R158 8.2K_0402_5%1 2

R160 8.2K_0402_5%1 2

R129 8.2K_0402_5%1 2

R146 8.2K_0402_5%1 2

R157 8.2K_0402_5%1 2

R127 8.2K_0402_5%1 2

R154 8.2K_0402_5%1 2

R159 8.2K_0402_5%1 2 R169

100K_0402_5%

1 2

R16710_0402_5%

@

12

R162 8.2K_0402_5%1 2

R126 8.2K_0402_5%1 2

R125 8.2K_0402_5%1 2

R128 8.2K_0402_5%1 2

C203

0.1U_0402_16V4Z

@

1

2

Interrupt I/F

PCI

MISC

U17B

ICH7_BGA652

FRAME#F16

GPIO17 / GNT5#D8

TRDY#F14

STOP#F15

GPIO2 / PIRQE#G8

GPIO3 / PIRQF#F7

GPIO4 / PIRQG#F8

GPIO5 / PIRQH#G7

C/BE0#B15

C/BE1#C12

C/BE2#D12

C/BE3#C15

IRDY#A7

PARE10

PCIRST#B18

DEVSEL#A12

PERR#C9

PLOCK#E11

SERR#B10

PIRQC#C5

RSVD[4]AH4

PIRQA#A3

RSVD[5]AD9

RSVD[2]AD5

RSVD[3]AG4

PIRQB#B4

PIRQD#B5

RSVD[1]AE5

REQ0#D7

GNT0#E7

REQ1#C16

GNT1#D16

REQ2#C17

GNT2#D17

REQ3#E13

GNT3#F13

REQ4# / GPIO22A13

GNT4# / GPIO48A14

GPIO1 / REQ5#C8

AD0E18

AD1C18

AD2A16

AD3F18

AD4E16

AD5A18

AD6E17

AD7A17

AD8A15

AD9C14

AD10E14

AD11D14

AD12B12

AD13C13

AD14G15

AD15G13

AD16E12

AD17C11

AD18D11

AD19A11

AD20A10

AD21F11

AD22F10

AD23E9

AD24D9

AD25B9

AD26A8

AD27A6

AD28C7

AD29B6

AD30E6

AD31D6

RSVD[6]AE9

RSVD[7]AG8

RSVD[8]AH8

RSVD[9]F21

MCH_SYNC#AH20

PLTRST#C26

PCICLKA9

PME#B19

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_FERR#

GATEA20

KB_RST#

IDE_DIORDY

ICH_INTVRMEN

ICH_RTCRST#

H_A20M#

H_INIT#

H_IGNNE#

LPC_AD0

LPC_FRAME#

LPC_AD3

H_DPSLP#

LPC_AD2LPC_AD1

H_PWRGOOD

THRMTRIP_ICH#

SM_INTRUDER#

H_DPRSTP#

ICH_RTCX1

HDA_SYNC_ICH

HDA_RST_ICH#

HDA_SDOUT_ICH

HDA_BITCLK_ICH

HDA_RST_ICH#

HDA_SYNC_ICH

ICH_RTCX2

ICH_INTVRMEN

SM_INTRUDER#

IDE_IRQIDE_DIORDY

H_INTR

H_SMI#H_NMI

H_STPCLK#

HDA_BITCLK_ICH

HDA_SDOUT_ICH

SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0SATA_ITX_DRX_N0SATA_ITX_DRX_P0

SATA_ITX_DRX_N0

SATA_ITX_DRX_P0SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N0

CLK_PCIE_SATA#CLK_PCIE_SATA

SATA_LED#

SATA_LED#

IDE_IRQ

SATA_DTX_C_IRX_N1SATA_DTX_C_IRX_P1SATA_ITX_DRX_N1SATA_ITX_DRX_P1

SATA_ITX_DRX_N1

SATA_ITX_DRX_P1SATA_ITX_C_DRX_P1

SATA_ITX_C_DRX_N1

LPC_AD[0..3]

H_A20M#

H_DPSLP#

H_FERR#

H_PWRGOOD

H_IGNNE#

H_INIT#

GATEA20

KB_RST#

H_THERMTRIP#

LPC_FRAME#

H_DPRSTP#

HDA_SDIN0

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

HDA_SDOUT_AUDIO

HDA_BITCLK_AUDIO

H_INTR

H_SMI# H_NMI

H_STPCLK#

SATA_ITX_C_DRX_N0

SATA_ITX_C_DRX_P0

SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0

CLK_PCIE_SATA#CLK_PCIE_SATA

SATA_LED#

SATA_DTX_C_IRX_N1SATA_DTX_C_IRX_P1

SATA_ITX_C_DRX_N1

SATA_ITX_C_DRX_P1

+RTCBATT

+VCCP

+3VS

+3VS

+VCCP

+RTCBATT

+RTCBATT

Title


Date: Sheet o f







LA-4421P 0.2

ICH7M(2/4)LAN,ATA,LPC,RTC

Custom


2006/08/18 2007/8/18


Layout note: R202 needs to placedwithin 2" of ICH7, R203 must be placedwithin 2" of R194 w/o stub.

R268 39_0402_5%1 2

J3

3MM@

21

C36339P_0402_50V8J

@

1

2

R203

56_0402_5%

12

T11 PAD

C382

3900P_0402_50V7K

1 2

R20856_0402_5%12

R2124.7K_0402_5% 1 2

R282 39_0402_5%1 2

C378

3900P_0402_50V7K

1 2

C384

3900P_0402_50V7K

1 2

C379

3900P_0402_50V7K

1 2

R277 39_0402_5%1 2

R288

10M_0402_5%

12

R198 1M_0402_5%

1 2

RTC

LAN

SATA

AC-97/AZALIA

LPC

CPU

IDE

U17A

ICH7_BGA652

RTXC1AB1

RTCX2AB2

RTCRST#AA3

INTVRMENW4

INTRUDER#Y5

EE_CSW1

EE_SHCLKY1

EE_DOUTY2

EE_DINW3

LAN_CLKV3

LAN_RSTSYNCU3

LAN_RXD0U5

LAN_RXD1V4

LAN_RXD2T5

LAN_TXD0U7

LAN_TXD1V6

LAN_TXD2V7

ACZ_BCLKU1

ACZ_SYNCR6

ACZ_RST#R5

ACZ_SDIN0T2

ACZ_SDIN1T3

ACZ_SDIN2T1

ACZ_SDOUTT4

SATALED#AF18

SATA0RXNAF3

SATA0RXPAE3

SATA0TXNAG2

SATA0TXPAH2

SATA2RXNAF7

SATA2RXPAE7

SATA2TXNAG6

SATA2TXPAH6

SATA_CLKNAF1

SATA_CLKPAE1

SATARBIASNAH10

SATARBIASPAG10

IORDYAG16

IDEIRQAH16

DDACK#AF16

DIOW#AH15

DIOR#AF15

LAD0AA6

LAD1AB5

LAD2AC4

LAD3Y6

LDRQ0#AC3

LDRQ1# / GPIO23AA5

LFRAME#AB3

A20GATEAE22

A20M#AH28

CPUSLP#AG27

TP1 / DPRSTP#AF24

TP2 / DPSLP#AH25

FERR#AG26

GPIO49 / CPUPWRGDAG24

IGNNE#AG22

INIT3_3V#AG21

INIT#AF22

INTRAF25

RCIN#AG23

SMI#AF23

NMIAH24

STPCLK#AH22

THERMTRIP#AF26

DA0AH17

DA1AE17

DA2AF17

DCS1#AE16

DCS3#AD16

DD0AB15

DD1AE14

DD2AG13

DD3AF13

DD4AD14

DD5AC13

DD6AD12

DD7AC12

DD8AE12

DD9AF12

DD10AB13

DD11AC14

DD12AF14

DD13AH13

DD14AH14

DD15AC15

DDREQAE15

R20224.9_0402_1%1 2

R205

24.9_0402_1%

1 2

Y332.768K_1TJS125BJ4A421P

OUT4

IN1

NC3

NC2

R197 332K_0402_1%

1 2

C231

0.1U_0402_16V4Z1

2

R20110K_0402_5% 12

R19620K_0402_5%

1 2

C37115P_0402_50V8J

12

R200 10K_0402_5%12

R284 39_0402_5%1 2

R204 8.2K_0402_5%1 2

C364

39P_0402_50V8J@1

2

C368

15P_0402_50V8J

12

C2301U_0603_10V4Z

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PM_BMBUSY#

SB_SPKR

LINKALERT#

CLK_ICH_48M

ITP_DBRESET#

SPI_MOSI

ICH_PCIE_WAKE#SPI_MOSI

EC_LID_OUT#

EC_SMI#

SB_SPI_CS#

PM_SLP_S4#

USB20_P1USB20_N1

ICH_PCIE_WAKE#

USB_OC#7

USB_OC#4

OCP#

ICH_LOW_BAT#

ICH_LOW_BAT#

USB20_N0USB20_P0

USB_OC#5

SB_SPI_CS#

EC_RSMRST#

SPI_MISO

USB_OC#6

ICH_SMBCLK

ICH_SMLINK1ICH_SMLINK0

LINKALERT#

OCP# PM_SLP_S5#

PM_SLP_S3#

PM_DPRSLPVR

USB20_N6USB20_P6

DMI_IRCOMP

ACIN

USB_OC#0USB_OC#1

DMI_TXN0

DMI_TXP1DMI_TXN1

DMI_RXN0

DMI_TXP0

DMI_RXN1DMI_RXP1

DMI_RXP0

USBRBIAS

PLTRST#

EC_THERM#

SERIRQ

CLK_PCIE_ICHCLK_PCIE_ICH#

ICH_SMBDATA

SPI_MISO

USB_OC#2

CLK_ICH_14M

CLK_ICH_48MCLK_ICH_14M

PBTN_OUT#

EC_SCI#

USB_OC#3USB20_N7

ICH_POK

USB20_P7

PM_CLKRUN#

H_STP_CPU#

VGATE

ITP_DBRESET#

ICH_RI#

PM_CLKRUN#

H_STP_PCI#

SERIRQ

PCIE_ITX_PRX_P2

PCIE_PTX_C_IRX_N3

PCIE_PTX_C_IRX_P2PCIE_PTX_C_IRX_N2

PCIE_ITX_PRX_N3

PCIE_ITX_PRX_N2

PCIE_ITX_PRX_P3

PCIE_PTX_C_IRX_P3

USB20_P2USB20_N2

USB20_N4USB20_P4

USB_OC#7

USB_OC#3

USB_OC#5

USB_OC#2

USB_OC#4

USB_OC#6 USB20_N5USB20_P5

USB20_P3USB20_N3

SATA_CLKREQ#

USB_OC#1

USB_OC#0

H_STP_PCI#H_STP_CPU#

SB_SPKR

PM_BMBUSY#

SERIRQEC_THERM#

VGATE

PM_SLP_S3#

PM_DPRSLPVR

CLK_PCIE_ICH# CLK_PCIE_ICH

EC_RSMRST#

PBTN_OUT#

ICH_POK

CLK_ICH_48M CLK_ICH_14M

USB20_N0 USB20_P0

USB_OC#0

EC_SCI#

EC_LID_OUT#

ICH_SMBDATAICH_SMBCLK

ICH_PCIE_WAKE#

EC_SMI#

USB20_N6 USB20_P6

PLTRST#

USB20_P1 USB20_N1

PM_SLP_S5#

ACIN

USB20_N7 USB20_P7

PM_SLP_S4#

PCIE_PTX_C_IRX_N3PCIE_PTX_C_IRX_P3

PCIE_ITX_C_PRX_P3

PCIE_PTX_C_IRX_P2

PCIE_ITX_C_PRX_P2

PCIE_PTX_C_IRX_N2

PCIE_ITX_C_PRX_N2

PCIE_ITX_C_PRX_N3

USB20_P2 USB20_N2

USB20_N4 USB20_P4 USB20_N5 USB20_P5

USB_OC#7

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0

DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

USB20_P3 USB20_N3

SATA_CLKREQ#

USB_OC#1

+3VALW

+3VS

+3VALW+3VALW

+1.5VS

+3VALW

+3VS

+3VALW

Title


Date: Sheet o f







LA-4421P 0.2

ICH7M(3/4)USB,GPIO,PCIE

Custom


2006/08/18 2007/8/18


Place closely pin B2 Place closely pin AC1

Within 500 mils

Within 500 mils

BT

USB1(Right)

CMOS

USB2(Right)

WLAN

LAN

USB3(Left)

WiMAX

WWAN

Card reader

T10PAD

R143

10K_0402_5%

12

R14510K_0402_5%

1 2

R168

10_0402_5%@

12

R258

2.2K_0402_5%

12

R259

2.2K_0402_5%

12

R16110K_0402_5%1 2

R1498.2K_0402_5%

12

PCI-EXPRESS

DIRECT MEDIA INTERFACE

USB

SPI

U17D

ICH7_BGA652

SPI_CLKR2

SPI_CS#P6

SPI_ARBP1

SPI_MOSIP5

SPI_MISOP2

DMI0RXNV26

DMI0RXPV25

DMI0TXNU28

DMI0TXPU27

DMI1RXNY26

DMI1RXPY25

DMI1TXNW28

DMI1TXPW27

DMI2RXNAB26

DMI2RXPAB25

DMI2TXNAA28

DMI2TXPAA27

DMI3RXNAD25

DMI3RXPAD24

DMI3TXNAC28

DMI3TXPAC27

DMI_CLKNAE28

DMI_CLKPAE27

DMI_ZCOMPC25

DMI_IRCOMPD25

PERn1F26

PERp1F25

PETn1E28

PETp1E27

PERn2H26

PERp2H25

PETn2G28

PETp2G27

PERn3K26

PERp3K25

PETn3J28

PETp3J27

PERn4M26

PERp4M25

PETn4L28

PETp4L27

PERn5P26

PERp5P25

PETn5N28

PETp5N27

PERn6T25

PERp6T24

PETn6R28

PETp6R27

OC0#D3

OC1#C4

OC2#D5

OC3#D4

OC4#E5

OC5# / GPIO29C3

OC6# / GPIO30A2

OC7# / GPIO31B3

USBP0NF1

USBP0PF2

USBP1NG4

USBP1PG3

USBP2NH1

USBP2PH2

USBP3NJ4

USBP3PJ3

USBP4NK1

USBP4PK2

USBP5NL4

USBP5PL5

USBP6NM1

USBP6PM2

USBP7NN4

USBP7PN3

USBRBIAS#D2

USBRBIASD1

R20910K_0402_5%

1 2

R19310K_0402_5%@

1 2

C337 0.1U_0402_10V7K12

C189

4.7P_0402_50V8C@

1

2

R19210K_0402_5%@

1 2

R14810K_0402_5%

1 2

R199

10_0402_5%@

12

SATA

POWER MGT

SYS

SMB

GPIO

Clocks

GPIO

GPIO

U17C

ICH7_BGA652

RI#A28

SPKRA19

SYS_RST#A22

SUS_STAT#A27

GPIO0 / BM_BUSY#AB18

GPIO26A21

GPIO27B21

GPIO28E23

GPIO32 / CLKRUN#AG18

GPIO33 / AZ_DOCK_EN#AC19

GPIO34 / AZ_DOCK_RST#U2

VRMPWRGDAD22

GPIO11 / SMBALERT#B23

SUSCLKC20

SLP_S3#B24

SLP_S4#D23

SLP_S5#F22

PWROKAA4

GPIO16 / DPRSLPVRAC22

TP0 / BATLOW#C21

PWRBTN#C23

LAN_RST#C19

RSMRST#Y4

GPIO21 / SATA0GPAF19

GPIO19 / SATA1GPAH18

GPIO36 / SATA2GPAH19

GPIO37 / SATA3GPAE19

CLK14AC1

CLK48B2

GPIO9E20

GPIO10A20

GPIO12F19

GPIO13E19

GPIO14R4

GPIO15E22

GPIO24R3

GPIO25D20

GPIO35 / SATAREQ#AD21

GPIO38AD20

GPIO39AE20

SMBCLKC22

SMBDATAB22

LINKALERT#A26

SMLINK0B25

SMLINK1A25

GPIO18 / STPPCI#AC20

GPIO20 / STPCPU#AF21

WAKE#F20

SERIRQAH21

THRM#AF20

GPIO6AC21

GPIO7AC18

GPIO8E21

R2108.2K_0402_5%

1 2

R211

8.2K_0402_5%

12

C240

4.7P_0402_50V8C@

1

2

R206 10K_0402_5%

1 2

R20710K_0402_5%1 2

C346 0.1U_0402_10V7K12

R181 22.6_0402_1%

1 2

R261

8.2K_0402_5%1 2

R147

10K_0402_5%

12

C350 0.1U_0402_10V7K12

R14410K_0402_5%

1 2

R180 24.9_0402_1%

1 2

R16310K_0402_5%1 2

C341 0.1U_0402_10V7K12

R1841K_0402_5%

1 2

R19510K_0402_5%@

1 2

R16410K_0402_5%1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5VS_DMIPLL

ICH_V5REF_RUN

ICH_V5REF_SUS

+1.5VS

+RTCBATT

+3VS

+1.5VS

+1.5VS

+3VS+5VS

+3VALW+5VALW

+1.5VS

+3VS

+3VS

+3VALW

+1.5VS

+1.5VS

+1.5VS_DMIPLLR

+3VS

+1.5VS

+3VS

+VCCP

+3VALW

+1.5VS

+3VS

+VCCP

+3VALW

+3VALW

+1.5VS_DMIPLL

+5VS +3VS +1.5VS +VCCP

Title


Date: Sheet o f


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.


LA-4421P 0.2

ICH7M(4/4)POWER/GND

Custom


2006/08/18 2007/8/18


Place closely pin AG28 within 100mlis.

Place closely pin

D28,T28,AD28.

Place closely pin AG5.

Place closely pin AG9.

0.94A

0.77A

0.27A

56mA

45mA

10mA

6mA

10mA

14mA

10mA

0.64A

50mA

EMI Request

C213

0.1U_0402_16V4Z

1

2

C222

0.1U_0402_16V4Z

1

2

C225

0.1U_0402_16V4Z

1

2

C216

0.1U_0402_16V4Z

1

2

R290

0_0805_5%

1 2

C233

0.1U_0402_16V4Z

1

2

R186

10_0402_5%

12

C224

0.1U_0402_16V4Z

1

2

C399

0.1U_0402_16V4Z

1

2

C206

0.1U_0402_16V4Z

1

2

C236 0.1U_0402_16V4Z

1 2

C235

0.1U_0402_16V4Z

1

2

C241

0.1U_0402_16V4Z

1

2

C212

0.1U_0402_16V4Z

1

2

C204

0.1U_0402_16V4Z

1

2

C215

1U_0603_10V4Z

1

2

C195

0.1U_0402_16V4Z

1

2

U17F

ICH7_BGA652

V5REF[1]G10

V5REF[2]AD17

V5REF_SusF6

Vcc1_5_B[1]AA22

Vcc1_5_B[2]AA23

Vcc1_5_B[3]AB22

Vcc1_5_B[4]AB23

Vcc1_5_B[5]AC23

Vcc1_5_B[6]AC24

Vcc1_5_B[7]AC25

Vcc1_5_B[8]AC26

Vcc1_5_B[9]AD26

Vcc1_5_B[10]AD27

Vcc1_5_B[11]AD28

Vcc1_5_B[12]D26

Vcc1_5_B[13]D27

Vcc1_5_B[14]D28

Vcc1_5_B[15]E24

Vcc1_5_B[16]E25

Vcc1_5_B[17]E26

Vcc1_5_B[18]F23

Vcc1_5_B[19]F24

Vcc1_5_B[20]G22

Vcc1_5_B[21]G23

Vcc1_5_B[22]H22

Vcc1_5_B[23]H23

Vcc1_5_B[24]J22

Vcc1_5_B[25]J23

Vcc1_5_B[26]K22

Vcc1_5_B[27]K23

Vcc1_5_B[28]L22

Vcc1_5_B[29]L23

Vcc1_5_B[30]M22

Vcc1_5_B[31]M23

Vcc1_5_B[32]N22

Vcc1_5_B[33]N23

Vcc1_5_B[34]P22

Vcc1_5_B[35]P23

Vcc1_5_B[36]R22

Vcc1_5_B[37]R23

Vcc1_5_B[38]R24

Vcc1_5_B[39]R25

Vcc1_5_B[41]T22

Vcc1_5_B[42]T23

Vcc1_5_B[43]T26

Vcc1_5_B[44]T27

Vcc1_5_B[45]T28

Vcc1_5_B[46]U22

Vcc1_5_B[47]U23

Vcc1_5_B[48]V22

Vcc1_5_B[49]V23

Vcc1_5_B[50]W22

Vcc1_5_B[52]Y22

Vcc1_5_B[53]Y23

Vcc1_5_B[51]W23

Vcc1_5_B[40]R26

Vcc3_3[1]B27

VccDMIPLLAG28

VccSATAPLLAD2

Vcc3_3[2]AH11

Vcc1_05[1]L11

Vcc1_05[2]L12

Vcc1_05[3]L14

Vcc1_05[4]L16

Vcc1_05[6]L18

Vcc1_05[5]L17

Vcc1_05[7]M11

Vcc1_05[8]M18

Vcc1_05[9]P11

Vcc1_05[10]P18

Vcc1_05[11]T11

Vcc1_05[12]T18

Vcc1_05[13]U11

Vcc1_05[14]U18

Vcc1_05[15]V11

Vcc1_05[16]V12

Vcc1_05[17]V14

Vcc1_05[18]V16

Vcc1_05[19]V17

Vcc1_05[20]V18

Vcc3_3 / VccHDAU6

VccSus3_3/VccSusHDAR7

V_CPU_IO[1]AE23

V_CPU_IO[2]AE26

V_CPU_IO[3]AH26

Vcc3_3[3]AA7

Vcc3_3[4]AB12

Vcc3_3[5]AB20

Vcc3_3[6]AC16

Vcc3_3[7]AD13

Vcc3_3[8]AD18

Vcc3_3[9]AG12

Vcc3_3[10]AG15

Vcc3_3[11]AG19

Vcc3_3[12]A5

Vcc3_3[14]B16

Vcc3_3[15]B7

Vcc3_3[16]C10

Vcc3_3[13]B13

Vcc3_3[17]D15

Vcc3_3[18]F9

Vcc3_3[19]G11

Vcc3_3[20]G12

VccRTCW5

VccSus3_3[1]P7

VccSus3_3[2]A24

VccSus3_3[4]D19

VccSus3_3[5]D22

VccSus3_3[6]G19

VccSus3_3[3]C24

VccSus3_3[7]K3

VccSus3_3[8]K4

VccSus3_3[9]K5

VccSus3_3[10]K6

VccSus3_3[11]L1

Vcc1_5_A[19]AB17

Vcc1_5_A[20]AC17

Vcc1_5_A[21]T7

Vcc1_5_A[22]F17

Vcc1_5_A[23]G17

Vcc1_5_A[24]AB8

Vcc1_5_A[25]AC8

VccSus1_05[1]K7

Vcc1_5_A[1]AB7

Vcc1_5_A[2]AC6

Vcc1_5_A[3]AC7

Vcc1_5_A[4]AD6

Vcc1_5_A[5]AE6

Vcc1_5_A[6]AF5

Vcc1_5_A[7]AF6

Vcc1_5_A[8]AG5

Vcc1_5_A[9]AH5

Vcc1_5_A[10]AB10

Vcc1_5_A[11]AB9

Vcc1_5_A[12]AC10

Vcc1_5_A[13]AD10

Vcc1_5_A[14]AE10

Vcc1_5_A[15]AF10

Vcc1_5_A[16]AF9

Vcc1_5_A[17]AG9

Vcc1_5_A[18]AH9

VccSus3_3[19]E3

VccUSBPLLC1

VccSus1_05/VccLAN1_05[1]AA2

VccSus1_05/VccLAN1_05[2]Y7

VccSus3_3/VccLAN3_3[1]V5

VccSus3_3/VccLAN3_3[2]V1

VccSus3_3/VccLAN3_3[3]W2

VccSus3_3/VccLAN3_3[4]W7

Vcc3_3[21]G16

VccSus3_3[12]L2

VccSus3_3[13]L3

VccSus3_3[14]L6

VccSus3_3[15]L7

VccSus3_3[16]M6

VccSus3_3[17]M7

VccSus3_3[18]N7

VccSus1_05[2]C28

VccSus1_05[3]G20

Vcc1_5_A[26]A1

Vcc1_5_A[27]H6

Vcc1_5_A[28]H7

Vcc1_5_A[29]J6

Vcc1_5_A[30]J7

C243

0.1U_0402_16V4Z

1

2

C247

4.7U_0805_10V4Z

1

2

C217

0.1U_0402_16V4Z

1

2

D12

RB751V-40TE17_SOD323-2@

12

U17E

ICH7_BGA652

VSS[0]A4

VSS[1]A23

VSS[2]B1

VSS[3]B8

VSS[4]B11

VSS[5]B14

VSS[6]B17

VSS[7]B20

VSS[8]B26

VSS[9]B28

VSS[10]C2

VSS[11]C6

VSS[12]C27

VSS[13]D10

VSS[14]D13

VSS[15]D18

VSS[16]D21

VSS[17]D24

VSS[18]E1

VSS[19]E2

VSS[21]E4

VSS[22]E8

VSS[23]E15

VSS[24]F3

VSS[25]F4

VSS[26]F5

VSS[27]F12

VSS[28]F27

VSS[29]F28

VSS[30]G1

VSS[31]G2

VSS[32]G5

VSS[33]G6

VSS[34]G9

VSS[35]G14

VSS[36]G18

VSS[37]G21

VSS[38]G24

VSS[39]G25

VSS[40]G26

VSS[41]H3

VSS[42]H4

VSS[43]H5

VSS[44]H24

VSS[45]H27

VSS[46]H28

VSS[47]J1

VSS[48]J2

VSS[49]J5

VSS[50]J24

VSS[51]J25

VSS[52]J26

VSS[53]K24

VSS[54]K27

VSS[55]K28

VSS[56]L13

VSS[57]L15

VSS[58]L24

VSS[59]L25

VSS[60]L26

VSS[61]M3

VSS[62]M4

VSS[63]M5

VSS[64]M12

VSS[65]M13

VSS[66]M14

VSS[67]M15

VSS[68]M16

VSS[69]M17

VSS[70]M24

VSS[71]M27

VSS[72]M28

VSS[73]N1

VSS[74]N2

VSS[75]N5

VSS[76]N6

VSS[77]N11

VSS[78]N12

VSS[79]N13

VSS[80]N14

VSS[81]N15

VSS[82]N16

VSS[83]N17

VSS[84]N18

VSS[85]N24

VSS[86]N25

VSS[87]N26

VSS[88]P3

VSS[89]P4

VSS[90]P12

VSS[91]P13

VSS[92]P14

VSS[93]P15

VSS[94]P16

VSS[95]P17

VSS[96]P24

VSS[97]P27

VSS[98]P28

VSS[99]R1

VSS[100]R11

VSS[101]R12

VSS[102]R13

VSS[103]R14

VSS[104]R15

VSS[105]R16

VSS[106]R17

VSS[107]R18

VSS[108]T6

VSS[109]T12

VSS[110]T13

VSS[111]T14

VSS[112]T15

VSS[113]T16

VSS[114]T17

VSS[115]U4

VSS[116]U12

VSS[117]U13

VSS[118]U14

VSS[119]U15

VSS[120]U16

VSS[121]U17

VSS[122]U24

VSS[123]U25

VSS[124]U26

VSS[125]V2

VSS[126]V13

VSS[127]V15

VSS[128]V24

VSS[129]V27

VSS[130]V28

VSS[131]W6

VSS[132]W24

VSS[133]W25

VSS[134]W26

VSS[135]Y3

VSS[136]Y24

VSS[137]Y27

VSS[138]Y28

VSS[139]AA1

VSS[140]AA24

VSS[141]AA25

VSS[142]AA26

VSS[143]AB4

VSS[144]AB6

VSS[145]AB11

VSS[146]AB14

VSS[147]AB16

VSS[148]AB19

VSS[149]AB21

VSS[150]AB24

VSS[151]AB27

VSS[152]AB28

VSS[153]AC2

VSS[154]AC5

VSS[155]AC9

VSS[156]AC11

VSS[157]AD1

VSS[158]AD3

VSS[159]AD4

VSS[160]AD7

VSS[161]AD8

VSS[162]AD11

VSS[163]AD15

VSS[164]AD19

VSS[165]AD23

VSS[166]AE2

VSS[167]AE4

VSS[168]AE8

VSS[169]AE11

VSS[170]AE13

VSS[171]AE18

VSS[172]AE21

VSS[173]AE24

VSS[174]AE25

VSS[175]AF2

VSS[176]AF4

VSS[177]AF8

VSS[178]AF11

VSS[179]AF27

VSS[180]AF28

VSS[181]AG1

VSS[182]AG3

VSS[183]AG7

VSS[184]AG11

VSS[185]AG14

VSS[186]AG17

VSS[187]AG20

VSS[188]AG25

VSS[189]AH1

Documents

Compal LA-5071P - Schematics. ...LA-4421P 0.2 Cover Page B Monday, April 06, 2009 1 42 2006/08/18 2007/8/18 Compal Electronics, Inc. Intel Diamondville Processor with Calistoga(945GSE)