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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Cover SheetCustom
1 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Compal ConfidentialSchematics Document
2009-07-24
Versace
REV:0.4
AUBURNDALE/CLARKSFIELD withIntel IBEX PEAK-M core logic
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Block DiagramCustom
2 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
File Name : VersaceCompal Confidential
Thermal SensorADM1032
Clock GeneratorICS9LPRS397
Fan ControlMobile
Socket-rPGA989
LPC BUS
& Card Reader
SATA ODD Connector
Intel Ibex Peak M
TPM1.2
Page 13
Page 28 page 31
Page 25
Page 28
Touch Pad CONN.
Int.KBD
SMSC KBC 1098
Card ReaderConn
10/100/1000 LANIntel Hanksville-LM
RJ45 CONN
PCI-E BUS
2.5" SATA HDD Connector
SATA0
SATA1
1394 port
MDC V1.5
Versace
Page 12
Page 9Page 4Page 4
Page 4,5,6,7,8
Page 34
Page 30
Page 13
Page 23
Page 22
Page 13,14,15,16,17,18
CK505
LCD conn
TrackPoint CONN.
BANK 0, 1, 2, 3DDR3-SO-DIMM X 2DDR3 1066/1333MHz 1.5V
Channel A
CRT+USB X2 CONN
SLB9635TT
92HD75
Audio CKT
USB x1(Sub/B for Exp Card)
USB conn x 1 (For I/O)USB2.0
daughter boardFingerPrinter VFM451USBx1
BT Conn USB x 1Azalia
DMI X4
CPU Qual Core
CRT to Docking
Express Card 54
Page 30
USB x1(Camera)
Page 25
Page 25
Page 25
Page 20
Page 20Page 19Page 29 Page 20
LIS302DLTRPage 31
Accelerometer
Super I/OLPC47N217
COM1 LPT( Docking ) ( Docking )
RJ11 CONN
DP conn
Docking CONN.(2) PS/2 Interfaces(2) USB 2.channels(2) SATA Channels (SATA3&4)(2) Display Port Channels (1) Serial Port(1) Parallel Port(1) Line In(1) Line Out(1) RJ45 (10/100/1000)(1) VGA(1) 2 LAN indicator LED's(1) Power Button(1) I2C interface
Page. 27
WLAN Card
Page 24
Mini-Card NAND Flash
PEG
Page 26
Page 33
Page 28 Page 28
XDP Conn.Page 4
1071pins25mm*27mm
37.5mm*37.5mm
Page 27SPI ROM4MB X 2
MXM 3.0 Type A ConnectorPage 21
Sub-board
Sub-board
Page 33USB x2(Docking)
82577LM
Braidwood
ONFI Interface
Page 28
Page 10BANK 0, 1, 2, 3DDR3-SO-DIMM X 2DDR3 1066/1333MHz 1.5V
Channel B
*
Page 32
PCI BUS
RICOH 835USB X1(WWAN Card)
Page 24
*
*
*: We will inatll them on same subboard via a board to board connector.
Display Port X 2Page 29(Docking) Clarkesfield
SATA2
ESATA Connector
Power On/Off CKT.
DC/DC Interface CKT.
Power OK CKT.Page 33
Page 34
Page 25
Page 29
LED
**
**:Daughtor board for stack-upUSB CONN and VGA CONN.
Page 13
Page 23
USB3.0 X 2
Page 27
Page 19USB X 2 (For I/O)
UPD720200F1
USB2.0
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Notes ListCustom
3 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
( O MEANS ON X MEANS OFF )Voltage Rails
O
O
X
+NVVDD
S3
+3VS
X
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
X X
+VCCP
powerplane
O
O
O
O
O
X
S5 S4/ Battery only
X X X
+B
State
+1.5VS
+1.5V
S5 S4/AC & Batterydon't exist
S5 S4/AC
+5VALW
S0
O
O
Symbol Note :
: means Digital Ground
: means Analog Ground
V VV
V
SENSOR
SMBCLK
SOURCE
SMSC1098
BATTTHERMAL
SODIMM CLK CHIP
SMBUS Control Table
SML0CLKSML0DATA
MINI CARD
SMBDATA
SMB_EC_CK1SMB_EC_DA1
Calpella
SML1CLKSML1DATA
NIC
XXX
X
XX X
X
X X
XX X
X
X
X
XX X
XX
VV V
+1.05VS
Calpella
Calpella
XDP G-SENSOR
VXXX
DOCK
V
XX
X
+3VL +0.75V
+1.8VS
+RTCVCC
O
O
O
O
O
O
8072@ : Install for 8072 NIC controller
8075@ : Install for 8075 NIC controller
1098@ : Install for 1098 KBC controller
1091@ : Install for 1091 KBC controller
@ : means just reserve , no build
DEBUG@ : means just build when PCIE port 80 CARD function enable.
CONN@ : means ME part.
45@ : means just put it in the BOM of 45 level.
Install below 45 level BOM structure for ver. 0.1
Install below 43 level BOM structure for ver. 0.1
Reserve below BOM structure for ver. 0.1
Remove before MP
CK32@ : Install for 32 pin CLOCK GEN
CK72@ : Install for 72 pin CLOCK GEN
M93@ : Install for M93 Graphic controller
M92@ : Install for M92 Graphic controller
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CPU_XDP
XDP_DBRESET#
XDP_PRDY#XDP_PREQ#
XDP_TMSXDP_TRST#
XDP_TDIXDP_TDOXDP_TDI_MXDP_TDO_M
TP_SKTOCC#
H_CATERR#
H_PECI_ISO
H_PROCHOT#_D
H_THERMTRIP#_RH_THERMTRIP#
H_PROCHOT#
H_CPURST#_R
H_PM_SYNC_R
H_CPURST#
VCCPWRGOOD_0
VCCPWRGOOD_1
VDDPWRGOOD_R
H_PWRGD_XDP_RH_PWRGD_XDP
PLT_RST#_R
SM_RCOMP0
SM_RCOMP2
XDP_BPM#4
XDP_BPM#6
XDP_BPM#3_R
XDP_BPM#0_R
XDP_BPM#2_R
XDP_BPM#5
XDP_BPM#7
XDP_BPM#1_R
XDP_TDO
H_CPUPWRGD
H_CPUPWRGD
PM_EXTTS#0PM_EXTTS#1
H_PWRGD_XDPXDP_DBRESET#_R
XDP_TCK
H_CPURST#
H_CPUPWRGD
XDP_TDI
XDP_TDO
H_CPUPWRGD_R
XDP_TMS
CLK_CPU_XDP#CLK_CPU_XDP
XDP_RST#_R
XDP_TRST#
PLT_RST#
XDP_DBRESET#
XDP_RST#_R
XDP_BPM#3XDP_BPM#2
XDP_BPM#0XDP_BPM#1
XDP_PREQ#XDP_PRDY#
XDP_BPM#5XDP_BPM#4
XDP_BPM#7XDP_BPM#6
SM_RCOMP1
H_CPURST#_R
VDDPWRGOOD_R
H_THERMTRIP#
H_THERMDC
FAN_PWM_OUT
H_PROCHOT#_D
XDP_TCK
CLK_CPU_XDP#
XDP_BPM#0XDP_BPM#1XDP_BPM#2XDP_BPM#3
H_THERMTRIP#
FAN_PWM
FAN_PWM
FAN_PWM_OUT
TACH
REMOTE2-
TACH
+3VS_THER
H_THERMDA
REMOTE2+H_THERMDC
H_THERMDA
VDDPWRGOOD_R
CLK_CPU_BCLK#_P 16
CLK_EXP# 14CLK_EXP 14
SM_DRAMRST# 11H_PECI16
H_PROCHOT#43
H_PM_SYNC15
H_THERMTRIP#16
PM_DRAM_PWRGD15
VTTPWRGOOD34
BUF_PLT_RST#16
H_CPUPWRGD16
PM_EXTTS#1_R 9,10
PM_PWRBTN#_R13,15
PLT_RST# 13,16,21,22,24,27,28,30
CLK_CPU_BCLK_P 16
XDP_DBRESET# 13,15
THERM_SCI#16,21
FAN_PWM31
XDP_BPM#05XDP_BPM#15
XDP_BPM#25XDP_BPM#35
CFG165CFG175
CFG9 5CFG8 5
CFG0 5CFG1 5
CFG2 5CFG3 5
CFG6 5CFG7 5
H_THERMTRIP#_U1 21
PWR_GD 11,13,31,34
SMB_CLK_S3 9,10,12,14,26
SMB_DATA_S39,10,12,14,26
CFG10 5CFG11 5
CFG4 5CFG5 5
VCCP_1.5VSPWRGD11
+VCCP
+VCCP
+VCCP
+VCCP
+3VS
+VCCP
+3VS
+3VS
+3VS
+3VS
+5VS+5VS+3VS
+VCCP
+VCCP
+3VS
+1.5VS_CPU_VDDQ
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Clarksfield(1/5)-Thermal/XDPCustom
4 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Layout rule 10mil wi: dth tracelength < 0.5", spacing 20mil
XDP ConnectorFAN Connector
place near the hottest spot area forNB & top SODIMM.
REMOTE thermal sensor
Layout Note:
Thermal Sensor EMC2113 with CPU PWM FAN
Place close to JCPU1.
Place close to JCPU1.
Removed RP1 & RP3 connect to U3. 10/27
Remove R6 & R7 connect to GND directly. 11/06Intel doc 395136:
Remove R37, R38, R39. 2/17
Change Q24.2 connect from +3VS to PWR_GD. 12/11
Change R5 to 22ohmfrom 68ohm. 11/30 Add C408. 11/30
Layout note:
Add PD R211 for FAN_PWM. 11/30
Remove D29 toprevent FAN fullyturn issue. 7/2
ChangeR10 to6.8K tosetup Q1E-diode1.12/04
Disconnect fromSMB_DATA/CLK_S3. 0206
Change R33, R34 value. 7/10
Delete R44, R46, R52, R53, R50 andshort XDP_TDI_M to XDP_TDO_M (pinsAR29 and AP29 of JCPU1) like DIOR
Follow DIOR's design. 2/20
2/20.
Swap. 02/25
1. Place C1 & C408 close to U1 pin.2. Place U1 close to JCFAN1.
1. Place Q1 close to bottom DDR DIMM.Layout note:
Change from +1.5V. 7/8
Install R133. 7/14
Intel S3
Intel S3
No install R41. 7/14
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
GND01OBSFN_A03OBSFN_A15GND27OBSDATA_A09OBSDATA_A111GND413OBSDATA_A215OBSDATA_A317GND619OBSFN_B021OBSFN_B123GND825OBSDATA_B027OBSDATA_B129GND1031OBSDATA_B233OBSDATA_B335GND1237PWRGOOD/HOOK039HOOK141VCC_OBS_AB43HOOK245HOOK347GND1449SDA51SCL53TCK155TCK057GND1659
GND1 2OBSFN_C0 4OBSFN_C1 6
GND3 8OBSDATA_C0 10OBSDATA_C1 12
GND5 14OBSDATA_C2 16OBSDATA_C3 18
GND7 20OBSFN_D0 22OBSFN_D1 24
GND9 26OBSDATA_D0 28OBSDATA_D1 30
GND11 32OBSDATA_D2 34OBSDATA_D3 36
GND13 38ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42VCC_OBS_CD 44
RESET#/HOOK6 46DBR#/HOOK7 48
GND15 50TD0 52
TRST# 54TDI 56
TMS 58GND17 60
T91PAD
EB
CQ1MMBT3904W_SOT323-3
2
31
R17 10K_0402_5%1 2
R51 51_0402_5%1 2
R48 1K_0402_5%1 2
R431K_0402_5%
12
R141 0_0402_5%1 2
R4 49.9_0402_1%1 2
R2 20_0402_1%1 2
R24 0_0402_5%1 2
R142 0_0402_5%1 2
R41
10K
_040
2_5%
@12
R12 100_0402_1%1 2
R35 10K_0402_5%1 2
R11 0_0402_5%1 2
R31 1.5K_0402_1%1 2
T90PAD
CLOCKS
MISCTHERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG
& BPM
JCPU1B
IC,AUB_CFD_rPGA,R1P0
SM_RCOMP[1] AM1SM_RCOMP[2] AN1
SM_DRAMRST# F6
SM_RCOMP[0] AL1
BCLK# B16BCLK A16
BCLK_ITP# AT30BCLK_ITP AR30
PEG_CLK# D16PEG_CLK E16
DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18
CATERR#AK14
COMP3AT23
PECIAT15
PROCHOT#AN26
THERMTRIP#AK15
RESET_OBS#AP26
VCCPWRGOOD_1AN14
VCCPWRGOOD_0AN27
SM_DRAMPWROKAK13
VTTPWRGOODAM15
RSTIN#AL14
PM_EXT_TS#[0] AN15PM_EXT_TS#[1] AP15
PRDY# AT28PREQ# AP27
TCK AN28TMS AP28
TRST# AT27
TDI AT29TDO AR27
TDI_M AR29TDO_M AP29
DBR# AN25
BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23
COMP2AT24
PM_SYNCAL15
TAPPWRGOODAM26
COMP1G16
COMP0AT26
SKTOCC#AH24
R20 10K_0402_5%1 2
R211 10K_0402_5%1 2
R15 130_0402_1%1 2
R751 1.1K_0402_1%@12
R126 0_0402_5%1 2
R42 51_0402_5%1 2
R34 750_0402_1%12
R40
10K
_040
2_5%
12
C1 2200P_0402_50V7K1 2
R13 10K_0402_5%1 2
R49 0_0402_5%1 2
R36 68_0402_5%@1 2
R19 0_0402_5%1 2
R522_0402_5%
12
C40.1U_0402_16V4Z@
1
2
R30 0_0402_5%1 2
JCFAN1
ACES_50273-0040N-001CONN@11 22 33 44
GND 5GND 6
R27 0_0402_5%1 2
R8 49.9_0402_1%1 2
C3100P_0402_50V8J
12
R9 2.05K_0402_1%1 2
R13310K_0402_5%
1 2
C2
0.1U
_040
2_16
V4Z
1
2
R47 0_0402_5%1 2
R32750_0402_1%
12
R3 49.9_0402_1%1 2
R10 6.8K_0402_5%1 2
R26 0_0402_5%1 2
R28 0_0402_5%1 2
U1EMC2113-2-AX_QFN16_4X4
DN1
ALERT#6
PWM_IN4
ADDR_SEL5
DP2
VDD3
TACH 10
SMCLK 9
TRIP_SET 14
SHDN_SEL 13
DP2/DN3 16
PWM 11
GND 12
SYS_SHDN#7
SMDATA8
DN2/DP3 15
GN
D17
T1PADG
D S
Q242N7002_SOT23-3
2
1 3
R1 20_0402_1%1 2
C4082200P_0402_50V7K1 2
R21 0_0402_5%1 2
R33 1.5K_0402_1%12
R127 0_0402_5%1 2
R14 24.9_0402_1%1 2
R29 68_0402_5%1 2
R45 1K_0402_5%1 2
R25 0_0402_5%1 2
R54 0_0402_5%@1 2
R16 0_0402_5%1 2
R22 0_0402_5%1 2
R1810K_0402_5%@
1 2
R23 51_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG14CFG15
CFG18
CFG0
CFG6
CFG13
CFG3
CFG9
CFG12
CFG2CFG1
PCIE_CRX_GTX_C_N5
PCIE_CRX_GTX_C_N10PCIE_CRX_GTX_C_N11
PCIE_CRX_GTX_C_N15
PCIE_CRX_GTX_C_N1
PCIE_CRX_GTX_C_N13
PCIE_CRX_GTX_C_N2
EXP_ICOMPI
PCIE_CRX_GTX_C_N12
PCIE_CRX_GTX_C_N4
PCIE_CRX_GTX_C_N7
PCIE_CRX_GTX_C_N14
PCIE_CRX_GTX_C_N6
PCIE_CRX_GTX_C_N9PCIE_CRX_GTX_C_N8
PCIE_CRX_GTX_C_N0
PCIE_CRX_GTX_C_N3
EXP_RBIAS
PCIE_CTX_GRX_C_N14
PCIE_CTX_GRX_C_N0
PCIE_CTX_GRX_C_N15
PCIE_CTX_GRX_C_N4
PCIE_CTX_GRX_C_N13
PCIE_CTX_GRX_C_N8
PCIE_CTX_GRX_C_N6
PCIE_CTX_GRX_C_N10
PCIE_CTX_GRX_C_N7
PCIE_CTX_GRX_C_N12
PCIE_CTX_GRX_C_N2
PCIE_CTX_GRX_C_N5
PCIE_CTX_GRX_C_N9
PCIE_CTX_GRX_C_N3
PCIE_CTX_GRX_C_N11
PCIE_CTX_GRX_C_N1
PCIE_CTX_GRX_C_P14PCIE_CTX_GRX_C_P15
PCIE_CTX_GRX_C_P10
PCIE_CTX_GRX_C_P0
PCIE_CTX_GRX_C_P7
PCIE_CTX_GRX_C_P13
PCIE_CTX_GRX_C_P4
PCIE_CTX_GRX_C_P6
PCIE_CTX_GRX_C_P8
PCIE_CTX_GRX_C_P5
PCIE_CTX_GRX_C_P3
PCIE_CTX_GRX_C_P12
PCIE_CTX_GRX_C_P9
PCIE_CTX_GRX_C_P1
PCIE_CTX_GRX_C_P11
PCIE_CTX_GRX_C_P2
CFG7
CFG16CFG17
CFG8
CFG3
CFG4
CFG4
CFG5
CFG7
CFG10CFG11
PCIE_CRX_GTX_C_P14PCIE_CRX_GTX_C_P15
PCIE_CRX_GTX_C_P10
PCIE_CRX_GTX_C_P4
PCIE_CRX_GTX_C_P7PCIE_CRX_GTX_C_P6
PCIE_CRX_GTX_C_P8
PCIE_CRX_GTX_C_P0
PCIE_CRX_GTX_C_P5
PCIE_CRX_GTX_C_P13PCIE_CRX_GTX_C_P12
PCIE_CRX_GTX_C_P9
PCIE_CRX_GTX_C_P3
PCIE_CRX_GTX_C_P11
PCIE_CRX_GTX_C_P1PCIE_CRX_GTX_C_P2
DMI_CTX_PRX_P015
DMI_CRX_PTX_P015
DMI_CTX_PRX_N115
DMI_CRX_PTX_N115
DMI_CTX_PRX_P315
DMI_CRX_PTX_P315
DMI_CTX_PRX_P215
DMI_CTX_PRX_N015
DMI_CRX_PTX_N315
DMI_CRX_PTX_P215
DMI_CTX_PRX_N315
DMI_CTX_PRX_P115
DMI_CRX_PTX_N015
DMI_CRX_PTX_N215
DMI_CRX_PTX_P115
DMI_CTX_PRX_N215
M_B_ODT2 10
M_B_ODT3 10
DDR_CS2_DIMMB# 10
DDR_CS3_DIMMB# 10
DDR_CKE2_DIMMB 10
DDR_CKE3_DIMMB 10
DDR_CS2_DIMMA# 9
DDR_CS3_DIMMA# 9
M_A_ODT2 9
M_A_ODT3 9
M_CLK_A_DDR#2 9
M_CLK_A_DDR#3 9
M_CLK_B_DDR#2 10
M_CLK_B_DDR#3 10
M_CLK_A_DDR2 9
M_CLK_A_DDR3 9
M_CLK_B_DDR2 10
M_CLK_B_DDR3 10
DDR_CKE2_DIMMA 9
DDR_CKE3_DIMMA 9
PCIE_CTX_GRX_N0 21PCIE_CTX_GRX_N1 21PCIE_CTX_GRX_N2 21PCIE_CTX_GRX_N3 21PCIE_CTX_GRX_N4 21PCIE_CTX_GRX_N5 21PCIE_CTX_GRX_N6 21PCIE_CTX_GRX_N7 21PCIE_CTX_GRX_N8 21PCIE_CTX_GRX_N9 21PCIE_CTX_GRX_N10 21PCIE_CTX_GRX_N11 21PCIE_CTX_GRX_N12 21PCIE_CTX_GRX_N13 21PCIE_CTX_GRX_N14 21PCIE_CTX_GRX_N15 21
PCIE_CTX_GRX_P0 21PCIE_CTX_GRX_P1 21PCIE_CTX_GRX_P2 21PCIE_CTX_GRX_P3 21PCIE_CTX_GRX_P4 21PCIE_CTX_GRX_P5 21PCIE_CTX_GRX_P6 21PCIE_CTX_GRX_P7 21PCIE_CTX_GRX_P8 21PCIE_CTX_GRX_P9 21PCIE_CTX_GRX_P10 21PCIE_CTX_GRX_P11 21PCIE_CTX_GRX_P12 21PCIE_CTX_GRX_P13 21PCIE_CTX_GRX_P14 21PCIE_CTX_GRX_P15 21
XDP_BPM#04XDP_BPM#14XDP_BPM#24XDP_BPM#34
CFG164CFG174
CFG84CFG94
CFG14CFG24
CFG04CFG34CFG44
CFG54CFG64
CFG74
CFG104CFG114
PCIE_CRX_GTX_N0 21PCIE_CRX_GTX_N1 21PCIE_CRX_GTX_N2 21PCIE_CRX_GTX_N3 21PCIE_CRX_GTX_N4 21PCIE_CRX_GTX_N5 21PCIE_CRX_GTX_N6 21PCIE_CRX_GTX_N7 21PCIE_CRX_GTX_N8 21PCIE_CRX_GTX_N9 21PCIE_CRX_GTX_N10 21PCIE_CRX_GTX_N11 21PCIE_CRX_GTX_N12 21PCIE_CRX_GTX_N13 21PCIE_CRX_GTX_N14 21PCIE_CRX_GTX_N15 21
PCIE_CRX_GTX_P0 21PCIE_CRX_GTX_P1 21PCIE_CRX_GTX_P2 21PCIE_CRX_GTX_P3 21PCIE_CRX_GTX_P4 21PCIE_CRX_GTX_P5 21PCIE_CRX_GTX_P6 21PCIE_CRX_GTX_P7 21PCIE_CRX_GTX_P8 21PCIE_CRX_GTX_P9 21PCIE_CRX_GTX_P10 21PCIE_CRX_GTX_P11 21PCIE_CRX_GTX_P12 21PCIE_CRX_GTX_P13 21PCIE_CRX_GTX_P14 21PCIE_CRX_GTX_P15 21
V_CPU_DDR_REF1
V_CPU_DDR_REF0
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Clarksfield(2/5)-DMI/PEG/FDICustom
5 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Layout rule trace len: gth < 0.5"
Tie FDI_F(L)SYNC[0:1]via 1 1K to GND. (11/05)
Intel doc 395136:
Add per XDP DG. 11/13
Change R120, R122, R123,R125 to NI. 11/30
Change net name. 7/9
C672 0.1U_0402_16V4Z1 2
R63 0_0402_5%@1 2
C12 0.1U_0402_16V4Z1 2
C664 0.1U_0402_16V4Z1 2
C683 0.1U_0402_16V4Z1 2R122 0_0402_5%@1 2
C33 0.1U_0402_16V4Z1 2
R64 0_0402_5%@1 2
C6 0.1U_0402_16V4Z1 2
C668 0.1U_0402_16V4Z1 2
C35 0.1U_0402_16V4Z1 2
R61 1K_0402_5%12
C34 0.1U_0402_16V4Z1 2
C686 0.1U_0402_16V4Z1 2
C21 0.1U_0402_16V4Z1 2
C9 0.1U_0402_16V4Z1 2
C680 0.1U_0402_16V4Z1 2
C690 0.1U_0402_16V4Z1 2
C8 0.1U_0402_16V4Z1 2
PCI
EXPR
ESS
-- GRAPHICS
DMIIntel(R) FDI
JCPU1A
IC,AUB_CFD_rPGA,R1P0
DMI_RX#[0]A24DMI_RX#[1]C23DMI_RX#[2]B22DMI_RX#[3]A21
DMI_RX[0]B24DMI_RX[1]D23DMI_RX[2]B23DMI_RX[3]A22
DMI_TX#[0]D24DMI_TX#[1]G24DMI_TX#[2]F23DMI_TX#[3]H23
DMI_TX[0]D25DMI_TX[1]F24
DMI_TX[3]G23 DMI_TX[2]E23
FDI_TX#[0]E22FDI_TX#[1]D21FDI_TX#[2]D19FDI_TX#[3]D18FDI_TX#[4]G21FDI_TX#[5]E19FDI_TX#[6]F21FDI_TX#[7]G18
FDI_TX[0]D22FDI_TX[1]C21FDI_TX[2]D20FDI_TX[3]C18FDI_TX[4]G22FDI_TX[5]E20FDI_TX[6]F20FDI_TX[7]G19
FDI_FSYNC[0]F17FDI_FSYNC[1]E17
FDI_INTC17
FDI_LSYNC[0]F18FDI_LSYNC[1]D17
PEG_ICOMPI B26PEG_ICOMPO A26
PEG_RBIAS A25PEG_RCOMPO B27
PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33
PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31
PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33
PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30
PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30
PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26
PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30
PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25
R60 3.01K_0402_1%12
C679 0.1U_0402_16V4Z1 2
R120 0_0402_5%@1 2
C22 0.1U_0402_16V4Z1 2
C677 0.1U_0402_16V4Z1 2
C691 0.1U_0402_16V4Z1 2
T16 PAD
C682 0.1U_0402_16V4Z1 2
C29 0.1U_0402_16V4Z1 2
R58 3.01K_0402_1%@12
RESE
RVED
JCPU1E
IC,AUB_CFD_rPGA,R1P0
CFG[0]AM30CFG[1]AM28CFG[2]AP31CFG[3]AL32CFG[4]AL30CFG[5]AM31CFG[6]AN29CFG[7]AM32CFG[8]AK32CFG[9]AK31CFG[10]AK28CFG[11]AJ28CFG[12]AN30CFG[13]AN32CFG[14]AJ32CFG[15]AJ29CFG[16]AJ30CFG[17]AK30
RSVD34 AH25RSVD35 AK26
RSVD38 AJ26
RSVD_NCTF_42 AT3
RSVD39 AJ27
RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2
RSVD_NCTF_43 AR1
RSVD_TP_86H16
RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33
RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35
RSVD58 AR32
RSVD_NCTF_30C35RSVD_NCTF_31B35
RSVD_NCTF_28A34RSVD_NCTF_29A33
RSVD27J28 RSVD26J29
RSVD16A19 RSVD15B19
RSVD17A20RSVD18B20
RSVD20T9 RSVD19U9
RSVD22AB9 RSVD21AC9
RSVD_NCTF_23C1RSVD_NCTF_24A3
RSVD_TP_66 AA5RSVD_TP_67 AA4RSVD_TP_68 R8
RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9
RSVD_TP_69 AD3
RSVD_TP_74 AG7
RSVD_TP_70 AD2
RSVD_TP_75 AE3
RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2
RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3
RSVD_TP_79 AD5
RSVD_TP_84 AE5
RSVD_TP_80 AD7
RSVD_TP_85 AD9
RSVD36 AL26RSVD_NCTF_37 AR2
RSVD1AP25RSVD2AL25RSVD3AL24RSVD4AL22RSVD5AJ33RSVD6AG9RSVD7M27RSVD8L28SA_DIMM_VREFJ17SB_DIMM_VREFH17RSVD11G25RSVD12G17RSVD13E31RSVD14E30
RSVD32 AJ13RSVD33 AJ12
RSVD_TP_59 E15RSVD_TP_60 F15
KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15
VSS AP34C31 0.1U_0402_16V4Z1 2
C36 0.1U_0402_16V4Z1 2
C28 0.1U_0402_16V4Z1 2
C15 0.1U_0402_16V4Z1 2
C7 0.1U_0402_16V4Z1 2
C692 0.1U_0402_16V4Z1 2
C26 0.1U_0402_16V4Z1 2
C23 0.1U_0402_16V4Z1 2
C17 0.1U_0402_16V4Z1 2
C5 0.1U_0402_16V4Z1 2
C665 0.1U_0402_16V4Z1 2
C681 0.1U_0402_16V4Z1 2
C678 0.1U_0402_16V4Z1 2
C27 0.1U_0402_16V4Z1 2
R125 0_0402_5%@1 2
C688 0.1U_0402_16V4Z1 2
C18 0.1U_0402_16V4Z1 2
R68 0_0402_5%@1 2
C11 0.1U_0402_16V4Z1 2
C689 0.1U_0402_16V4Z1 2
C14 0.1U_0402_16V4Z1 2
R55 49.9_0402_1%1 2
C25 0.1U_0402_16V4Z1 2
R123 0_0402_5%@1 2
C30 0.1U_0402_16V4Z1 2
C673 0.1U_0402_16V4Z1 2
C685 0.1U_0402_16V4Z1 2
C20 0.1U_0402_16V4Z1 2
R69 0_0402_5%@1 2
C32 0.1U_0402_16V4Z1 2
C13 0.1U_0402_16V4Z1 2
C675 0.1U_0402_16V4Z1 2R59 3.01K_0402_1%@12
C662 0.1U_0402_16V4Z1 2
C671 0.1U_0402_16V4Z1 2
C19 0.1U_0402_16V4Z1 2
C693 0.1U_0402_16V4Z1 2
C676 0.1U_0402_16V4Z1 2
C687 0.1U_0402_16V4Z1 2
C16 0.1U_0402_16V4Z1 2
C670 0.1U_0402_16V4Z1 2
C674 0.1U_0402_16V4Z1 2
R57 3.01K_0402_1%@12
R56 750_0402_1%1 2
C669 0.1U_0402_16V4Z1 2
C24 0.1U_0402_16V4Z1 2
C666 0.1U_0402_16V4Z1 2
C684 0.1U_0402_16V4Z1 2
R65 1K_0402_5%12
R70 0_0402_5%@1 2
C667 0.1U_0402_16V4Z1 2
C663 0.1U_0402_16V4Z1 2
C10 0.1U_0402_16V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63DDR_A_D62
DDR_A_D8
DDR_A_D3DDR_A_D4
DDR_A_D7
DDR_A_D5DDR_A_D6
DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56
DDR_A_D47DDR_A_D46
DDR_A_D42DDR_A_D43
DDR_A_D34
DDR_A_D39
DDR_A_D44DDR_A_D45
DDR_A_D35
DDR_A_D41DDR_A_D40
DDR_A_D38
DDR_A_D36DDR_A_D37
DDR_A_D32DDR_A_D33
DDR_A_D61DDR_A_D60
DDR_A_D2DDR_A_D1DDR_A_D0
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D48
DDR_A_D50DDR_A_D49
DDR_A_D52DDR_A_D53
DDR_A_D31
DDR_A_D14DDR_A_D15
DDR_A_D25DDR_A_D24
DDR_A_D26DDR_A_D27
DDR_A_D30
DDR_A_D9
DDR_A_D13DDR_A_D12
DDR_A_D10DDR_A_D11
DDR_A_D29DDR_A_D28
DDR_A_D19DDR_A_D20
DDR_A_D16
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D23
DDR_A_DQS#7
DDR_A_DQS#0
DDR_A_DQS#[0..7]
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#3
DDR_A_DQS#1
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DM7
DDR_A_DM[0..7]DDR_A_DM2
DDR_A_DM5DDR_A_DM4
DDR_A_DM1
DDR_A_DM6
DDR_A_DM3
DDR_A_DM0
DDR_A_MA5
DDR_A_MA0
DDR_A_MA9
DDR_A_MA14
DDR_A_MA[0..15]
DDR_A_MA11
DDR_A_MA4
DDR_A_MA7DDR_A_MA6
DDR_A_MA10
DDR_A_MA1
DDR_A_MA12
DDR_A_MA2
DDR_A_MA13
DDR_A_MA3
DDR_A_MA8
DDR_B_D3
DDR_B_D51
DDR_B_D56
DDR_B_D9
DDR_B_D31
DDR_B_D39
DDR_B_D49
DDR_B_D54
DDR_B_D57
DDR_B_D24
DDR_B_D10
DDR_B_D1
DDR_B_D6
DDR_B_D44DDR_B_D43
DDR_B_D20
DDR_B_D42
DDR_B_D55
DDR_B_D15
DDR_B_D34
DDR_B_D23
DDR_B_D60
DDR_B_D33
DDR_B_D11
DDR_B_D41
DDR_B_D45
DDR_B_D0
DDR_B_D48
DDR_B_D50
DDR_B_D38
DDR_B_D21
DDR_B_D32
DDR_B_D22
DDR_B_D4
DDR_B_D14
DDR_B_D27
DDR_B_D25
DDR_B_D62
DDR_B_D59
DDR_B_D19
DDR_B_D52
DDR_B_D7
DDR_B_D5
DDR_B_D17
DDR_B_D58
DDR_B_D30
DDR_B_D26
DDR_B_D36
DDR_B_D13
DDR_B_D53
DDR_B_D18
DDR_B_D8
DDR_B_D35
DDR_B_D46
DDR_B_D12
DDR_B_D47
DDR_B_D28
DDR_B_D2
DDR_B_D37
DDR_B_D63
DDR_B_D40
DDR_B_D29
DDR_B_D61
DDR_B_D16
DDR_A_MA15
DDR_A_DQS[0..7]
DDR_A_DQS0
DDR_A_DQS2DDR_A_DQS1
DDR_A_DQS6DDR_A_DQS5DDR_A_DQS4DDR_A_DQS3
DDR_A_DQS7
DDR_B_MA0
DDR_B_MA9
DDR_B_MA7
DDR_B_MA13
DDR_B_MA2
DDR_B_MA4
DDR_B_MA11
DDR_B_MA3
DDR_B_MA5DDR_B_MA6
DDR_B_MA10
DDR_B_MA8
DDR_B_MA1
DDR_B_MA12
DDR_B_MA14DDR_B_MA15
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_DQS#5DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM3
DDR_B_DM1
DDR_B_DM5
DDR_B_DM0
DDR_B_DM6DDR_B_DM7
DDR_B_DM4
DDR_B_DM2DDR_B_DM[0..7]
DDR_B_DQS#[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_A_D[0..63]DDR_B_D[0..63]
DDR_A_MA[0..15] 9
DDR_A_DM[0..7] 9
DDR_A_BS09DDR_A_BS19DDR_A_BS29
DDR_A_WE#9DDR_A_RAS#9DDR_A_CAS#9
DDR_B_BS010DDR_B_BS110DDR_B_BS210
DDR_B_WE#10DDR_B_RAS#10DDR_B_CAS#10
M_CLK_A_DDR0 9M_CLK_A_DDR#0 9DDR_CKE0_DIMMA 9
M_CLK_A_DDR1 9M_CLK_A_DDR#1 9DDR_CKE1_DIMMA 9
DDR_CS0_DIMMA# 9DDR_CS1_DIMMA# 9
M_A_ODT0 9M_A_ODT1 9
M_B_ODT0 10M_B_ODT1 10
DDR_CS0_DIMMB# 10DDR_CS1_DIMMB# 10
DDR_A_DQS#[0..7] 9
DDR_A_DQS[0..7] 9
DDR_B_MA[0..15] 10
DDR_B_DM[0..7] 10
DDR_B_DQS[0..7] 10
DDR_B_DQS#[0..7] 10
DDR_A_D[0..63]9DDR_B_D[0..63]10
M_CLK_B_DDR0 10M_CLK_B_DDR#0 10DDR_CKE0_DIMMB 10
M_CLK_B_DDR1 10M_CLK_B_DDR#1 10DDR_CKE1_DIMMB 10
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Clarksfield(2/6)-DDR3 A/B CHCustom
6 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
DDR
SYST
EM M
EMORY - B
JCPU1D
IC,AUB_CFD_rPGA,R1P0
SB_BS[0]AB1SB_BS[1]W5SB_BS[2]R7
SB_CAS#AC5SB_RAS#Y7SB_WE#AC6
SB_CK[0] W8
SB_CK[1] V7
SB_CK#[0] W9
SB_CK#[1] V6
SB_CKE[0] M3
SB_CKE[1] M2
SB_CS#[0] AB8SB_CS#[1] AD6
SB_ODT[0] AC7SB_ODT[1] AD1
SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8
SB_DQS[4] AG2
SB_DQS#[4] AH2
SB_DQS[5] AL5
SB_DQS#[5] AL4
SB_DQS[6] AP5
SB_DQS#[6] AR5
SB_DQS[7] AR7
SB_DQS#[7] AR8
SB_DQS[0] C5
SB_DQS#[0] D5
SB_DQS[1] E3
SB_DQS#[1] F4
SB_DQS[2] H4
SB_DQS#[2] J4
SB_DQS[3] M5
SB_DQS#[3] L4
SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5
SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1
SB_DQ[0]B5SB_DQ[1]A5SB_DQ[2]C3SB_DQ[3]B3SB_DQ[4]E4SB_DQ[5]A6SB_DQ[6]A4SB_DQ[7]C4SB_DQ[8]D1SB_DQ[9]D2SB_DQ[10]F2SB_DQ[11]F1SB_DQ[12]C2SB_DQ[13]F5SB_DQ[14]F3SB_DQ[15]G4SB_DQ[16]H6SB_DQ[17]G2SB_DQ[18]J6SB_DQ[19]J3SB_DQ[20]G1SB_DQ[21]G5SB_DQ[22]J2SB_DQ[23]J1SB_DQ[24]J5SB_DQ[25]K2SB_DQ[26]L3SB_DQ[27]M1SB_DQ[28]K5SB_DQ[29]K4SB_DQ[30]M4SB_DQ[31]N5SB_DQ[32]AF3SB_DQ[33]AG1SB_DQ[34]AJ3SB_DQ[35]AK1SB_DQ[36]AG4SB_DQ[37]AG3SB_DQ[38]AJ4SB_DQ[39]AH4SB_DQ[40]AK3SB_DQ[41]AK4SB_DQ[42]AM6SB_DQ[43]AN2SB_DQ[44]AK5SB_DQ[45]AK2SB_DQ[46]AM4SB_DQ[47]AM3SB_DQ[48]AP3SB_DQ[49]AN5SB_DQ[50]AT4SB_DQ[51]AN6SB_DQ[52]AN4SB_DQ[53]AN3SB_DQ[54]AT5SB_DQ[55]AT6SB_DQ[56]AN7SB_DQ[57]AP6SB_DQ[58]AP8SB_DQ[59]AT9SB_DQ[60]AT7SB_DQ[61]AP9SB_DQ[62]AR10SB_DQ[63]AT10
DDR
SYST
EM M
EMORY A
JCPU1C
IC,AUB_CFD_rPGA,R1P0
SA_BS[0]AC3SA_BS[1]AB2SA_BS[2]U7
SA_CAS#AE1SA_RAS#AB3SA_WE#AE9
SA_CK[0] AA6
SA_CK[1] Y6
SA_CK#[0] AA7
SA_CK#[1] Y5
SA_CKE[0] P7
SA_CKE[1] P6
SA_CS#[0] AE2SA_CS#[1] AE8
SA_ODT[0] AD8SA_ODT[1] AF9
SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13
SA_DQS[0] C8
SA_DQS#[0] C9
SA_DQS[1] F9
SA_DQS#[1] F8
SA_DQS[2] H9
SA_DQS#[2] J9
SA_DQS[3] M9
SA_DQS#[3] N9
SA_DQS[4] AH8
SA_DQS#[4] AH7
SA_DQS[5] AK10
SA_DQS#[5] AK9
SA_DQS[6] AN11
SA_DQS#[6] AP11
SA_DQS[7] AR13
SA_DQS#[7] AT13
SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6
SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9
SA_DQ[0]A10SA_DQ[1]C10SA_DQ[2]C7SA_DQ[3]A7SA_DQ[4]B10SA_DQ[5]D10SA_DQ[6]E10SA_DQ[7]A8SA_DQ[8]D8SA_DQ[9]F10SA_DQ[10]E6SA_DQ[11]F7SA_DQ[12]E9SA_DQ[13]B7SA_DQ[14]E7SA_DQ[15]C6SA_DQ[16]H10SA_DQ[17]G8SA_DQ[18]K7SA_DQ[19]J8SA_DQ[20]G7SA_DQ[21]G10SA_DQ[22]J7SA_DQ[23]J10SA_DQ[24]L7SA_DQ[25]M6SA_DQ[26]M8SA_DQ[27]L9SA_DQ[28]L6SA_DQ[29]K8SA_DQ[30]N8SA_DQ[31]P9SA_DQ[32]AH5SA_DQ[33]AF5SA_DQ[34]AK6SA_DQ[35]AK7SA_DQ[36]AF6SA_DQ[37]AG5SA_DQ[38]AJ7SA_DQ[39]AJ6SA_DQ[40]AJ10SA_DQ[41]AJ9SA_DQ[42]AL10SA_DQ[43]AK12SA_DQ[44]AK8SA_DQ[45]AL7SA_DQ[46]AK11SA_DQ[47]AL8SA_DQ[48]AN8SA_DQ[49]AM10SA_DQ[50]AR11SA_DQ[51]AL11SA_DQ[52]AM9SA_DQ[53]AN9SA_DQ[54]AT11SA_DQ[55]AP12SA_DQ[56]AM12SA_DQ[57]AN12SA_DQ[58]AM13SA_DQ[59]AT14SA_DQ[60]AT12SA_DQ[61]AL13SA_DQ[62]AR14SA_DQ[63]AP14
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSEVSSSENSE
VCC_SENSE
VSS_SENSE
+VTT_43
H_VID1
H_VID4H_VID3
H_VID5
VCC_SENSE
H_VID2
PM_DPRSLPVR_R
H_VID0
VSS_SENSE
H_VID6
+VTT_44
PSI# 43
H_VID[0..6] 43
PROC_DPRSLPVR 43
H_VTTVID1 40
IMVP_IMON 43
VTT_SENSE 40
VCCSENSE 43VSSSENSE 43
VSS_SENSE_VTT 40
+CPU_CORE
+CPU_CORE
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP+VCCP
+1.8VS
+VCCP
+CPU_CORE
+1.5VS_CPU_VDDQ
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Clarksfield(4/5)-PWRCustom
7 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
H_VTTVID1 = Low, 1.1V
H_VTTVID1 = High, 1.05V
48A
15A
18A
3A
0.6A
Close to CPU
Update 10/27
Chnage 10uF to 22uF for DB1.12/03
Chnage 10uFto 22uF forDB1. 12/03
Chnage 10uFto 22uF forDB1. 12/03
Chnage 10uFto 22uF forDB1. 12/03
Chnage 10uF to 22uF DB1. 12/16
Del C81, C82. 5/15
Intel S3
Remove C54. 7/14
C56
1U_0603_10V
4Z
1
2
C50
10U_0805_6.3V
6M
1
2
C41
22U_0805_6.3V
6M
1
2
C64
22U_0805_6.3V
6M
1
2
C40
22U_0805_6.3V
6M
1
2
POWER
GRAPHICS
VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI
PEG & DMI
SENSE
LINES
1.1V
1.8V
JCPU1G
IC,AUB_CFD_rPGA,R1P0
GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24
GFX_VR_EN AR25GFX_DPRSLPVR AT25
GFX_IMON AM24
VAXG_SENSE AR22VSSAXG_SENSE AT22
VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16
VTT1_45J24VTT1_46J23VTT1_47H25
VTT1_48K26VTT1_49J27VTT1_50J26VTT1_51J25VTT1_52H27VTT1_53G28VTT1_54G27VTT1_55G26VTT1_56F26VTT1_57E26VTT1_58E25
VDDQ1 AJ1VDDQ2 AF1VDDQ3 AE7VDDQ4 AE4VDDQ5 AC1VDDQ6 AB7VDDQ7 AB4VDDQ8 Y1VDDQ9 W7
VDDQ10 W4VDDQ11 U1VDDQ12 T7VDDQ13 T4VDDQ14 P1VDDQ15 N7VDDQ16 N4VDDQ17 L1VDDQ18 H1
VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10
VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26
VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19
C69
22U_0805_6.3V
6M
1
2
C71
22U_0805_6.3V
6M
1
2
C74
1U_0402_6.3V
4Z
1
2
C43
10U_0805_6.3V
6M
1
2
C57
1U_0603_10V
4Z
1
2
R78 100_0402_1%1 2
C39
22U_0805_6.3V
6M
1
2
C62
22U_0805_6.3V
6M
1
2
R71 4.7K_0402_5%1 2
C61
22U_0805_6.3V
6M
1
2
C70
22U_0805_6.3V
6M
1
2
R72 10K_0402_5%@1 2
C79
47P
_040
2_50
V8J
@1
2
R76 0_0402_5%1 2
C55
1U_0603_10V
4Z1
2
C51
10U_0805_6.3V
6M
1
2
C38 10U
_0805_6.3V6M
@1
2
C48
47P
_040
2_50
V8J
@1
2
R75 0_0603_5%1 2
C45
10U_0805_6.3V
6M
1
2
R79 0_0402_5%1 2
C47
47P
_040
2_50
V8J
@1
2
R80 0_0402_5%1 2
R74 0_0603_5%1 2
C49
47P
_040
2_50
V8J
@1
2
C42
10U_0805_6.3V
6M
1
2
C44
10U_0805_6.3V
6M
1
2
C65
22U_0805_6.3V
6M
1
2
C80
47P
_040
2_50
V8J
@1
2
C72
22U_0805_6.3V
6M
1
2
C67
10U_0805_6.3V
6M
1
2
C77
4.7U_0603_6.3V
6K
1
2
R77 100_0402_1%1 2
C73
22U_0805_6.3V
6M
1
2
C63
22U_0805_6.3V
6M
1
2
C46
47P
_040
2_50
V8J
@1
2
C52
10U_0805_6.3V
6M
1
2
C53
10U_0805_6.3V
6M
1
2
C76
2.2U_0603_6.3V
4Z
1
2
C75
1U_0402_6.3V
4Z
1
2
C58
1U_0603_10V
4Z
1
2
C66
10U_0805_6.3V
6M
1
2
C78
22U_0805_6.3V
6M
1
2
C68
22U_0805_6.3V
6M
1
2
C59
1U_0603_10V
4Z
1
2
R73 1K_0402_5%12
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
JCPU1F
IC,AUB_CFD_rPGA,R1P0
ISENSE AN35
VTT_SENSE B15
PSI# AN33
VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35
PROC_DPRSLPVR AM34
VTT_SELECT G15
VCC_SENSE AJ34
VSS_SENSE_VTT A15
VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26
VTT0_33 AF10VTT0_34 AE10VTT0_35 AC10VTT0_36 AB10VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12VTT0_42 J11
VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14
VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11
VSS_SENSE AJ35
VTT0_43 J16VTT0_44 J15
C60
22U_0805_6.3V
6M
1
2
C37 10U
_0805_6.3V6M
@1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_NCTF3_RVSS_NCTF4_RVSS_NCTF5_R
VSS_NCTF2_RVSS_NCTF1_R
VSS_NCTF6_RVSS_NCTF7_R
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Clarksfield(5/5)-GND/BypassCustom
8 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Install forDB1. 12/03
Chnage 330uF ESR from 7m to 6m for DB1. 12/16
Add for debug. 5/13
C91
10U_0805_6.3V
6M
1
2
C97
10U_0805_6.3V
6M
1
2
C98
10U_0805_6.3V
6M
1
2
C96
10U_0805_6.3V
6M
1
2
C93
10U_0805_6.3V
6M
1
2
T22
C102
22U_0805_6.3V
6M
1
2
C92
10U_0805_6.3V
6M
1
2
C107
10U_0805_6.3V
6M
1
2
C83
10U_0805_6.3V
6M
1
2
C86
10U_0805_6.3V
6M
1
2
VSS
NCTF
JCPU1I
IC,AUB_CFD_rPGA,R1P0
VSS161K27VSS162K9VSS163K6VSS164K3VSS165J32VSS166J30VSS167J21VSS168J19VSS169H35VSS170H32VSS171H28VSS172H26VSS173H24VSS174H22VSS175H18VSS176H15VSS177H13VSS178H11VSS179H8VSS180H5VSS181H2VSS182G34VSS183G31VSS184G20VSS185G9VSS186G6VSS187G3VSS188F30VSS189F27VSS190F25VSS191F22VSS192F19VSS193F16VSS194E35VSS195E32VSS196E29VSS197E24VSS198E21VSS199E18VSS200E13VSS201E11VSS202E8VSS203E5VSS204E2VSS205D33VSS206D30VSS207D26VSS208D9VSS209D6VSS210D3VSS211C34VSS212C32VSS213C29VSS214C28VSS215C24VSS216C22VSS217C20VSS218C19VSS219C16VSS220B31VSS221B25VSS222B21VSS223B18VSS224B17VSS225B13VSS226B11VSS227B8VSS228B6VSS229B4VSS230A29
VSS_NCTF1 AT35VSS_NCTF2 AT1VSS_NCTF3 AR34VSS_NCTF4 B34VSS_NCTF5 B2VSS_NCTF6 B1VSS_NCTF7 A35
VSS231A27VSS232A23VSS233A9
+
C115
330U_X
_2VM_R
6M
1
2
+
C117
330U_X
_2VM_R
6M
1
2
C712
22U_0805_6.3V
6M
1
2
T21
C101
22U_0805_6.3V
6M
1
2
T20
+
C120
330U_X
_2VM_R
6M
1
2
C90
22U_0805_6.3V
6M
1
2
C105
10U_0805_6.3V
6M
1
2
C114
10U_0805_6.3V
6M
1
2
C85
10U_0805_6.3V
6M
1
2
C104
22U_0805_6.3V
6M
1
2
C89
22U_0805_6.3V
6M
1
2
C714
22U_0805_6.3V
6M
1
2
C103
22U_0805_6.3V
6M
1
2
T17
+
C118
330U_X
_2VM_R
6M1
2
T18
C109
10U_0805_6.3V
6M
1
2
C108
10U_0805_6.3V
6M
1
2
C106
10U_0805_6.3V
6M
1
2
C87
10U_0805_6.3V
6M
1
2
T19
C110
10U_0805_6.3V
6M
1
2
C100
22U_0805_6.3V
6M
1
2
+
C116
330U_X
_2VM_R
6M
1
2C
111
10U_0805_6.3V
6M
1
2C
99
10U_0805_6.3V
6M
1
2
T23
C84
10U_0805_6.3V
6M
1
2
C95
22U_0805_6.3V
6M
1
2
C113
10U_0805_6.3V
6M
1
2
+
C119
330U_X
_2VM_R
6M
1
2
C112
10U_0805_6.3V
6M
1
2
C88
22U_0805_6.3V
6M
1
2
C94
22U_0805_6.3V
6M
1
2
VSS
JCPU1H
IC,AUB_CFD_rPGA,R1P0
VSS1AT20VSS2AT17VSS3AR31VSS4AR28VSS5AR26VSS6AR24VSS7AR23VSS8AR20VSS9AR17VSS10AR15VSS11AR12VSS12AR9VSS13AR6VSS14AR3VSS15AP20VSS16AP17VSS17AP13VSS18AP10VSS19AP7VSS20AP4VSS21AP2VSS22AN34VSS23AN31VSS24AN23VSS25AN20VSS26AN17VSS27AM29VSS28AM27VSS29AM25VSS30AM20VSS31AM17VSS32AM14VSS33AM11VSS34AM8VSS35AM5VSS36AM2VSS37AL34VSS38AL31VSS39AL23VSS40AL20VSS41AL17VSS42AL12VSS43AL9VSS44AL6VSS45AL3VSS46AK29VSS47AK27VSS48AK25VSS49AK20VSS50AK17VSS51AJ31VSS52AJ23VSS53AJ20VSS54AJ17VSS55AJ14VSS56AJ11VSS57AJ8VSS58AJ5VSS59AJ2VSS60AH35VSS61AH34VSS62AH33VSS63AH32VSS64AH31VSS65AH30VSS66AH29VSS67AH28VSS68AH27VSS69AH26VSS70AH20VSS71AH17VSS72AH13VSS73AH9VSS74AH6VSS75AH3VSS76AG10VSS77AF8VSS78AF4VSS79AF2VSS80AE35
VSS81 AE34VSS82 AE33VSS83 AE32VSS84 AE31VSS85 AE30VSS86 AE29VSS87 AE28VSS88 AE27VSS89 AE26VSS90 AE6VSS91 AD10VSS92 AC8VSS93 AC4VSS94 AC2VSS95 AB35VSS96 AB34VSS97 AB33VSS98 AB32VSS99 AB31
VSS100 AB30VSS101 AB29VSS102 AB28VSS103 AB27VSS104 AB26VSS105 AB6VSS106 AA10VSS107 Y8VSS108 Y4VSS109 Y2VSS110 W35VSS111 W34VSS112 W33VSS113 W32VSS114 W31VSS115 W30VSS116 W29VSS117 W28VSS118 W27VSS119 W26VSS120 W6VSS121 V10VSS122 U8VSS123 U4VSS124 U2VSS125 T35VSS126 T34VSS127 T33VSS128 T32VSS129 T31VSS130 T30VSS131 T29VSS132 T28VSS133 T27VSS134 T26VSS135 T6VSS136 R10VSS137 P8VSS138 P4VSS139 P2VSS140 N35VSS141 N34VSS142 N33VSS143 N32VSS144 N31VSS145 N30VSS146 N29VSS147 N28VSS148 N27VSS149 N26VSS150 N6VSS151 M10VSS152 L35VSS153 L32VSS154 L29VSS155 L8VSS156 L5VSS157 L2VSS158 K34VSS159 K33VSS160 K30
C713
22U_0805_6.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D31
DDR_A_D12
DDR_A_D59
DDR_A_D6
DDR_A_MA3
SMB_CLK_S3
DDR_A_D39
DDR_A_BS1
DDR_A_DQS0
DDR_A_WE#
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_DQS7
DDR_A_D0
DDR_A_D57
DDR_A_D46
DDR_A_D28
DDR_A_DM0
DDR_A_D19
DDR_A_DQS#5
DDR_A_D51
DDR_A_D4
DDR_A_DM4
DDR_A_D30
DDR_A_DQS2
DDR_A_D44
DDR_A_RAS#
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_DQS3
DDR_A_MA8
DDR_A_D10
DDR_A_MA6
DDR_A_D27
DDR_A_D3
DRAMRST#
DDR_A_MA10
DDR_A_DQS#7
DDR_A_D1
DDR_A_DQS#6
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_D29
DDR_A_DQS#4
DDR_A_D52
DDR_A_DM3
DDR_A_DQS5
DDR_A_D54
DDR_A_D49
DDR_A_BS2
DDR_A_D45
DDR_A_D9
DDR_A_DM7
DDR_A_D7
DDR_A_MA1
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_BS0
DDR_A_CAS#
DDR_A_D37
DDR_A_MA5
DDR_A_DQS#1
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D24
DDR_A_D15
DDR_A_D23
DDR_A_D56
DDR_A_D53
DDR_A_D47
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
SMB_DATA_S3
DDR_A_DQS#2
DDR_A_D11
DDR_A_D38
DDR_A_DQS#3
DDR_A_D32
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_MA11
DDR_A_D50
DDR_A_D61
DDR_A_MA2
DDR_A_D41
DDR_A_D17
DDR_A_D36
DDR_A_D26
DDR_A_D63
DDR_A_D2
DDR_A_D5
DDR_A_D22
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_D14
DDR_A_MA12
DDR_A_DQS#0
DDR_A_DQS4
DDR_A_DM6
DDR_A_D42
PM_EXTTS#1_R
DDR_A_MA15
DDR_A_D26
DDR_A_D2
DDR_A_D25
DDR_A_DQS6
DDR_A_D35
DDR_A_MA12
DDR_A_DQS4
DDR_A_D42
DDR_A_D59
DDR_A_MA3
DDR_A_WE#
DDR_A_D0
DDR_A_D57
DDR_A_DM0
DDR_A_D19
DDR_A_D51
DDR_A_DQS2
DDR_A_D33
DDR_A_D58
DDR_A_DM5
DDR_A_MA8
DDR_A_D10
DDR_A_D27
DDR_A_D3
DDR_A_MA10
DDR_A_D1
DDR_A_DQS#6
DDR_A_D40
DDR_A_MA9
DDR_A_D16
DDR_A_DQS#4
DDR_A_DM3
DDR_A_D49
DDR_A_BS2
DDR_A_D9
DDR_A_DM7
DDR_A_MA1
DDR_A_BS0
DDR_A_CAS#
DDR_A_MA5
DDR_A_DQS#1
DDR_A_D24
DDR_A_D56
DDR_A_D18
DDR_A_D43
DDR_A_D34
DDR_A_D48
DDR_A_DQS#2
DDR_A_D11
DDR_A_D32
DDR_A_D8
DDR_A_DQS1
DDR_A_MA13
DDR_A_D50
DDR_A_D41
DDR_A_D17
DDR_A_D36
DDR_A_D63
DDR_A_D5
DDR_A_D22
DDR_A_D14
DDR_A_DQS#0
DDR_A_DM6
PM_EXTTS#1_R
DDR_A_MA15
DDR_A_D31
DDR_A_D12
DDR_A_D6
SMB_CLK_S3
DDR_A_D39
DDR_A_BS1
DDR_A_DQS0
DDR_A_MA7
DDR_A_MA0
DDR_A_DM2
DDR_A_DM1
DDR_A_DQS7
DDR_A_D46
DDR_A_D28
DDR_A_DQS#5
DDR_A_D4
DDR_A_DM4
DDR_A_D30
DDR_A_D44
DDR_A_RAS#
DDR_A_DQS3
DDR_A_MA6
DRAMRST#
DDR_A_DQS#7
DDR_A_D29
DDR_A_D52
DDR_A_DQS5
DDR_A_D54
DDR_A_D45
DDR_A_D7
DDR_A_D13
DDR_A_D20
DDR_A_D60
DDR_A_D37
DDR_A_MA14
DDR_A_D55
DDR_A_MA4
DDR_A_D21
DDR_A_D62
DDR_A_D15
DDR_A_D23
DDR_A_D53
DDR_A_D47
SMB_DATA_S3
DDR_A_D38
DDR_A_DQS#3
DDR_A_MA11
DDR_A_D61
DDR_A_MA2
SMB_CLK_S3SMB_DATA_S3
DDR_A_BS26
DDR_A_BS06
DDR_A_WE#6DDR_A_CAS#6
DDR_A_BS1 6DDR_A_RAS# 6
PM_EXTTS#1_R 4,10SMB_DATA_S3 4,10,12,14,26SMB_CLK_S3 4,10,12,14,26
DDR_A_DQS#[0..7]6
DDR_A_D[0..63]6
DDR_A_DM[0..7]6
DDR_A_DQS[0..7]6
DDR_A_MA[0..15]6
DRAMRST# 10,11
DDR_CKE0_DIMMA6
DDR_CKE2_DIMMA5
DDR_CKE1_DIMMA 6
DDR_CKE3_DIMMA 5
M_CLK_A_DDR06M_CLK_A_DDR#06
M_CLK_A_DDR25M_CLK_A_DDR#25
M_CLK_A_DDR1 6M_CLK_A_DDR#1 6
M_CLK_A_DDR3 5M_CLK_A_DDR#3 5
DDR_CS1_DIMMA#6
DDR_CS3_DIMMA#5
DDR_CS0_DIMMA# 6
DDR_CS2_DIMMA# 5
M_A_ODT3 5
M_A_ODT2 5
M_A_ODT0 6
M_A_ODT1 6
+0.75VS
+3VS
+1.5V +1.5V
V_DDR_CPU_REF0
V_DDR_CPU_REF_A
+0.75VS
+3VS
+1.5V
+0.75VS
V_DDR_CPU_REF0
+1.5V
+1.5V
+0.75VS +0.75VS
+0.75VS
+1.5V
V_DDR_CPU_REF_A
+0.75VS
+1.5V
V_DDR_CPU_REF_A
V_DDR_CPU_REF_DA
V_DDR_CPU_REF_DA
+1.5V
V_DDR_CPU_REF_DA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
DDRIII-SODIMM CHANNEL ACustom
9 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
DDR3 SO-DIMM A3 A @ 1 . 5 V
0 . 6 5 A @ 0 . 7 5 V
As short as possible
TOP SIDE STD
3 A @ 1 . 5 V
0 . 6 5 A @ 0 . 7 5 V
TOP SIDE STD
DDR3 SO-DIMM A
Layout Note: Place near JDIMM1
Layout Note: Place near JDIMM2
Layout Note: Place nearJDIMM3.203 & JDIMM3.204
Layout Note: Place nearJDIMM4.203 & JDIMM4.204
R81, R83, R682, R683
R82, R84
VREFDQ
V_DDR_CPU_REF_AM1
M3 V_DDR_CPU_REF0
As short as possible
(HIGHT)
(LOW)
Layout Note: Place betweenJDIMM3 & JDIMM3.
1027: Change JDIMM1.1 and JDIMM2.1 to connect to V_DDR_CPU_REF_A viaR682 & R683 and move V_DDR_CPU_REF0 option and resistors R82 and R84to JDIMM1.1 and JDIMM2.1. (Will check with Intel whether we shoulduse separate divider for VREF_DQ and VREF_CA for M1 solution?)
SPD address 0xA0
SPD address 0xA2
Change ESR to 6m for DB1. 12/16
ME/iAMT debug2/10
Change. 2/17
Change. 2/17
1. Remove R682, R683.
2. Change R81 & R83 to 1K to another divider.
Add. 4/30
3. Install R82, R84.
4/30
Remove C128, C129, C138, & C145. 5/11
C126
10U_0603_6.3V
6M
@
1
2
C144
10U_0603_6.3V
6M
@
1
2
R82 0_0402_5%1 2
+
C125
330U_X
_2VM_R
6M
1
2
R81
1K_0
402_
1%1
2
C139
10U_0603_6.3V
6M
@
1
2
C136
0.1U_0201_6.3V
6K
1
2
R84 0_0402_5%1 2
R86
1K_0
402_
1%
12
C141
10U_0603_6.3V
6M
1
2
C160
1U_0603_10V
4Z1
2
C151
2.2U_0402_6.3V
6M
1
2
C131
10U_0603_6.3V
6M
1
2
C164
0.1U_0402_16V
4Z
1
2
C140
10U_0603_6.3V
6M
@
1
2
C127
10U_0603_6.3V
6M
@
1
2
JiAMT1
ACES_85204-03001CONN@11 22 33
G1 4G2 5
R89
10K_0402_5%
12
C130
10U_0603_6.3V
6M
@
1
2
C149
0.1U_0201_6.3V
6K
1
2
R88 10K_0402_5%1 2
C152
0.1U_0402_16V
4Z
1
2
C156
1U_0603_10V
4Z
1
2
C121
0.1U_0402_16V
4Z
1
2
C157
1U_0603_10V
4Z
1
2
C132
10U_0603_6.3V
6M
1
2
C162
10U_0603_6.3V
6M
1
2
C124
2.2U_0402_6.3V
6M
1
2
C161
1U_0603_10V
4Z
@
1
2C
137
0.1U_0201_6.3V
6K
1
2
C163
2.2U_0402_6.3V
6M
1
2
JDIMM2FOX_AS0A626-U4SG-7HCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204
G1205 G2 206
C158
1U_0603_10V
4Z
@
1
2
C135
0.1U_0201_6.3V
6K
1
2
C153
2.2U_0402_6.3V
6M
1
2
C143
10U_0603_6.3V
6M
1
2
R90
10K_0402_5%
12
C155
1U_0603_10V
4Z
@
1
2
C165
2.2U_0402_6.3V
6M
1
2
C146
0.1U_0201_6.3V
6K
1
2
C147
0.1U_0201_6.3V
6K
1
2
C134
0.1U_0201_6.3V
6K
1
2
C133
10U_0603_6.3V
6M
1
2
R85
1K_0
402_
1%1
2
JDIMM1FOX_AS0A626-J8SG-7HCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204
G1205 G2 206
C123
0.1U_0402_16V
4Z
1
2
R87 10K_0402_5%1 2
C154
1U_0603_10V
4Z
@
1
2
C148
0.1U_0201_6.3V
6K
1
2
C159
1U_0603_10V
4Z
1
2
C142
10U_0603_6.3V
6M
1
2
C166
0.1U_0402_16V
4Z
1
2
C150
0.1U_0402_16V
4Z
1
2
R83
1K_0
402_
1%
12
C122
2.2U_0402_6.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D26
DDR_B_D2
DDR_B_D25
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D27
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_DQS#2
DDR_B_D11
DDR_B_D8
DDR_B_DQS1
DDR_B_D17
DDR_B_D26
DDR_B_D2
DDR_B_D25
DDR_B_D0
DDR_B_DM0
DDR_B_D19
DDR_B_DQS2
DDR_B_D10
DDR_B_D27
DDR_B_D3
DDR_B_D1
DDR_B_D16
DDR_B_DM3
DDR_B_D9
DDR_B_DQS#1
DDR_B_D24
DDR_B_D18
DDR_B_DQS#2
DDR_B_D11
DDR_B_D8
DDR_B_DQS1
DDR_B_D17
DDR_B_D5
DDR_B_D22
DDR_B_D14
DDR_B_DQS#0
DDR_B_D31
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM2
DDR_B_DM1
DDR_B_D28
DDR_B_D4
DDR_B_D30
DDR_B_DQS3
DDR_B_D29
DDR_B_D7
DDR_B_D13
DDR_B_D20DDR_B_D21
DDR_B_D15
DDR_B_D23
DDR_B_DQS#3
DRAMRST#
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_D42
DDR_B_D59
DDR_B_MA3
DDR_B_WE#
DDR_B_D57
DDR_B_D51
DDR_B_D33
DDR_B_D58
DDR_B_DM5
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_DQS#4
DDR_B_D49
DDR_B_BS2
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA5
DDR_B_D56
DDR_B_D43
DDR_B_D34
DDR_B_D48
DDR_B_D32
DDR_B_MA13
DDR_B_D50
DDR_B_D41
DDR_B_MA15
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_RAS#
DDR_B_MA6
DDR_B_MA14
DDR_B_MA4
DDR_B_MA11
DDR_B_MA2
SMB_CLK_S3SMB_DATA_S3
DDR_B_D36
DDR_B_D63
DDR_B_DM6
DDR_B_D39
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_DM4
DDR_B_D44
DDR_B_DQS#7
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D45
DDR_B_D60
DDR_B_D37
DDR_B_D55
DDR_B_D62
DDR_B_D53
DDR_B_D47
DDR_B_D38
DDR_B_D61
PM_EXTTS#1_R
DDR_B_DQS6
DDR_B_D35
DDR_B_MA12
DDR_B_DQS4
DDR_B_D42
DDR_B_D59
DDR_B_MA3
DDR_B_WE#
DDR_B_D57
DDR_B_D51
DDR_B_D33
DDR_B_D58
DDR_B_DM5
DDR_B_MA8
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D40
DDR_B_MA9
DDR_B_DQS#4
DDR_B_D49
DDR_B_BS2
DDR_B_DM7
DDR_B_MA1
DDR_B_BS0
DDR_B_CAS#
DDR_B_MA5
DDR_B_D56
DDR_B_D43
DDR_B_D48
DDR_B_D32
DDR_B_MA13
DDR_B_D50
DDR_B_D41
DDR_B_D34
DDR_B_D5
DDR_B_DQS#0
DDR_B_D12
DDR_B_D6
DDR_B_DQS0
DDR_B_DM1
DDR_B_D4
DDR_B_D7
DDR_B_D13
DDR_B_D22
DDR_B_D14
DDR_B_D31
DDR_B_DM2
DDR_B_D28
DDR_B_D30
DDR_B_DQS3
DDR_B_D29
DDR_B_D20DDR_B_D21
DDR_B_D15
DDR_B_D23
DDR_B_DQS#3
DDR_B_MA15
DDR_B_BS1
DDR_B_MA7
DDR_B_MA0
DDR_B_RAS#
DDR_B_MA6
DDR_B_MA14
DDR_B_MA4
DDR_B_MA11
DDR_B_MA2
SMB_CLK_S3SMB_DATA_S3
DDR_B_D36
DDR_B_D63
DDR_B_DM6
DDR_B_D39
DDR_B_DQS7
DDR_B_D46
DDR_B_DQS#5
DDR_B_DM4
DDR_B_D44
DDR_B_DQS#7
DDR_B_D52
DDR_B_DQS5
DDR_B_D54
DDR_B_D45
DDR_B_D60
DDR_B_D37
DDR_B_D55
DDR_B_D62
DDR_B_D53
DDR_B_D47
DDR_B_D38
DDR_B_D61
PM_EXTTS#1_R
DRAMRST#
DDR_CKE1_DIMMB
DDR_CKE3_DIMMBDDR_CKE2_DIMMB
DDR_CKE0_DIMMB
M_CLK_B_DDR2M_CLK_B_DDR#2
M_CLK_B_DDR0M_CLK_B_DDR#0
M_CLK_B_DDR3M_CLK_B_DDR#3
M_CLK_B_DDR1M_CLK_B_DDR#1 DDR_CS2_DIMMB#
DDR_CS0_DIMMB#DDR_CS3_DIMMB#
DDR_CS1_DIMMB#
M_B_ODT2
M_B_ODT3
M_B_ODT0
M_B_ODT1
DDR_B_BS26
DDR_B_BS06
DDR_B_WE#6DDR_B_CAS#6
DDR_B_BS1 6DDR_B_RAS# 6
PM_EXTTS#1_R 4,9SMB_DATA_S3 4,9,12,14,26SMB_CLK_S3 4,9,12,14,26
DDR_B_DQS#[0..7]6
DDR_B_D[0..63]6
DDR_B_DM[0..7]6
DDR_B_DQS[0..7]6
DDR_B_MA[0..15]6
DRAMRST# 9,11
DDR_CKE1_DIMMB 6
DDR_CKE3_DIMMB 5DDR_CKE2_DIMMB5
DDR_CKE0_DIMMB6
M_CLK_B_DDR25M_CLK_B_DDR#25
M_CLK_B_DDR06M_CLK_B_DDR#06
M_CLK_B_DDR3 5M_CLK_B_DDR#3 5
M_CLK_B_DDR1 6M_CLK_B_DDR#1 6 DDR_CS2_DIMMB# 5
DDR_CS0_DIMMB# 6DDR_CS3_DIMMB#5
DDR_CS1_DIMMB#6
M_B_ODT2 5
M_B_ODT3 5
M_B_ODT0 6
M_B_ODT1 6
+0.75VS
+3VS
+1.5V +1.5VV_DDR_CPU_REF1
V_DDR_CPU_REF_B
+1.5V
+0.75VS
+0.75VS +0.75VS
+1.5V
+3VS
+1.5V
+0.75VS +0.75VS
+1.5V
V_DDR_CPU_REF_B
+1.5V
+3VM
+3VM
+0.75VS
V_DDR_CPU_REF_B
V_DDR_CPU_REF_DBV_DDR_CPU_REF1
V_DDR_CPU_REF_DB
+1.5V
V_DDR_CPU_REF_DB
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
DDRIII-SODIMM CHANNEL BCustom
10 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
3 A @ 1 . 5 V
0 . 6 5 A @ 0 . 7 5 V
BOT SIDE REV
3 A @ 1 . 5 V
DDR3 SO-DIMM B
0 . 6 5 A @ 0 . 7 5 V
Layout Note: Place near JDIMM4
Layout Note: Place nearJDIMM2.203 & JDIMM2.204
Layout Note: Place nearJDIMM1.203 & JDIMM1.204
As short as possible
BOT SIDE STD
Layout Note: Place near JDIMM3
DDR3 SO-DIMM B
As short as possible
(RIGHT)
(LEFT) R91, R92, R94, R684
R93, R95
VREFDQ
V_DDR_CPU_REF_BM1
V_DDR_CPU_REF1M3
Layout Note: Place betweenJDIMM3 & JDIMM3.
SPD address 0xA6
SPD address 0xA4
1027: Change JDIMM3.1 and JDIMM4.1 to connect to V_DDR_CPU_REF_B viaR91 & R684 and move V_DDR_CPU_REF1 option and resistors R93 and R95to JDIMM3.1 and JDIMM4.1. (Will check with Intel whether we shoulduse separate divider for VREF_DQ and VREF_CA for M1 solution?)
Change R99.1 to GND (SPD addressshould be 0xA4)Change R98.1 to+3VM (SPD address should be0xA6)
Change ESR to 6m for DB1. 12/16
Install R96 & R97. 12/17
Change. 2/17
Change. 2/17
2. Change R92 & R94 to 1K to another divider.
1. Remove R91, R684.
3. Install R93, R95.
Add. 4/30
4/30
Remove C172, C173, C184, & C185. 5/11
C170
2.2U_0402_6.3V
6M
1
2
C210
0.1U_0402_16V
4Z
1
2
C196
0.1U_0402_16V
4Z
1
2
C197
2.2U_0402_6.3V
6M
1
2
C207
1U_0603_10V
4Z1
2
C187
10U_0603_6.3V
6M
1
2
JDIMM4FOX_AS0A626-U4SG-7HCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204
G1205 G2 206
R98 10K_0402_5%1 2
C202
1U_0603_10V
4Z
@
1
2
C203
1U_0603_10V
4Z
1
2
C179
10U_0603_6.3V
6M
1
2
C206
1U_0603_10V
4Z
1
2
JDIMM3FOX_AS0A626-U4RG-7HCONN@
VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72
A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90
CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82
A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204
G1205 G2 206
C175
10U_0603_6.3V
6M
1
2
R92
1K_0
402_
1%
12
C168
2.2U_0402_6.3V
6M
1
2
C211
2.2U_0402_6.3V
6M
1
2
C189
10U_0603_6.3V
6M
@
1
2
C186
10U_0603_6.3V
6M
@
1
2
R95 0_0402_5%1 2
R94
1K_0
402_
1%
12
R101
10K_0402_5%
12
C177
10U_0603_6.3V
6M
@
1
2
C205
1U_0603_10V
4Z
@
1
2
C191
10U_0603_6.3V
6M
@
1
2
C188
10U_0603_6.3V
6M
1
2
C192
0.1U_0201_6.3V
6K
1
2
C176
10U_0603_6.3V
6M
@
1
2
C208
10U_0603_6.3V
6M
1
2
R99 10K_0402_5%1 2
R97
1K_0
402_
1%
12
C194
0.1U_0201_6.3V
6K
1
2
R100
10K_0402_5%
12
C199
2.2U_0402_6.3V
6M
1
2
C212
0.1U_0402_16V
4Z
1
2
C183
0.1U_0201_6.3V
6K
1
2
C180
0.1U_0201_6.3V
6K
1
2
C190
10U_0603_6.3V
6M
1
2
C182
0.1U_0201_6.3V
6K
1
2
C178
10U_0603_6.3V
6M
1
2
C167
0.1U_0402_16V
4Z
1
2
R96
1K_0
402_
1%
12
C169
0.1U_0402_16V
4Z
1
2
C195
0.1U_0201_6.3V
6K
1
2
C209
2.2U_0402_6.3V
6M
1
2
C201
1U_0603_10V
4Z
@
1
2
C181
0.1U_0201_6.3V
6K
1
2
C200
1U_0603_10V
4Z
1
2
C193
0.1U_0201_6.3V
6K
1
2
C198
0.1U_0402_16V
4Z
1
2
R93 0_0402_5%1 2
C174
10U_0603_6.3V
6M
@
1
2
+
C171
330U_X
_2VM_R
6M
1
2
C204
1U_0603_10V
4Z
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_DDR_RST
SLP_S3
SLP_S3
PCH_DDR_RST
DRAMRST# 9,10
PCH_DDR_RST 16
SM_DRAMRST#4
RUNON35
SLP_S335
VCCP_1.5VSPWRGD 4VCCP_EN21,34,40
PWR_GD 4,13,31,34
V_DDR_CPU_REF0
V_DDR_CPU_REF1
V_CPU_DDR_REF0
V_CPU_DDR_REF1
+1.5V
+1.5V+1.5V
+1.5VS_CPU_VDDQ
+1.5VS_CPU_VDDQ
+3VALW
+1.5VS_CPU_VDDQ
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Intel S3 power savingCustom
11 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
+1.5V to +1.5VS_CPU_VDDQ Transfer
Intel S3
Reserve R756 & R757. 7/19
Modify. 7/9
Add on 7/14. close to CPU side.
Change R746to 220ohm.7/14
Remove Q77. 7/19
Reserve R756 & R757. 7/19
Add C722. 7/20Remove R747. 7/20
R750 0_0402_5%@1 2
C715 0.1U_0201_6.3V6K@1 2
U3MC74VHC1G08DFT2G_SC70-5
IN11
IN22 OUT 4VC
C5
GN
D3
C648
0.1U_0402_10V
6K
1
2
R749 0_0402_5%1 2
C721 0.1U_0402_16V4Z1 2
C649
0.1U_0402_10V
6K
1
2
C719
470P_0402_50V
8J
@
1
2
R745100K_0402_5%@
12
C722 0.01U_0402_50V7K@1 2
C716 0.1U_0201_6.3V6K@1 2
R757 100K_0402_5%@1 2
R7431K_0402_5%
12
R754100K_0402_5% @
12
C717 0.1U_0201_6.3V6K1 2
R7480_0402_5%@
12
Q76AO4430 1N SOIC-8
365
78
2
4
1
G
D S
Q72AP2302GN_SOT23
2
1 3
C718 0.1U_0201_6.3V6K1 2
R746220_0402_5%
12
R756 100K_0402_5%@1 2
C720 0.1U_0402_16V4Z1 2
G
D S
Q73AP2302GN_SOT23
2
1 3
G
D
S
Q75SSM3K7002F_SC59-3
2
13
G
DS
Q742N7002_SOT23-3
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_XTAL_OUTCLK_XTAL_IN
CK_PWRGD
REF_0/CPU_SEL
REF_0/CPU_SEL
CPU_STOP#
L_CLK_BUF_DOT96#L_CLK_BUF_DOT96
L_CLK_DMI#L_CLK_DMI
L_CLK_BUF_CKSSCD#L_CLK_BUF_CKSSCD R_CLK_BUF_BCLK
R_CLK_BUF_BCLK#
REF_0/CPU_SEL
CK_PWRGD
CLK_BUF_BCLK# 14CLK_BUF_BCLK 14
CLK_14M_PCH 14
CLK_EN# 43
CLK_DMI14CLK_DMI#14
CLK_BUF_DOT9614CLK_BUF_DOT96#14
CLK_BUF_CKSSCD14CLK_BUF_CKSSCD#14
SMB_DATA_S3 4,9,10,14,26SMB_CLK_S3 4,9,10,14,26
+3VS +3VS_CK505
+1.05VS_CK505+1.05VS
+3VS_CK505 +1.05VS_CK505+3VS/+1.5VS_CK505 +1.05VS_CK505
+3VS_CK505
+3VS_CK505
+1.05VS_CK505
+3VS_CK505
+3VS/+1.5VS_CK505
+3VS/+1.5VS_CK505 +3VS+1.5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
CLOCK GENERATOR
12 48Tuesday, July 28, 2009
2008/09/09 2009/09/09Compal Electronics, Inc.
EMI Capacitor
1
CPU_1PIN 30 CPU_0
0 133MHz(Default) 133MHz
100MHz 100MHz
Closed to U2
Change on 2/24.
Add on 7/9.
Add on 7/9.
Install C710. 7/21
C226
0.1U_0402_16V
4Z
1
2
C224
0.1U_0402_16V
4Z
1
2
C232
0.1U_0402_16V
4Z
1
2
R121 0_0603_5%1 2
Y1
14.31818MH
Z_20P_1B
X14318BE1A
12
C234
0.1U_0402_16V
4Z
1
2
R119 10K_0402_5%1 2
R115 0_0603_5%1 2
C710
47P_0402_50V
8J
12
C236
0.1U_0402_16V
4Z
1
2
R106 0_0402_5%1 2
R111 0_0402_5%1 2R110 0_0402_5%1 2
SLG8SP585VTR_QFN32_5X5
U2
CPU_1# 19
SRC_1/SATA10
CKPWRGD/PD# 25
DOT_963
CPU_0# 22
XTAL_OUT 27VSS_REF 26
VDD_CPU 24CPU_0 23
27MHZ6 XTAL_IN 28VDD_275
27MHZ_SS7
CPU_1 20VSS_CPU 21
VDD_CPU_IO 18
VDD_DOT1
REF_0/CPU_SEL 30SDA 31SCL 32
DOT_96#4
VSS_SATA9
SRC_1#/SATA#11VSS_SRC12SRC_213SRC_2#14VDD_SRC_IO15
VDD_SRC 17
VDD_REF 29
VSS_DOT2
CPU_STOP#16
TGN
D33
VSS_278
C231
0.1U_0402_16V
4Z
@
1
2
C221
10U_0805_10V
4Z
1
2
R108 0_0402_5%1 2
C233
0.1U_0402_16V
4Z
1
2
C21433P_0402_50V8J
1
2
R753 0_0603_5%1 2
R112 10K_0402_5%1 2 C21533P_0402_50V8J
1
2
C222
10U_0805_10V
4Z
1
2
C235
0.1U_0402_16V
4Z
1
2
R113 10K_0402_5%@1 2
R114 10K_0402_5%1 2
G
D
S
Q22N7002_SOT23-3
2
13
R109 0_0402_5%1 2
C711
47P_0402_50V
8J
@1
2
R104 0_0402_5%1 2
R752 0_0603_5%@1 2
R102 0_0402_5%1 2C213 10P_0402_50V8C@
12
C225
0.1U_0402_16V
4Z
1
2
C223
0.1U_0402_16V
4Z@
1
2
R107 0_0402_5%1 2
R103 33_0402_5%12
C230
10U_0805_10V
4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX1PCH_RTCX2
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_RST#
HDA_SPKR
HDA_SDIN1
SATACOMP
SATA_PTX_DRX_N0SATA_PTX_DRX_P0
SATA_PTX_DRX_N1SATA_PTX_DRX_P1
PCH_JTAG_TCK
PCH_JTAG_RST#
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
SATA_PRX_DTX_N0
SATA_PRX_DTX_P1SATA_PRX_DTX_N1
HDA_BIT_CLKHDA_BIT_CLK_MDCHDA_BIT_CLK_CODEC
HDA_SYNC
HDA_SDIN0
HDA_SDOUT_MDCHDA_SDOUT_CODEC
HDA_SDOUTSATA_PTX_DRX_N3SATA_PTX_DRX_P3
SATA_PRX_DTX_N3SATA_PRX_DTX_P3
GPIO19
SATA_DET#0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0SATA_PTX_DRX_P0
SATA_PTX_DRX_N1SATA_PTX_DRX_P1
SATA_PTX_C_DRX_P0SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_N0SATA_PRX_C_DTX_P0
SATA_PRX_DTX_P1SATA_PRX_C_DTX_P1SATA_PRX_C_DTX_N1 SATA_PRX_DTX_N1
SATA_PTX_C_DRX_P1SATA_PTX_C_DRX_N1
SATA_PRX_DTX_N0SATA_PRX_DTX_P0
SATA_PTX_DRX_N4SATA_PTX_DRX_P4
SATA_PRX_DTX_N4SATA_PRX_DTX_P4
GPIO33AQUAWHITE_BATLED
PCH_JTAG_TMS
HDA_SPKR
HDA_BIT_CLK_CODEC
HDA_SDOUT_MDC
HDA_BIT_CLK_MDC
HDA_SDOUT_CODEC
SATA_PTX_DRX_P4SATA_PTX_DRX_N4
SATA_PRX_DTX_N4SATA_PRX_DTX_P4
SATA_PTX_C_DRX_P4SATA_PTX_C_DRX_N4
SATA_PRX_C_DTX_N4SATA_PRX_C_DTX_P4
SATA_DET#0
PCH_RTCX1
PCH_RTCX2
HDD_HALTLED
AQUAWHITE_BATLED
HDD_HALTLED
SATA_PTX_C_DRX_P4
SATA_PTX_C_DRX_N4 SATA_PRX_C_DTX_P4
SATA_PRX_C_DTX_N4
PCH_JTAG_RST#_R
XDP_FN17
XDP_FN9XDP_FN8
XDP_FN10
XDP_FN4
XDP_FN16
PCH_JTAG_TMSPCH_JTAG_TDI
XDP_FN7
XDP_FN0
PCH_JTAG_TDO#_R
XDP_FN11
PCH_JTAG_TCK PCH_JTAG_TCK_R
PCH_JTAG_TDO XDP_FN12
GPIO19
XDP_FN6
PCH_JTAG_RST#
XDP_FN2
XDP_FN14
PCH_JTAG_TDI
PCH_JTAG_TMS_R
SATA_DET#0
PCH_JTAG_TDO
XDP_FN5 XDP_FN13
XDP_FN15
PCH_JTAG_TDI_R
XDP_FN3
PCH_JTAG_RST#
XDP_FN1
XDP_PWRBTN#_R
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
HDA_SPKR30
HDA_SDIN125
KBC_SPI_CLK_R31
KBC_SPI_CS0#_R31
KBC_SPI_SI_R31
KBC_SPI_SO31
LPC_LAD0 24,28,31,33LPC_LAD1 24,28,31,33LPC_LAD2 24,28,31,33LPC_LAD3 24,28,31,33
LPC_LFRAME# 24,28,31,33
LPC_LDRQ#0 33
SIRQ 28,31,32,33
SATA_LED# 29,30
HDA_SYNC_MDC25HDA_SYNC_CODEC30
HDA_RST#_MDC25HDA_RST#_CODEC30
HDA_SDIN030
KBC_SPI_CS1#_R31
ODD_DET# 16
HDA_BIT_CLK_MDC 25
HDA_BIT_CLK_CODEC 30
HDA_SDOUT_MDC 25
HDA_SDOUT_CODEC 30
AQUAWHITE_BATLED30
HDD_HALTLED 30
SATA_PTX_C_DRX_N5 29
SATA_PRX_DTX_N5 29
SATA_PTX_C_DRX_P5 29
SATA_PRX_DTX_P5 29
SATA_PTX_C_DRX_N2 29
SATA_PRX_DTX_N2 29
SATA_PTX_C_DRX_P2 29
SATA_PRX_DTX_P2 29
NAND_DET# 24
USB_OC#116
PCH_XDP_GPIO28 16
USB_OC#516
PWR_GD4,11,31,34
USB_OC#216
XDP_DBRESET# 4,15
PCH_XDP_GPIO20 14
PLT_RST# 4,16,21,22,24,27,28,30
USB_OC#716,30
PCH_XDP_GPIO18 14
PCH_XDP_GPIO49 16
USB_OC#016
USB_OC#316
PCH_XDP_GPIO0 16,27
PM_PWRBTN#_R4,15
USB_OC#616 PCH_XDP_GPIO16 16
USB_OC#416PCH_XDP_GPIO37 16PCH_XDP_GPIO36 16
+RTCVCC
+RTCVCC
+1.05VS
+3VS
+3VS
+5VS
+5VS
+5VS
+3VALW
+3VALW +3VALW +3VALW +3VALW
BATT1.1+VREG3_51125+RTCVCC
+3VS
+3VS
+5VS+3VS
+3VS +3VS
+1.05VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(1/6)-HDA/JTAG/SATACustom
13 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Layout rule trace len: gth < 0.5"
SATA HDD CONN.
SATA ODD CONN.
LOW=Default HIGH=No Reboot
High = Internal VR Enabled(Default)
Change C259 NI andRV R569. 11/24
Del signal connect to LID_SW#. 7/7
Change R182 & R186 to 0 ohm. 11/24
E-SATA CONN.
PCH XDP Conn.Change JTAG DDEBUG CONN to 60pin. 12/02
RemoveCLRP2.4/25
20Kohm
20Kohm
No Install
R187
100ohmPCH_JTAG_TMS
No Install200ohm
No Install
PCH_JTAG_TDOES1PCH Pin
No Install
R195
No Install
ES2
PCH_JTAG_TDI*
PCH_JTAG_TCKPCH_JTAG_RST#
No Install
No Install
100ohm
R194
R191
100ohm200ohm
ES1
No Install
51ohm
No InstallR190
No Install
200ohm
10Kohm
ES2
No Install100ohm51ohm
200ohm
200ohm
No InstallNo Install
No InstallR188R192
R189R193
51ohm100ohm
10Kohm No Install
No Install
20Kohm10Kohm
RefDesPCH JTAG Enable PCH JTAG Disable
51ohm
Reverse signals ofpin1&2. 1/19
NI R720. 0206
Change SATA assignments tosupport PM (Port Multiplier):Move SATA port#4 to SATA port#5Move SATA port#2 to SATA port#4Move SATA port#3 to SATA port#2
2/10
Move C264~C267 to docking side. 2/24
Change net name. 5/11
Change net name. 2/24
Change R188 ~ R195 to NO INSTALL. 7/14
HF
Swap. 4/24
+3VL to +VREG3_51125. 7/22
R702 33_0402_5%@1 2
R718 33_0402_5%@1 2
R183 10K_0402_5%1 2
R134 33_0402_5%@1 2
JHDD1
ALLTO_C16674-12204-L_NRCONN@
GND 1RX+ 2RX- 3
GND 4TX- 5TX+ 6
GND 7
3.3V 83.3V 93.3V 10GND 11GND 12GND 13
5V 145V 155V 16
GND 17Rsv 18
GND 1912V 2012V 2112V 22
GND23 GND24
boss25 boss26
R177 10K_0402_5%1 2
C255 0.01U_0402_50V7K1 2
C25
2
18P
_040
2_50
V8J
1
2
R187 51_0402_5%1 2
R186 0_0402_5%1 2
C242 0.01U_0402_50V7K1 2
CLR
P1
SH
OR
T P
AD
S
12
C25
1
18P
_040
2_50
V8J
1
2
R190200_0402_5%@
12
R19120K_0402_5%@
12
R173 33_0402_5%1 2
C26
3
10U_0805_10V
4Z
1
2
T92PAD
C246 0.01U_0402_50V7K1 2
R188200_0402_5%@
12
C256 0.01U_0402_50V7K1 2
R741 51_0402_5%@1 2
R196 1K_0402_5%1 2
R18510K_0402_5%
12R170 33_0402_5%1 2
R704 33_0402_5%@1 2
R710 33_0402_5%@1 2
R722 0_0402_1%1 2
C243 0.01U_0402_50V7K1 2
R16420K_0402_5%
1 2
Y3
32.768KH
Z_12.5PF_Q
13MC
14610002
OS
C4
OS
C1
NC
3
NC
2
RTC
IHDA
SATA
LPC
SPI
JTAG
U4A
IBEXPEAK-M_FCBGA1071
RTCX1B13RTCX2D13
INTVRMENA14
INTRUDER#A16
HDA_BCLKA30
HDA_SYNCD29
HDA_RST#C30
HDA_SDIN0G30
HDA_SDIN1F30
HDA_SDIN2E32
HDA_SDOB29
SATALED# T3
FWH0 / LAD0 D33FWH1 / LAD1 B33FWH2 / LAD2 C32FWH3 / LAD3 A32
LDRQ1# / GPIO23 F34
FWH4 / LFRAME# C34
LDRQ0# A34
RTCRST#C14
HDA_SDIN3F32
HDA_DOCK_EN# / GPIO33H32
HDA_DOCK_RST# / GPIO13J30
SRTCRST#D17
SATA0RXN AK7SATA0RXP AK6SATA0TXN AK11SATA0TXP AK9
SATA1RXN AH6SATA1RXP AH5SATA1TXN AH9SATA1TXP AH8
SATA2RXN AF11SATA2RXP AF9SATA2TXN AF7SATA2TXP AF6
SATA3RXN AH3SATA3RXP AH1SATA3TXN AF3SATA3TXP AF1
SATA4RXN AD9SATA4RXP AD8SATA4TXN AD6SATA4TXP AD5
SATA5RXN AD3SATA5RXP AD1SATA5TXN AB3SATA5TXP AB1
SATAICOMPI AF15
SPI_CLKBA2
SPI_CS0#AV3
SPI_CS1#AY3
SPI_MOSIAY1
SPI_MISOAV1
SATA0GP / GPIO21 Y9
SATA1GP / GPIO19 V1
JTAG_TCKM3
JTAG_TMSK3
JTAG_TDIK1
JTAG_TDOJ2
TRST#J4
SERIRQ AB9
SPKRP1
SATAICOMPO AF16
R178 1K_0402_5%1 2
C25
0
0.1U_0402_16V
4Z1
2
C2721U_0603_10V4Z
1
2
R169 33_0402_5%1 2
R140 10K_0402_5%1 2
C26
1
1U_0603_10V
4Z
1
2
R742 51_0402_5%@1 2
C268 47P_0402_50V8J@1 2
T102 PAD
R5690_0402_5%@
1 2
R18410K_0402_5%
12
R165 1M_0402_5%1 2
C240 0.01U_0402_50V7K1 2
R16320K_0402_5%1 2
R19510K_0402_5%@
12
R162 1K_0402_5%@1 2
C26
2
10U_0805_10V
4Z
1
2
R189200_0402_5%@
12
R712 33_0402_5%@1 2
R193100_0402_1%@
12
R182 0_0402_5%1 2
R744 51_0402_5%@1 2
C271 47P_0402_50V8J@1 2
R720 0_0402_1%@1 2
C24
7
10U_0805_10V
4Z
1
2
T93PAD
T100 PAD
R152 0_0402_5%1 2
R176 1K_0402_5%1 2
R172 33_0402_5%1 2
R192100_0402_1%@
12
JETA1
SUYIN_127365MR007S406ZRCONN@
GND1A+2A-3GND4B-5B+6GND7
GND 8GND 9GND 10GND 11
R713 33_0402_5%@1 2
R181 0_0402_1%1 2
R161 10M_0402_5%1 2
C241 0.01U_0402_50V7K1 2
C270 47P_0402_50V8J@1 2
JTAG1
SAMTE_BSH-030-01-L-D-ACONN@
GND01OBSFN_A03OBSFN_A15GND27OBSDATA_A09OBSDATA_A111GND413OBSDATA_A215OBSDATA_A317GND619OBSFN_B021OBSFN_B123GND825OBSDATA_B027OBSDATA_B129GND1031OBSDATA_B233OBSDATA_B335GND1237PWRGOOD/HOOK039HOOK141VCC_OBS_AB43HOOK245HOOK347GND1449SDA51SCL53TCK155TCK057GND1659
GND1 2OBSFN_C0 4OBSFN_C1 6
GND3 8OBSDATA_C0 10OBSDATA_C1 12
GND5 14OBSDATA_C2 16OBSDATA_C3 18
GND7 20OBSFN_D0 22OBSFN_D1 24
GND9 26OBSDATA_D0 28OBSDATA_D1 30
GND11 32OBSDATA_D2 34OBSDATA_D3 36
GND13 38ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42VCC_OBS_CD 44
RESET#/HOOK6 46DBR#/HOOK7 48
GND15 50TD0 52
TRST# 54TDI 56
TMS 58GND17 60
R174 33_0402_5%1 2
D52
PJDLC05_SOT23-3@
2
31
R714 33_0402_5%@1 2
T103 PAD
R166 330K_0402_5%1 2
C26
0
0.1U_0402_16V
4Z
1
2
R740 51_0402_5%@1 2
R168 33_0402_5%1 2
R175 33_0402_5%1 2
C244 0.01U_0402_50V7K1 2
R703 33_0402_5%@1 2
R717 33_0402_5%@1 2
R715 33_0402_5%@1 2
R721 0_0402_1%1 2
R705 33_0402_5%@1 2
C24
8
0.1U_0402_16V
4Z
1
2R167 10K_0402_5%1 2
R709 33_0402_5%@1 2
R707 33_0402_5%@1 2
C257 0.01U_0402_50V7K1 2
JODD1
OCTEK_SLS-13DJ1G_NRCONN@
A+ 2A- 3
B- 5B+ 6
GND 1
GND 4
GND 7
DP 8V5 9V5 10
MD 11GND 12GND 13GND14
GND15
C2590.1U_0402_16V4Z@
1
2
C239 0.01U_0402_50V7K1 2
R716 33_0402_5%@1 2
C25
3
1U_0
603_
10V
4Z
1
2
R711 33_0402_5%@1 2
T101 PAD
R706 33_0402_5%@1 2
C25
8
1U_0
603_
10V
4Z
1
2
C269 47P_0402_50V8J@1 2
R194100_0402_1%@
12
D51
PJDLC05_SOT23-3@
2
31
R171 33_0402_5%1 2
C24
9
0.1U_0402_16V
4Z
1
2
R719 0_0402_1%1 2
D1
BAV70W_SOT323-3
2
31
C254 0.01U_0402_50V7K1 2
C245 0.01U_0402_50V7K1 2
R180 37.4_0402_1%1 2
JBATT1ACES_50273-0020N-001 CONN@
11
22
NC
13
NC
24
R179 0_0402_5%1 2
R708 33_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SMBCLK
SMBDATA
SML1CLK
SML1DATA
XTAL25_INXTAL25_OUT
CLK_DP#CLK_DP
SMB_CLK_S3
SMB_DATA_S3
SMBCLK
SMBDATA
SML1CLK
SML1DATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA
SML1CLK_R
SML1DAT_R
PCIE_PTX_DRX_P2PCIE_PTX_DRX_N2PCIE_PRX_DTX_P2PCIE_PRX_DTX_N2
PCIE_PTX_DRX_P4PCIE_PTX_DRX_N4PCIE_PRX_DTX_P4PCIE_PRX_DTX_N4
PCIE_PTX_DRX_P6PCIE_PTX_DRX_N6PCIE_PRX_DTX_P6PCIE_PRX_DTX_N6
LID_SW#_ISO
LID_SW#_ISO
CLK_14M_PCH
SML0DATA
SML0CLK
XTAL25_OUT
SML0ALERT#
SML0ALERT#
SMBCLK
SMBDATA
PEG_CLKREQ_R#
PCH_XDP_GPIO20
CLK_48M_USB3_P
CLK_14M_SIO_P
CLK_14M_PCH
CLK_48M_USB3_P
PCIE_PTX_DRX_P8PCIE_PTX_DRX_N8PCIE_PRX_DTX_P8PCIE_PRX_DTX_N8
SML1CLK_MXM
SML1DAT_MXM
SML1CLK
SML1DATA
SMBCLK
SMBDATA
SML1CLK_MXM
SMB_CLK_S3
SML1DAT_MXM
SMB_DATA_S3
CLK_14M_SIO_P
GPIO74
GPIO74
CLKREQ_EXP#
XTAL25_IN
CLK_PCI_FB 16
CLK_EXP 4CLK_EXP# 4
CLK_DMI# 12CLK_DMI 12
CLK_BUF_BCLK 12CLK_BUF_BCLK# 12
CLK_BUF_DOT96 12CLK_BUF_DOT96# 12
CLK_BUF_CKSSCD 12CLK_BUF_CKSSCD# 12
CLK_PEG_VGA_PCH# 21CLK_PEG_VGA_PCH 21
PCIE_PTX_C_DRX_P424
PCIE_PRX_DTX_N424
PCIE_PTX_C_DRX_N424PCIE_PRX_DTX_P424
PCIE_PTX_C_DRX_P230
PCIE_PRX_DTX_N230
PCIE_PTX_C_DRX_N230PCIE_PRX_DTX_P230
PCIE_PTX_C_DRX_P622
PCIE_PRX_DTX_N622
PCIE_PTX_C_DRX_N622PCIE_PRX_DTX_P622
CLK_PCIE_MCARD_PCH24CLK_PCIE_MCARD_PCH#24
CLKREQ_WLAN#24
CLK_PCIE_EXP_PCH#30
CLK_14M_PCH 12
SML0DATA 22
SML0CLK 22
CL_CLK1 24
CL_DATA1 24
CL_RST#1 24
PEG_CLKREQ# 21
PCIE_PTX_C_DRX_P827
PCIE_PRX_DTX_N827
PCIE_PTX_C_DRX_N827PCIE_PRX_DTX_P827
PEG_B_CLKREQ#27
CLK_PCIE_USB30_PCH27CLK_PCIE_USB30_PCH#27
CAP_CLK 25,31
CAP_DAT 25,31
SML1CLK_MXM 21
SML1DAT_MXM 21
PCH_XDP_GPIO1813
SMB_DATA_S3 4,9,10,12,26
SMB_CLK_S3 4,9,10,12,26
CLK_PCIE_EXP_PCH30
PCH_XDP_GPIO2013
CLK_48M_USB3_PCH 27
CLK_14M_SIO_PCH 33
CLK_PCIE_LAN_REQ#_R22
LID_SW# 20,25,31
+1.05VS
+3VS
+3VALW
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+3VS+3VALW
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(2/6)-PCI-E/SMBUS/CLKCustom
14 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
U4B.AF38 : Layoutrule trace length: < 0.5"
EXP
WLAN
NIC
WLAN
EXP
Add PU R148. 12/11
Install. 2/6
No install. 4/25
Move CLK_PCIE_LAN_PCH/# differential clockfrom CLKOUT_PEG_B_P/N toCLKOUT_PCIE6P/N...and move CLK_PCIE_LAN_REQto PCIECLKREQ6# (GPIO45) and add R300pull-up to +3VS. 10/30
NIC
Remove R724.7/21
Change power rail from +3VS. 11/11
Add R459 and connect toCLK_PCIE_LAN_REQ#_R.
Change R199, R200 from4.7K to 2.2K. 4/23
USB3.0
New for USB30. 11/20
New add for USB3.0. 11/20
@ R701. 12/02
Swap. 2/27
Add PD R52. 5/4
Install 5/27.
Change R204 from10K to 100K. 7/7
Add D12. 7/7
R37710K_0402_5%@
12
R206 10K_0402_5%1 2
R204 100K_0402_5%1 2
T82 PAD
R223 10K_0402_5%1 2
R197 2.2K_0402_5%1 2
Q23A2N7002DW-T/R7_SOT363-6
6 1
2
PCI-E*
SMBus
Controller
From CLK BUFFER
PEG
Clock
Flex
Link
U4B
IBEXPEAK-M_FCBGA1071
PERN1BG30PERP1BJ30
PERN2AW30PERP2BA30
PERN3AU30PERP3AT30
PERN4BA32PERP4BB32
PERN5BF33PERP5BH33
PERN6BA34PERP6AW34
PERN7AT34PERP7AU34
PERN8BG34PERP8BJ34
PETN1BF29PETP1BH29
PETN2BC30PETP2BD30
PETN3AU32PETP3AV32
PETN4BD32PETP4BE32
PETN5BG32PETP5BJ32
PETN6BC34PETP6BD34
PETN7AU36PETP7AV36
PETN8BG36PETP8BJ36
SMBALERT# / GPIO11 B9
SMBCLK H14
SMBDATA C8
SML0CLK C6
SML0DATA G8
CLKOUT_PCIE0NAK48CLKOUT_PCIE0PAK47
CLKOUT_PCIE1NAM43CLKOUT_PCIE1PAM45
CLKOUT_PCIE2NAM47CLKOUT_PCIE2PAM48
CLKOUT_PCIE3NAH42CLKOUT_PCIE3PAH41
CLKOUT_PCIE4NAM51CLKOUT_PCIE4PAM53
CLKOUT_PCIE5NAJ50CLKOUT_PCIE5PAJ52
SML0ALERT# / GPIO60 J14
CL_CLK1 T13
CL_DATA1 T11
CL_RST1# T9
CLKIN_BCLK_N AP3CLKIN_BCLK_P AP1
CLKIN_DMI_N AW24CLKIN_DMI_P BA24
CLKIN_DOT_96N F18CLKIN_DOT_96P E18
CLKIN_SATA_N / CKSSCD_N AH13CLKIN_SATA_P / CKSSCD_P AH12
XTAL25_IN AH51XTAL25_OUT AH53
REFCLK14IN P41
CLKIN_PCILOOPBACK J42
CLKOUT_PEG_A_N AD43CLKOUT_PEG_A_P AD45
PEG_A_CLKRQ# / GPIO47 H1
PCIECLKRQ0# / GPIO73P9
PCIECLKRQ1# / GPIO18U4
PCIECLKRQ2# / GPIO20N4
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26M9
PCIECLKRQ5# / GPIO44H6
CLKOUTFLEX0 / GPIO64 T45
CLKOUTFLEX1 / GPIO65 P43
CLKOUTFLEX2 / GPIO66 T42
CLKOUTFLEX3 / GPIO67 N50
CLKOUT_DMI_N AN4CLKOUT_DMI_P AN2
PEG_B_CLKRQ# / GPIO56P13
CLKOUT_PEG_B_PAK51 CLKOUT_PEG_B_NAK53
SML1ALERT# / GPIO74 M14
SML1CLK / GPIO58 E10
SML1DATA / GPIO75 G12
XCLK_RCOMP AF38
CLKOUT_DP_P / CLKOUT_BCLK1_P AT3CLKOUT_DP_N / CLKOUT_BCLK1_N AT1
R459 0_0402_1%1 2
T27 PAD
R229 1M_0402_5%@1 2
C216 10P_0402_50V8C@12
R228 22_0402_5%12 R9170_0402_5%
12
R218 0_0402_5%@1 2
Q3B2N7002DW-T/R7_SOT363-6
3
5
4
R214 10K_0402_5%1 2
R207 0_0402_5%@12
C280 0.1U_0402_16V4Z1 2
C28
2 18P_0402_50V
8J
@
1
2
R205 10K_0402_5%1 2
Q23B2N7002DW-T/R7_SOT363-6
3
5
4
Q7A2N7002DW-T/R7_SOT363-6
61
2
Q7B2N7002DW-T/R7_SOT363-6
3
5
4
Y4
25MHZ_20P_1BG25000CK1A@
1 2
R209 0_0402_5%@12
R202 4.7K_0402_5%1 2
T25 PAD
Q3A2N7002DW-T/R7_SOT363-6
6 1
2
R201 4.7K_0402_5%1 2C275 0.1U_0402_16V4Z1 2C276 0.1U_0402_16V4Z1 2
R200 2.2K_0402_5%1 2
R625 22_0402_5%12
R9160_0402_5%
12
C217 10P_0402_50V8C@12
R199 2.2K_0402_5%1 2
C273 0.1U_0402_16V4Z1 2
T26 PAD
R72910K_0402_5%
12
C653 0.1U_0402_16V4Z1 2
C28
1 18P_0402_50V
8J
@
1
2
C218 22P_0402_50V8J12
D12
CH751H-40PT_SOD323-2
2 1
T83 PAD
C654 0.1U_0402_16V4Z1 2
R687 10K_0402_5%1 2
R213 10K_0402_5%1 2
C279 0.1U_0402_16V4Z1 2
C274 0.1U_0402_16V4Z1 2
R701 10K_0402_5%@1 2
R217 10K_0402_5%1 2
R148 10K_0402_5%1 2
R222 90.9_0402_1%1 2
R215 0_0402_5%@1 2
R210 10K_0402_5%1 2
R208 10K_0402_5%1 2
R91510K_0402_5%@
12
R198 2.2K_0402_5%1 2
G
D S
Q642N7002_SOT23-3@
2
1 3
R52 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_IRCOMP
SYS_RST#
AC_PRESENT
LOW_BAT#_R
IBEX_R#
PCIE_WAKE#
PM_CLKRUN#
SUS_STAT#
SUS_CLK
PM_CLKRUN#
IBEX_R#
LOW_BAT#_R
PCIE_WAKE#
VGATE
PM_SLP_LAN#
PM_SLP_LAN#
AC_PRESENT
SYS_RST#
VGATE
PM_PWRBTN#_R4,13ON/OFFBTN#25
DMI_CRX_PTX_N05
DMI_CTX_PRX_N05DMI_CTX_PRX_N15DMI_CTX_PRX_N25DMI_CTX_PRX_N35
DMI_CTX_PRX_P05DMI_CTX_PRX_P15DMI_CTX_PRX_P25DMI_CTX_PRX_P35
DMI_CRX_PTX_N15DMI_CRX_PTX_N25DMI_CRX_PTX_N35
DMI_CRX_PTX_P05DMI_CRX_PTX_P15DMI_CRX_PTX_P25DMI_CRX_PTX_P35
XDP_DBRESET#4,13
VGATE43
PM_RSMRST#31
PM_DRAM_PWRGD4
AC_PRESENT31
PCIE_WAKE# 24,27,30
PM_CLKRUN# 28,31,32,33
SLP_S5# 29
H_PM_SYNC 4
SLP_S4# 35,42
SLP_S3# 30,31,34,35,38,40,41
RPGOOD39
PM_SLP_LAN# 35,42
M_PWROK34
PM_SLP_M# 31,34,35
SUS_PWR_ACK31
SUS_STAT# 28,32,33
PDG_IN31
+1.05VS
+3VS+3VALW
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(3/6)-DMI/GPIO/LVDSCustom
15 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Layout rule:tracelength < 0.5"
Connect to TPM. 11/30
Remove to KBC. 12/05
Change R339 to 1K andlink to PDG_IN. 5/14
NI R253. 5/14
Connect directly after remove R237. 5/15
Correct connect to VGATE. 5/19
R232 1K_0402_5%1 2
R239 0_0402_5%1 2
R254 10K_0402_5%@1 2
R250 10K_0402_5%1 2
R245
1K_0402_0.5%
12
R242 10K_0402_5%1 2
R230 1K_0402_5%1 2
R251 1K_0402_5%1 2
R233 49.9_0402_1%1 2
R252 10K_0402_5%1 2
R241 10K_0402_5%1 2R352 0_0402_5%1 2
LVDS
Digital Display Interface
CRT
U4D
IBEXPEAK-M_FCBGA1071
L_BKLTCTLY48
L_BKLTENT48
L_CTRL_CLKAB46L_CTRL_DATAV48
L_DDC_CLKAB48L_DDC_DATAY45
L_VDD_ENT47
LVDSA_CLK#AV53LVDSA_CLKAV51
LVDSA_DATA#0BB47LVDSA_DATA#1BA52LVDSA_DATA#2AY48LVDSA_DATA#3AV47
LVDSA_DATA0BB48LVDSA_DATA1BA50LVDSA_DATA2AY49LVDSA_DATA3AV48
LVDSB_CLK#AP48LVDSB_CLKAP47
LVDSB_DATA#0AY53LVDSB_DATA#1AT49LVDSB_DATA#2AU52LVDSB_DATA#3AT53
LVDSB_DATA0AY51
DDPB_0N BD42
DDPB_1N BJ42
LVD_VREFHAT43LVD_VREFLAT42
DDPD_2N BF37
DDPD_3N BE36
DDPB_2N BB40
DDPB_3N AW38
DDPC_0N BE40
DDPC_1N BF41
DDPC_2N BD38
DDPC_3N BB36
DDPD_0N BJ40
DDPD_1N BJ38
DDPB_0P BC42
DDPB_1P BG42
DDPD_2P BH37
DDPD_3P BD36
DDPB_2P BA40
DDPB_3P BA38
LVDSB_DATA1AT48LVDSB_DATA2AU50LVDSB_DATA3AT51
LVD_IBGAP39LVD_VBGAP41
DDPC_1P BH41
DDPC_0P BD40
DDPC_2P BC38
DDPC_3P BA36
DDPD_0P BG40
DDPD_1P BG38
CRT_BLUEAA52
CRT_DDC_CLKV51CRT_DDC_DATAV53
CRT_GREENAB53
CRT_HSYNCY53
CRT_IRTNAB51
CRT_REDAD53
CRT_VSYNCY51
DAC_IREFAD48
SDVO_CTRLCLK T51SDVO_CTRLDATA T53
DDPC_CTRLCLK Y49DDPC_CTRLDATA AB49
DDPD_CTRLCLK U50DDPD_CTRLDATA U52
DDPB_AUXN BG44
DDPC_AUXN BE44
DDPD_AUXN BC46
DDPB_AUXP BJ44
DDPC_AUXP BD44
DDPD_AUXP BD46
DDPB_HPD AU38
DDPC_HPD AV40
DDPD_HPD AT38
SDVO_TVCLKINP BG46SDVO_TVCLKINN BJ46
SDVO_STALLP BG48SDVO_STALLN BJ48
SDVO_INTP BH45SDVO_INTN BF45
T29PAD
R238 0_0402_5%1 2
R231 1K_0402_5%1 2
R234 1K_0402_5%1 2
R235 1K_0402_5%1 2
R240 0_0402_5%1 2
R253 10K_0402_5%@1 2
R243 0_0402_5%1 2
DMI
FDI
System Power Management
U4C
IBEXPEAK-M_FCBGA1071
DMI0RXNBC24DMI1RXNBJ22DMI2RXNAW20DMI3RXNBJ20
DMI0RXPBD24DMI1RXPBG22DMI2RXPBA20DMI3RXPBG20
DMI0TXNBE22DMI1TXNBF21DMI2TXNBD20DMI3TXNBE18
DMI0TXPBD22DMI1TXPBH21DMI2TXPBC20DMI3TXPBD18
DMI_ZCOMPBH25
DMI_IRCOMPBF25
FDI_RXN0 BA18FDI_RXN1 BH17FDI_RXN2 BD16FDI_RXN3 BJ16FDI_RXN4 BA16FDI_RXN5 BE14FDI_RXN6 BA14FDI_RXN7 BC12
FDI_RXP0 BB18FDI_RXP1 BF17FDI_RXP2 BC16FDI_RXP3 BG16FDI_RXP4 AW16FDI_RXP5 BD14FDI_RXP6 BB14FDI_RXP7 BD12
FDI_FSYNC0 BF13
FDI_FSYNC1 BH13
FDI_LSYNC0 BJ12
FDI_LSYNC1 BG14
FDI_INT BJ14
PMSYNCH BJ10
TP23 N2
SLP_M# K8
SLP_S3# P12
SLP_S4# H7
SLP_S5# / GPIO63 E4
SYS_RESET#T6
SYS_PWROKM6
PWRBTN#P5
RI#F14
WAKE# J12
SUS_STAT# / GPIO61 P8
SUSCLK / GPIO62 F3
ACPRESENT / GPIO31P7
LAN_RST#A10
MEPWROKK5
BATLOW# / GPIO72A6
PWROKB17
CLKRUN# / GPIO32 Y1
SUS_PWR_DN_ACK / GPIO30M1
RSMRST#C16
DRAMPWROKD9
SLP_LAN# / GPIO29 F6
R246 10K_0402_5%1 2
R339 1K_0402_5%1 2
R249 10K_0402_5%1 2
R236 0_0402_5%1 2
R248 10K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_FRAME#PCI_DEVSEL#
PCI_STOP#
PCI_LOCK#
PCI_TRDY#
PCI_IRDY#
PCI_PERR#PCI_SERR#
PCI_PIRQD#
PCI_PIRQA#
ACCEL_INT#
PCI_PIRQD#
PCI_PIRQA#
PCI_PIRQC#PCI_PIRQB#
ODD_DET#
PCI_REQ2#PCI_REQ3#
PCI_REQ0#
USBRBIAS
USB_OC#2USB_OC#3
USB_OC#7
USB_OC#5
PCI_GNT0#MODEM_DISABLE#
CLK_PCI_TPM_R
PCI_GNT3#
NV_ALENV_CLE
GPIO48
DockID1
WLAN_TRANSMIT_OFF#
PCH_XDP_GPIO16
PCH_PECI_R
KB_RST#
DockID0
RUNSCI_EC#
SATA_CLKREQ#
PCH_XDP_GPIO0
PCH_XDP_GPIO49
PCH_XDP_GPIO37
GPIO15
H_THERMTRIP#_L
GPIO24
LAN_DIS#
STP_PCI#
ALS_EN#
NV_ALE
MODEM_DISABLE#PCI_GNT0#
PLT_RST#
USB_OC#1USB_OC#0
USB_OC#7
GPIO8
LED_LINK_LAN#_R
PCI_GNT3#
PCI_AD5
PCI_AD1PCI_AD0
PCI_AD3
PCI_AD7
PCI_AD12
PCI_AD2
PCI_AD6
PCI_AD8
PCI_AD4
PCI_AD13
PCI_AD11
PCI_AD20
PCI_AD9PCI_AD10
PCI_AD21
PCI_AD15
PCI_AD17
PCI_AD14
PCI_AD19
PCI_AD22
PCI_AD18
PCI_AD23
PCI_AD27
PCI_AD16
PCI_AD30
PCI_AD25PCI_AD24
PCI_AD26
PCI_AD31
PCI_AD28PCI_AD29
GPIO24
GPIO15
KB_RST#
ALS_EN#
PCH_XDP_GPIO37
PCH_XDP_GPIO16
RUNSCI_EC#
DockID1
PCH_XDP_GPIO49
GPIO48ISO_PREP#
DockID0
PCI_PAR
CLK_PCI_FB_RCLK_PCI_KBC_R
USB_OC#6
PCI_PIRQE#
PCI_REQ3#
SATA_CLKREQ#
NPCI_RST#
PCI_GNT2#
USB_OC#0
WWAN_TRANSMIT_OFF#
PCH_XDP_GPIO28
WLAN_TRANSMIT_OFF#
CLK_PCI_1394_RCLK_PCI_DB_P
CLK_PCI_1394_R
STP_PCI#
PCH_XDP_GPIO28
USB_OC#4
USB_OC#4_R
PCI_REQ1#
PCI_PIRQG#PCI_PIRQC#
PCI_REQ1#
PCI_REQ2#
PCI_PIRQE#PCI_STOP#
PCI_IRDY#
PCI_REQ3#
PCI_DEVSEL#
PCI_TRDY#PCI_FRAME#
ACCEL_INT#
PCI_LOCK#
PCI_REQ0#
PCI_SERR#
PCI_PIRQB#ODD_DET#
PCI_PERR#
WWAN_TRANSMIT_OFF#
PCI_PIRQG#
NV_CLE
PCH_XDP_GPIO37USB_OC#3
USB_OC#6
USB_OC#4_RUSB_OC#1USB_OC#4
ISO_PREP#USB_OC#5
WWAN_DET#
WWAN_DET#
PCH_DDR_RST
USB_OC#2
CLK_PCI_FB_R
CLK_PCI_KBC_R
CLK_PCI_DB_P
CLK_PCI_TPM_R
PCH_DDR_RST
PCI_SERR#28,31,32
USB_OC#3 13
PLT_RST#4,13,21,22,24,27,28,30
PCI_RST#24,32
BUF_PLT_RST#4
GATEA20 31
H_CPUPWRGD 4
H_PECI 4
H_THERMTRIP# 4
KB_RST# 31
OCP#44
USB_OC#2 13
NV_CE0# 24NV_CE1# 24NV_CE2# 24NV_CE3# 24
NV_DQS0 24NV_DQS1 24
NV_DQ0 24NV_DQ1 24NV_DQ2 24NV_DQ3 24NV_DQ4 24NV_DQ5 24NV_DQ6 24NV_DQ7 24NV_DQ8 24NV_DQ9 24NV_DQ10 24NV_DQ11 24NV_DQ12 24NV_DQ13 24NV_DQ14 24NV_DQ15 24
NV_ALE 24NV_CLE 24
NV_RB# 24
NV_RE#_WR#0 24NV_RE#_WR#1 24
NV_WE#_CK0 24NV_WE#_CK1 24
ACCEL_INT#26
USB_OC#1 13
CLK_CPU_BCLK_P 4
CLK_CPU_BCLK#_P 4
USB20_N4 30USB20_P4 30
USB20_N2 19USB20_P2 19
USB20_N13 29USB20_P13 29
USB20_N12 20USB20_P12 20
USB20_N11 29USB20_P11 29
USB20_N9 24USB20_P9 24USB20_N10 28USB20_P10 28
USB20_N8 26USB20_P8 26
USB20_P3 19USB20_N3 19
RUNSCI_EC#31
WLAN_TRANSMIT_OFF#24
NPCI_RST#31,33
ODD_DET#13
LAN_DIS#22,23
PCI_AD[0..31]32
PCI_CBE0#32PCI_CBE1#32PCI_CBE2#32PCI_CBE3#32
PCI_TRDY#32
PCI_DEVSEL#32PCI_FRAME#32
PCI_IRDY#32
PCI_STOP#32
PCI_PAR32
THERM_SCI#4,21
PCI_PIRQE#32
PCI_PIRQG#32
PCI_PERR#32
CLK_PCI_139432
CLK_PCI_DEBUG_PCH24CLK_PCI_DB_PCH28
CLK_PCI_SIO_PCH33CLK_PCI_KBC_PCH31
CLK_PCI_TPM_PCH28CLK_PCI_FB14
PCH_NCTF618PCH_NCTF718
PCH_NCTF1918
PCH_NCTF2618
CLK_PCIE_LAN_REQ#22
CLK_PCIE_LAN_PCH 22CLK_PCIE_LAN_PCH# 22
PCI_REQ2#32
PCI_GNT2#32
DockID029
DockID129
ALS_EN#20
PCH_XDP_GPIO2813
PCH_XDP_GPIO013,27
PCH_XDP_GPIO3613
PCH_XDP_GPIO3713
PCH_XDP_GPIO1613
PCH_XDP_GPIO4913
USB_OC#0 13
WEBCAM_ON 20FPR_OFF 28
USB_OC#7 13,30USB_OC#6 13
PCI_PME#32BT_OFF 26
ISO_PREP# 29
USB_OC#5 13USB_OC#4 13
USB20_N1 26USB20_P1 26
WWAN_TRANSMIT_OFF#24
LED_LINK_LAN#_R22,23,31
WWAN_DET#24
PCH_DDR_RST11+3VS
+3VS
+3VS
+VCCP
+V_NVRAM_VCCQ
+3VS
+3VALW
+3VS
+3VS
+3VALW
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(4/6)-PCI/USB/RSVDCustom
16 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
U4.AU2 Layout rule trace l: ength < 0.5"
USBRBIAS Layout rule trace : length < 0.5"
USB Camera
CONN
WLAN
CONN
Bluetooth
DOCK
DOCK
CONN
WWAN Fingerprint
PCI
Boot BIOS StrapPCI_GNT0#
LPCMODEM_DISABLE# Boot BIOS Location
0011 1
10
0SPI*
Reserved(NAND)
NV_ALE High=EndabledLow=Disable (@)
Danbury Technology Enable
override/Top-BlockLow=A16 swap
PCI_GNT3#
A16 swap overide Strap/Top-BlockSwap Override jumper
Swap Override enabledHigh=Default
EXPRESS
Install 5/27.
Update on 10/30.
NIC
Remove R300. 10/30
Change to WWAN_DET#. 4/25
Change & Add on 02/23.
Set to Vcc when HIGH
DMI Termination VoltageNV_CLE Set to Vss when LOW
Change net name. 4/25
Dream color
Change JUSBL1from port0 to port1. 0204
Change net name from GPIO43. 2/6
Delete R297, duplicate onR32. 2/10
Remove USB from DP. 0224
Reserve R53. 4/25
NI. 4/25
Add. 4/25
Intel S3
T46 PAD
RP8
8.2K_0804_8P4R_5%
1 82 73 64 5
R290 10K_0402_5%1 2
T34 PAD
R278 1K_0402_5%@1 2R273 22_0402_5%1 2
RP7
8.2K_0804_8P4R_5%
1 82 73 64 5
C228 15P_0402_50V8J12
R147 0_0402_5%1 2
R264 10K_0402_5%1 2
R298 10K_0402_5%1 2
T43 PAD
T39 PAD
R725 0_0402_5%1 2
T56 PAD
R279 10K_0402_5%@1 2
T52 PAD
R281 22_0402_5%1 2
R727 0_0402_5%1 2
R302 10K_0402_5%1 2
R283 10K_0402_5%1 2
R255 10K_0402_5%1 2
T57 PAD
R286 10K_0402_5%1 2
R265 22.6_0402_1%1 2
R272 1K_0402_5%@1 2
C229 15P_0402_50V8J12
T48 PAD
T35 PAD
R300 10K_0402_5%@1 2
R295 1K_0402_5%1 2
T58 PAD
GPIO
MISC
NCTF
RSVD
CPU
U4F
IBEXPEAK-M_FCBGA1071
GPIO27AB12
GPIO28V13
GPIO24H10
GPIO57F8
LAN_PHY_PWR_CTRL / GPIO12K9
VSS_NCTF_1A4VSS_NCTF_2A49VSS_NCTF_3A5VSS_NCTF_4A50VSS_NCTF_5A52VSS_NCTF_6A53VSS_NCTF_7B2VSS_NCTF_8B4VSS_NCTF_9B52VSS_NCTF_10B53VSS_NCTF_11BE1VSS_NCTF_12BE53VSS_NCTF_13BF1VSS_NCTF_14BF53VSS_NCTF_15BH1VSS_NCTF_16BH2VSS_NCTF_17BH52VSS_NCTF_18BH53VSS_NCTF_19BJ1VSS_NCTF_20BJ2VSS_NCTF_21BJ4VSS_NCTF_22BJ49VSS_NCTF_23BJ5VSS_NCTF_24BJ50VSS_NCTF_25BJ52VSS_NCTF_26BJ53VSS_NCTF_27D1VSS_NCTF_28D2VSS_NCTF_29D53VSS_NCTF_30E1VSS_NCTF_31E53
TACH2 / GPIO6D37
TACH0 / GPIO17F38
TACH3 / GPIO7J32
TP9 M18
TP10 N18
TP11 AJ24
TP12 AK41
SATA3GP / GPIO37AB13
SATA5GP / GPIO49AA4
SCLOCK / GPIO22Y7
SLOAD / GPIO38V3
SDATAOUT0 / GPIO39P3
SDATAOUT1 / GPIO48AB6
A20GATE U2
PROCPWRGD BE10
RCIN# T1
PECI BG10
THRMTRIP# BD10
GPIO8F10
CLKOUT_PCIE6N AH45CLKOUT_PCIE6P AH46
PCIECLKRQ6# / GPIO45H3
CLKOUT_PCIE7N AF48CLKOUT_PCIE7P AF47
PCIECLKRQ7# / GPIO46F1
TP5 AY46
TP4 AY45
TP6 AV43
TP7 AV45
BMBUSY# / GPIO0Y3
TP16 M30
TP17 N30
NC_1 AB45
NC_2 AB38
NC_3 AB42
NC_4 AB41
GPIO15T7
TACH1 / GPIO1C38
TP13 AK42
TP3 BB22
TP1 BA22
TP2 AW22
TP14 M32
TP15 N32
SATA2GP / GPIO36AB7
NC_5 T39
INIT3_3V# P6
STP_PCI# / GPIO34M11
SATACLKREQ# / GPIO35V6
SATA4GP / GPIO16AA2
TP24 C10
TP8 AF13
CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3
CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1
TP19 AA23
TP18 H12
RP6
8.2K_0804_8P4R_5%
1 82 73 64 5
T50 PAD
R66 10K_0402_5%1 2
R284 10K_0402_5%1 2
R259 0_0402_5%1 2
T36 PAD
R269 10K_0402_5%1 2
R143 10K_0402_5%1 2
R267 22_0402_5%1 2R271 22_0402_5%1 2
T45 PAD
C220 15P_0402_50V8J12
R151 0_0402_5%1 2
R26054.9_0402_1%1 2
R280 10K_0402_5%1 2
T38 PAD
R277 22_0402_5%1 2
R266 22_0402_5%1 2
R263 1K_0402_5%@1 2
C227 15P_0402_50V8J12
R282 0_0402_5%1 2
T55 PAD
R301 10K_0402_5%1 2
T54 PAD
R53 0_0402_5%@1 2
T44 PAD
T37 PAD
R289 10K_0402_5%@1 2
T47 PAD
R291 10K_0402_5%1 2
R25810K_0402_5%
1 2
R275 10K_0402_5%1 2
R293 10K_0402_5%1 2
T32 PADR1007 0_0402_5%1 2
U6SN74AHC1G08DCKR_SC70-5@
IN1 1
IN2 2G3
O4
P5
R274 10K_0402_5%1 2R268 1K_0402_5%@1 2
T33 PAD
T49 PAD
R288 10K_0402_5%1 2
RP9
8.2K_0804_8P4R_5%
1 82 73 64 5
R257 1K_0402_5%@1 2
RP5
8.2K_0804_8P4R_5%
1 82 73 64 5
R728 0_0402_5%1 2
R299 10K_0402_5%1 2
R270 10K_0402_5%1 2
R292 10K_0402_5%1 2
R303 8.2K_0402_5%1 2
R256 10K_0402_5%12
T40 PAD
R262 32.4_0402_1%1 2
R726 0_0402_5%1 2
T51 PAD
T42 PAD
R294 10K_0402_5%1 2
PCI
NVRAM
USB
U4E
IBEXPEAK-M_FCBGA1071
AD0H40AD1N34AD2C44
AD20C42AD21K46AD22M51AD23J52AD24K51AD25L34AD26F42AD27J40AD28G46AD29F44
AD3A38
AD30M47AD31H36
AD4C36AD5J34AD6A40AD7D45AD8E36AD9H48
C/BE0#J50C/BE1#G42C/BE2#H47C/BE3#G34
PCIRST#K6
PERR#E50
PIRQA#G38PIRQB#H51PIRQC#B37PIRQD#A44
PLOCK#D49
PLTRST#D5
PME#M7
REQ0#F51REQ1# / GPIO50A46REQ2# / GPIO52B45REQ3# / GPIO54M53
SERR#E44
STOP#D41TRDY#C48
NV_ALE BD3
NV_CE#0 AY9NV_CE#1 BD1NV_CE#2 AP15NV_CE#3 BD8
NV_CLE AY6
NV_DQS0 AV9NV_DQS1 BG8
NV_DQ0 / NV_IO0 AP7NV_DQ1 / NV_IO1 AP6
NV_DQ10 / NV_IO10 BD6NV_DQ11 / NV_IO11 BB7NV_DQ12 / NV_IO12 BC8NV_DQ13 / NV_IO13 BJ8NV_DQ14 / NV_IO14 BJ6NV_DQ15 / NV_IO15 BG6
NV_DQ2 / NV_IO2 AT6NV_DQ3 / NV_IO3 AT9NV_DQ4 / NV_IO4 BB1NV_DQ5 / NV_IO5 AV6NV_DQ6 / NV_IO6 BB3NV_DQ7 / NV_IO7 BA4NV_DQ8 / NV_IO8 BE4NV_DQ9 / NV_IO9 BB6
NV_RB# AV7
NV_RCOMP AU2
NV_WR#0_RE# AY8NV_WR#1_RE# AY5
NV_WE#_CK0 AV11NV_WE#_CK1 BF5
USBP0N H18USBP0P J18
USBP10N A22USBP10P C22USBP11N G24USBP11P H24USBP12N L24USBP12P M24USBP13N A24USBP13P C24
USBP1N A18USBP1P C18USBP2N N20USBP2P P20USBP3N J20USBP3P L20USBP4N F20USBP4P G20USBP5N A20USBP5P C20USBP6N M22
USBP7N B21USBP7P D21USBP8N H22USBP8P J22USBP9N E22USBP9P F22
USBRBIAS# B25
USBRBIAS D25
USBP6P N22
AD10E40AD11C40AD12M48AD13M45AD14F53AD15M40AD16M43AD17J36AD18K48AD19F40
DEVSEL#F46FRAME#C46
GNT0#F48GNT1# / GPIO51K45GNT2# / GPIO53F36GNT3# / GPIO55H53
PIRQE# / GPIO2B41PIRQF# / GPIO3K53PIRQG# / GPIO4A36PIRQH# / GPIO5A48
IRDY#A42PARH44
OC0# / GPIO59 N16OC1# / GPIO40 J16OC2# / GPIO41 F16OC3# / GPIO42 L16OC4# / GPIO43 E14OC5# / GPIO9 G16
OC6# / GPIO10 F12OC7# / GPIO14 T15
CLKOUT_PCI0N52CLKOUT_PCI1P53CLKOUT_PCI2P46CLKOUT_PCI3P51CLKOUT_PCI4P48
R276 22_0402_5%1 2
T53 PAD
T41 PAD
R261 56_0402_5%1 2
R296 10K_0402_5%1 2
T104 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_V5REF_SUS
+PCH_VCC1_1_23
ICH_V5REF_SUS
+PCH_VCC1_1_22
+PCH_VCC1_1_20
+V1.1A_INT_VCCSUS
+VCCSST
+PCH_VCC1_1_21
+VCCRTCEXT
+V1.05S_VCCA_B_DPL
+V1.05S_VCCA_A_DPL
+V1.05S_VCCA_B_DPL
ICH_V5REF_RUN
ICH_V5REF_RUN+V1.05S_VCCA_A_DPL
+1.05VS
+1.05VS
+1.05VS
+3VS
+3VS
+1.8VS
+VCCP
+V_NVRAM_VCCQ
+3VM
+1.05VM
+1.8VS
+3VALW
+3VS
+VCCP
+RTCVCC
+1.05VS
+3VS
+1.05VM
+1.05VS
+3VALW
+1.05VS
+5VS +3VS
+3VALW+5VALW
+3VS
+3VS
+1.8VS
+1.05VS
+3VALW
+1.05VS
+1.05VS
+1.8VS
+1.05VM
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(5/6)-PWRCustom
17 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
20 mils
20 mils
3.208A
0.163A
1.998A
0.344A
0.052A
0.035A
0.072A
0.073A0.357A
2mA
>1mA
>1mA
6mA
0.032A
0.069A
0.030A
0.156A
6mA0.035A
0.061A
0.059A
0.085A
0.042A
1.524A
0 . 2 A @ 3 . 3 V
0 . 4 A @ 3 . 3 V
0 . 1 A @ 1 . 1 V
2 m A @ 3 . 3 V
>1mA
Add on 11/24.
Chnage 10uFto 22uF forDB1. 12/03
Chnage to TP. 2/6
Chnage to TP. 2/6
Chnage to TP. 2/6
Chnage to TP. 2/6
Chnage C298 to1uF. 5/15
HF
HF
Remove R310. 4/25
POWER
VCC CORE
DMI
PCI E*
CRT
LVDS
FDINAND / SPI
HVCMOS
U4G
IBEXPEAK-M_FCBGA1071
VCCCORE[1]AB24VCCCORE[2]AB26VCCCORE[3]AB28VCCCORE[4]AD26VCCCORE[5]AD28VCCCORE[6]AF26VCCCORE[7]AF28VCCCORE[8]AF30VCCCORE[9]AF31VCCCORE[10]AH26VCCCORE[11]AH28VCCCORE[12]AH30VCCCORE[13]AH31VCCCORE[14]AJ30VCCCORE[15]AJ31
VCCPNAND[4] AK19VCCPNAND[3] AK20
VCCIO[27]AN23VCCIO[28]AN24VCCIO[29]AN26VCCIO[30]AN28
VCCIO[54]AN30VCCIO[55]AN31
VCCIO[33]AT26VCCIO[34]AT28VCCIO[35]AU26VCCIO[36]AU28VCCIO[37]AV26VCCIO[38]AV28VCCIO[39]AW26VCCIO[40]AW28VCCIO[41]BA26VCCIO[42]BA28VCCIO[43]BB26VCCIO[44]BB28VCCIO[45]BC26VCCIO[46]BC28VCCIO[47]BD26VCCIO[48]BD28VCCIO[49]BE26VCCIO[50]BE28VCCIO[51]BG26VCCIO[52]BG28VCCIO[53]BH27
VCCIO[31]BJ26VCCIO[32]BJ28
VCCADAC[1] AE50
VCCADAC[2] AE52
VCCTX_LVDS[1] AP43VCCTX_LVDS[2] AP45
VCCALVDS AH38
VCCVRM[2] AT24
VCCVRM[1]AT22
VCCAPLLEXPBJ24
VCCFDIPLLBJ18
VCCPNAND[6] AK13VCCPNAND[5] AK15
VCCPNAND[7] AM12VCCPNAND[8] AM13
VCCIO[24]AK24 VCCTX_LVDS[4] AT45VCCTX_LVDS[3] AT46
VSSA_DAC[1] AF53
VSSA_LVDS AH39
VSSA_DAC[2] AF51
VCCIO[1]AM23
VCC3_3[2] AB34
VCC3_3[3] AB35
VCC3_3[4] AD35
VCC3_3[1]AN35
VCCME3_3[1] AM8VCCME3_3[2] AM9VCCME3_3[3] AP11VCCME3_3[4] AP9
VCCPNAND[2] AK16
VCCPNAND[9] AM15
VCCPNAND[1] AM16
VCCDMI[1] AT16
VCCDMI[2] AU16
VCCIO[25]AN20VCCIO[26]AN22
C311
0.1U_0402_16V
4Z
1
2
R314 0_0402_5%1 2
C293
0.1U_0402_16V
4Z
1
2
R308 0_0402_5%1 2
C219
0.1U_0402_16V4Z
1
2C313
1U_0402_6.3V
4Z
1
2
C295
1U_0402_6.3V
4Z
1
2
C316 0.1U_0402_16V4Z1 2
C328
0.1U_0402_16V
4Z
1
2
C307
10U_0603_6.3V
6M
1
2
C317 0.1U_0402_16V4Z1 2
T97PAD
C286
1U_0603_10V
4Z
1
2
C291
10U_0805_6.3V
6M
1
2
C306
1U_0402_6.3V
4Z
1
2
C299
22U_0805_6.3V
6M
1
2
L410UH_LB2012T100MR_20%_0805
1 2
T96 PAD
C33
1
1U_0
402_
6.3V
4Z
1
2
C302 0.1U_0402_16V4Z1 2
C305
1U_0402_6.3V
4Z
1
2
C297 0.1U_0402_16V4Z1 2
+ C325220U_D2_4VM_R15
1
2
C3101U_0402_6.3V4Z
1
2
R312 0_0402_5%1 2
C2851U_0402_6.3V4Z
1
2
C2981U_0402_6.3V4Z
1
2
C315 0.1U_0402_16V4Z1 2
C2920.1U_0402_16V4Z
1
2
C314
1U_0402_6.3V
4Z
1
2
C288
1U_0402_6.3V
4Z
1
2
R305 0_0603_5%1 2
C321
0.1U_0402_16V
4Z
1
2
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC
PCI/GPIO/LPC
U4J
IBEXPEAK-M_FCBGA1071
DCPSUSBYPY20
VCCME[1]AD38
VCCME[2]AD39
VCCME[3]AD41
VCCME[5]AF41
VCCME[6]AF42
VCCSUSHDA L30
VCCSUS3_3[28] U23
VCCIO[56] V23
VCCIO[13] AD19VCCIO[14] AF20VCCIO[15] AF19
VCCME[7]V39
VCCME[8]V41
VCCME[9]V42
VCCME[10]Y39
VCCME[11]Y41
VCCME[12]Y42
V5REF K49
VCC3_3[8] J38
VCC3_3[9] L38
VCC3_3[10] M36
VCC3_3[11] N36
VCC3_3[12] P36
VCC3_3[13] U35
VCCRTCA12
VCCSUS3_3[27] A26VCCSUS3_3[26] A28VCCSUS3_3[25] B27VCCSUS3_3[24] C26VCCSUS3_3[23] C28VCCSUS3_3[22] E26VCCSUS3_3[21] E28VCCSUS3_3[20] F26VCCSUS3_3[19] F28VCCSUS3_3[18] G26VCCSUS3_3[17] G28VCCSUS3_3[16] H26VCCSUS3_3[15] H28VCCSUS3_3[14] J26VCCSUS3_3[13] J28VCCSUS3_3[12] L26VCCSUS3_3[11] L28VCCSUS3_3[10] M26VCCSUS3_3[9] M28VCCSUS3_3[8] N26VCCSUS3_3[7] N28VCCSUS3_3[6] P26VCCSUS3_3[5] P28VCCSUS3_3[4] U24VCCSUS3_3[3] U26VCCSUS3_3[2] U28VCCSUS3_3[1] V28
VCCIO[11] AD20
VCCIO[20] AD22
VCCIO[10] AH19
VCCADPLLA[2]BB53
VCCADPLLB[1]BD51
VCCIO[22]AJ35
V5REF_SUS F24
VCCIO[16] AH20
VCCIO[17] AB19VCCIO[18] AB20VCCIO[19] AB22
VCCIO[12] AF22
VCC3_3[14] AD13
VCCIO[9] AH22
VCCVRM[4] AT20
DCPSUSY22
VCCIO[2]AF34
VCCIO[3]AH34
VCCLAN[1]AF23
VCCLAN[2]AF24
VCCADPLLA[1]BB51
VCCADPLLB[2]BD53
VCCVRM[3]AU24
VCCACLK[1]AP51
VCCACLK[2]AP53
DCPRTCV9
VCCIO[4]AF32
VCCME[4]AF43
VCCIO[23]AH35
VCCIO[21]AH23
DCPSSTV12 VCCSATAPLL[2] AK1VCCSATAPLL[1] AK3
VCCME[13] AA34VCCME[14] Y34VCCME[15] Y35VCCME[16] AA35
VCC3_3[5]V15
VCC3_3[6]V16
VCC3_3[7]Y16
VCCSUS3_3[29]P18
VCCSUS3_3[30]U19
VCCSUS3_3[31]U20
VCCSUS3_3[32]U22
VCCIO[5] V24VCCIO[6] V26VCCIO[7] Y24VCCIO[8] Y26
V_CPU_IO[1]AT18
V_CPU_IO[2]AU18
C304
1U_0402_6.3V
4Z
1
2
C312
1U_0402_6.3V
4Z
1
2
C333
0.1U_0402_16V
4Z
1
2
C334
0.1U_0402_16V
4Z
1
2
C323 0.1U_0402_16V4Z1 2
R306100_0402_1%
12
R313 0_0402_5%1 2
C327
4.7U_0603_6.3V
6K
1
2
+ C330220U_D2_4VM_R15
1
2
D3
CH751H-40PT_SOD323-2
21
C301
1U_0402_6.3V
4Z
1
2
C303
1U_0402_6.3V
4Z
1
2R307
100_0402_1%
12
C287
10U_0805_6.3V
6M
1
2
C3090.1U_0402_16V4Z
1
2
D2
CH751H-40PT_SOD323-2
21
T59PAD
C3321U_0402_6.3V4Z
1
2
C324
1U_0402_6.3V
4Z
1
2
R311 0_0402_5%1 2
L510UH_LB2012T100MR_20%_0805
1 2
C329
0.1U_0402_16V
4Z
1
2
C290
0.1U_0402_16V
4Z1
2
T94PAD
C322 0.1U_0402_16V4Z1 2
C3261U_0402_6.3V4Z
1
2
T95PAD
C308 1U_0603_10V4Z1 2
R304 0_0603_5%1 2
C294
0.1U_0402_16V
4Z
1
2
R309 0_0402_5%1 2
C300
22U_0805_6.3V
6M
1
2
C289
0.01U_0402_16V
7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRACK_BGA
CRACK_BGA
CRACK_BGA
PCH_NCTF616
PCH_NCTF716
PCH_NCTF1916
PCH_NCTF2616
CRACK_BGA 31
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
IBEX-M(6/6)-GNDCustom
18 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
BGA Ball Cracking Prevention and Detection
Q5A2N7002DW-T/R7_SOT363-6
61
2
Q4A2N7002DW-T/R7_SOT363-6
61
2
U4I
IBEXPEAK-M_FCBGA1071
VSS[159]AY7VSS[160]B11VSS[161]B15VSS[162]B19VSS[163]B23VSS[164]B31VSS[165]B35VSS[166]B39VSS[167]B43VSS[168]B47VSS[169]B7VSS[170]BG12VSS[171]BB12VSS[172]BB16VSS[173]BB20VSS[174]BB24VSS[175]BB30VSS[176]BB34VSS[177]BB38VSS[178]BB42VSS[179]BB49VSS[180]BB5VSS[181]BC10VSS[182]BC14VSS[183]BC18VSS[184]BC2VSS[185]BC22VSS[186]BC32VSS[187]BC36VSS[188]BC40VSS[189]BC44VSS[190]BC52VSS[191]BH9VSS[192]BD48VSS[193]BD49VSS[194]BD5VSS[195]BE12VSS[196]BE16VSS[197]BE20VSS[198]BE24VSS[199]BE30VSS[200]BE34VSS[201]BE38VSS[202]BE42VSS[203]BE46VSS[204]BE48VSS[205]BE50VSS[206]BE6VSS[207]BE8VSS[208]BF3VSS[209]BF49VSS[210]BF51VSS[211]BG18VSS[212]BG24VSS[213]BG4VSS[214]BG50VSS[215]BH11VSS[216]BH15VSS[217]BH19VSS[218]BH23VSS[219]BH31VSS[220]BH35VSS[221]BH39VSS[222]BH43VSS[223]BH47VSS[224]BH7VSS[225]C12VSS[226]C50VSS[227]D51VSS[228]E12VSS[229]E16VSS[230]E20VSS[231]E24VSS[232]E30VSS[233]E34VSS[234]E38VSS[235]E42VSS[236]E46VSS[237]E48
VSS[264] K47VSS[265] K7VSS[266] L14VSS[267] L18VSS[268] L2VSS[269] L22VSS[270] L32VSS[271] L36VSS[272] L40VSS[273] L52VSS[274] M12VSS[275] M16VSS[276] M20VSS[277] N38VSS[278] M34VSS[279] M38VSS[280] M42VSS[281] M46VSS[282] M49VSS[283] M5VSS[284] M8VSS[285] N24VSS[286] P11
VSS[288] P22VSS[289] P30VSS[290] P32VSS[291] P34VSS[292] P42VSS[293] P45VSS[294] P47VSS[295] R2VSS[296] R52VSS[297] T12VSS[298] T41VSS[299] T46VSS[300] T49VSS[301] T5VSS[302] T8VSS[303] U30VSS[304] U31VSS[305] U32VSS[306] U34VSS[307] P38VSS[308] V11VSS[309] P16VSS[310] V19VSS[311] V20VSS[312] V22VSS[313] V30VSS[314] V31VSS[315] V32VSS[316] V34
VSS[238]E6VSS[239]E8VSS[240]F49VSS[241]F5VSS[242]G10VSS[243]G14VSS[244]G18VSS[245]G2VSS[246]G22VSS[247]G32VSS[248]G36VSS[249]G40VSS[250]G44VSS[251]G52
VSS[317] V35VSS[318] V38VSS[319] V43VSS[320] V45VSS[321] V46VSS[322] V47VSS[323] V49VSS[324] V5VSS[325] V7VSS[326] V8VSS[327] W2VSS[328] W52VSS[329] Y11VSS[330] Y12VSS[331] Y15VSS[332] Y19VSS[333] Y23VSS[334] Y28VSS[335] Y30VSS[336] Y31VSS[337] Y32VSS[338] Y38VSS[339] Y43VSS[340] Y46
VSS[342] Y5VSS[343] Y6VSS[344] Y8
VSS[341] P49
VSS[345] P24
VSS[287] AD15
VSS[252]AF39VSS[253]H16VSS[254]H20VSS[255]H30VSS[256]H34VSS[257]H38VSS[258]H42
VSS[346] T43VSS[347] AD51VSS[348] AT8VSS[349] AD47VSS[350] Y47VSS[351] AT12VSS[352] AM6VSS[353] AT13VSS[354] AM5VSS[355] AK45VSS[356] AK39VSS[366] AV14
VSS[262] K11VSS[263] K43
VSS[259] H49VSS[260] H5VSS[261] J24
R316
100K_0402_5%
12
R317
100K_0402_5%
12
Q5B2N7002DW-T/R7_SOT363-6
3
5
4
R315
100K_0402_5%
12
R318
100K_0402_5%
12
U4H
IBEXPEAK-M_FCBGA1071
VSS[1]AA19VSS[2]AA20VSS[3]AA22
VSS[5]AA24VSS[6]AA26VSS[7]AA28VSS[8]AA30VSS[9]AA31VSS[10]AA32VSS[11]AB11VSS[12]AB15VSS[13]AB23VSS[14]AB30VSS[15]AB31VSS[16]AB32VSS[17]AB39VSS[18]AB43VSS[19]AB47VSS[20]AB5VSS[21]AB8VSS[22]AC2VSS[23]AC52VSS[24]AD11VSS[25]AD12VSS[26]AD16VSS[27]AD23VSS[28]AD30VSS[29]AD31VSS[30]AD32VSS[31]AD34
VSS[33]AD42VSS[34]AD46VSS[35]AD49VSS[36]AD7VSS[37]AE2VSS[38]AE4VSS[39]AF12
VSS[43]AF35VSS[44]AP13
VSS[46]AF45VSS[47]AF46VSS[48]AF49VSS[49]AF5VSS[50]AF8VSS[51]AG2VSS[52]AG52VSS[53]AH11VSS[54]AH15VSS[55]AH16VSS[56]AH24VSS[57]AH32
VSS[59]AH43VSS[60]AH47VSS[61]AH7VSS[62]AJ19VSS[63]AJ2VSS[64]AJ20VSS[65]AJ22VSS[66]AJ23VSS[67]AJ26VSS[68]AJ28VSS[69]AJ32VSS[70]AJ34VSS[71]AT5VSS[72]AJ4VSS[73]AK12
VSS[76]AK26VSS[77]AK22VSS[78]AK23VSS[79]AK28
VSS[80] AK30VSS[81] AK31VSS[82] AK32VSS[83] AK34VSS[84] AK35VSS[85] AK38VSS[86] AK43VSS[87] AK46VSS[88] AK49VSS[89] AK5VSS[90] AK8VSS[91] AL2VSS[92] AL52VSS[93] AM11
VSS[96] AM20VSS[97] AM22VSS[98] AM24VSS[99] AM26
VSS[100] AM28
VSS[102] AM30VSS[103] AM31VSS[104] AM32VSS[105] AM34VSS[106] AM35VSS[107] AM38VSS[108] AM39VSS[109] AM42VSS[110] AU20VSS[111] AM46VSS[112] AV22VSS[113] AM49VSS[114] AM7
VSS[116] BB10VSS[117] AN32VSS[118] AN50VSS[119] AN52VSS[120] AP12VSS[121] AP42VSS[122] AP46VSS[123] AP49VSS[124] AP5VSS[125] AP8VSS[126] AR2VSS[127] AR52VSS[128] AT11
VSS[131] AT32VSS[132] AT36VSS[133] AT41VSS[134] AT47VSS[135] AT7VSS[136] AV12VSS[137] AV16VSS[138] AV20VSS[139] AV24VSS[140] AV30VSS[141] AV34VSS[142] AV38VSS[143] AV42VSS[144] AV46VSS[145] AV49VSS[146] AV5VSS[147] AV8VSS[148] AW14VSS[149] AW18VSS[150] AW2VSS[151] BF9VSS[152] AW32VSS[153] AW36VSS[154] AW40VSS[155] AW52VSS[156] AY11VSS[157] AY43VSS[158] AY47
VSS[40]Y13
VSS[42]AU4
VSS[45]AN34
VSS[115] AA50
VSS[0]AB16
VSS[58]AV18
VSS[32]AU22
VSS[4]AM19
VSS[74]AM41VSS[75]AN19
VSS[41]AH49
VSS[129] BA12VSS[130] AH48
VSS[101] BA42
VSS[95] AD24VSS[94] BB44
Q4B2N7002DW-T/R7_SOT363-6
3
5
4
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
D_DDCCLK
D_DDCDATAD_VSYNC
H SYNC D _HSYNC
VS YNC
VGA_R
VGA_G
VGA_B
D_VSYNC
D _HSYNC
DAC_BL
DAC_GR
DAC_RE
VGA_RED_R
VGA_GRN_R
VGA_BLU_R
VGA_R
VGA_G
VGA_B
VGA_R
D_DDCDATAD_DDCCLK
VGA_G
VGA_B
D _HSYNCD_VSYNC
CRT_HSYNC21
CRT_VSYNC21
D_HSYNC 29
D_VSYNC 29 CRT_DDC_DATA 21
CRT_DDC_CLK 21
D_DDCDATA29
D_DDCCLK29
RED_R 29
GREEN_R 29
BLUE_R 29
DAC_RED21
DAC_GRN21
DAC_BLU21
VGA_RED29
VGA_GRN29
VGA_BLU29
USB20_P316USB20_N316
USB20_N216USB20_P216
SLP_S4 26,27,35
+CRTVDD
+5VS
+3VS
+5VS
+CRTVDD
+CRTVDD+RCRT_VCC+5VS
+5VALW
+CRTVDD+CRTVDD
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
CRT & USB Connector
19 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Close to JVGA1
W=40mils
L Place cloce to JMXM1
D_HSYNC & D_VSYNCshould be routed todocking connector thento VGA connector
L
L Place cloce to JMXM1
Remove R319~R321, theywill put on MXM board.11/11
Remove R334 & R335,should istall to MXMboard. 11/15Change R332 & R333
to 4.7K. 11/15
Remove R319~R321, they will puton MXM board. 11/11
Add C614~C616 for Nvidia request.11/15
Change R337 & R336to 0ohm. 3/9
Connect to SLP_S4from dummy. 1/22
Reserve for EMI. 7/21
C724
10P_0402_50V
8C@
1
2
F11.1A_6VDC_FUSE
21
R333
4.7K_0402_5%
12
C614
10P_0402_50V
8C@
1
2
JVGA1
ACES_50611-0120N-001CONN@
11335577991111131315151717191921212323
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 24
L60805CS-390XJLC_0805
1 2
G
D S
Q112N7002_SOT23-3
2
1 3
C723
10P_0402_50V
8C@
1
2
D4CH491D_SC592 1
C340
10P_0402_50V
8C@
1
2
D9
DA
N217T146_S
C59-3
@
2 31
R336 0_0402_5%1 2
C339
10P_0402_50V
8C@
1
2
C615
10P_0402_50V
8C@
1
2
U774AHCT1G125GW_SOT353-5
A2 Y 4OE
#1
G3
P5
R337 0_0402_5%1 2
R332
4.7K_0402_5%
12
R329
150_0402_1%12
R326 0_0805_5%1 2
R330
150_0402_1%12
R328 0_0805_5%1 2R327 0_0805_5%1 2
L90805CS-111XJLC_0805
1 2
C616
10P_0402_50V
8C@
1
2
L100805CS-390XJLC_0805
1 2
U874AHCT1G125GW_SOT353-5
A2 Y 4OE
#1
G3
P5
JUSBU1
ACES_87212-10G0CONN@
1122334455667788
G12 12G11 11991010
C335
0.1U_0402_10V6K
1
2
L70805CS-111XJLC_0805
1 2
C3430.1U_0402_16V4Z
1 2
R325 0_0805_5%1 2
D5
DA
N217T146_S
C59-3
@2 31
C338
18P_0402_50V
8J
1
2
C341
10P_0402_50V
8C@
1
2
R324 0_0805_5%1 2
L80805CS-390XJLC_0805
1 2
C3455P_0402_50V8C
1
2
D7
DA
N217T146_S
C59-3
@2 31
C3420.1U_0402_16V4Z
1 2
R331
150_0402_1%12
C336
18P_0402_50V
8J
1
2
G
D S
Q122N7002_SOT23-3
2
1 3
L110805CS-111XJLC_0805
1 2
D6
DA
N217T146_S
C59-3
@2 31
C725
10P_0402_50V
8C@
1
2
C3445P_0402_50V8C
1
2
C337
18P_0402_50V
8J
1
2
D8
DA
N217T146_S
C59-3
@
2 31
R323 0_0805_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_P12_R
R_DPA_TXP2
DPA_C_AUX-
DCAD
DPA_HPD_R
R_DPA_TXN0
R_DPA_TXN1
R_DPA_TXP0
R_DPA_TXN3
R_DPA_TXN2
R_DPA_TXP1
R_DPA_TXP3
DPA_C_AUX-
DPA_C_AUX+
DPA_HPD_R
DPD_C_TXP0DPD_C_TXN0
DPD_C_TXP1DPD_C_TXN1
DPD_C_TXP2DPD_C_TXN2
DPD_C_TXP3DPD_C_TXN3
DPD_C_AUXDPD_C_AUX#
DPD_HPD_R
DPA_C_AUX+
DPD_C_AUX#
DPD_C_AUX
DCAD
USB20_N12_RUSB20_P12_R
LID_SW#
DISP_OFF# ENABLT
LID_SW#
USB20_N12_R
DPD_HPD_R
ENAVDD21
DPA_TXN221
DPA_TXP121
DPA_TXP321
DPA_TXP221
DPA_TXN021
DPA_TXN321
DPA_TXN121
DPA_TXP021
DPA_HPD 21
LVDS_A0N21LVDS_A0P21
LVDS_A1P21LVDS_A1N21
LVDS_A2P21LVDS_A2N21
LVDS_B1P 21LVDS_B1N 21
LVDS_B0P 21LVDS_B0N 21
INV_PWM 21DPD_TXP021DPD_TXN021
DPD_TXP121DPD_TXN121
DPD_TXN221DPD_TXP221
DPD_TXP321DPD_TXN321
DPD_AUX 21DPD_AUX# 21
DPA_C_AUX+21
DPA_C_AUX-21
DDC1_EN21
ALS_EN# 16
LVDS_BCLKP 21LVDS_BCLKN 21
LVDS_B2P 21LVDS_B2N 21
LVDS_ACLKP21LVDS_ACLKN21
USB20_P1216USB20_N1216
WEBCAM_ON16
EDID_CLK 21EDID_DATA 21
ENABLT 21
LID_SW# 14,25,31
DPD_HPD 21
+LCDVDD+LCDVDD
+3VS
+5V_WEBCAM
+5VALW
+5VALW
+DPA_3V
+DPA_VCC
+3VS
+DPA_VCC
INVPWR_B+B+
+5V_WEBCAM+5V_KL
+DPA_VCC
+5VS +5VS
+3VS
+5V_KL +5VS
+LCDVDD+LCDVDD
+5VS
+3VS
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
LCD & DP CONN
20 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
LCD/PANEL BD. CONN.LCD POWER CIRCUIT
Change power source from+5VALW to +5VS. 10/27
Display port Connector
Remove R367 pulldown on DPA_HPD.There is a 100K pulldown on themodule. 11/15
Add by Nvidia. 11/15
Change Design. 4/25
Add on 12/08.
Add by Nvidia. 12/08
Modify. 0204
Modify pin assignment. 2/23
Add C439 on DISP_OFF# near theconnecor and change C359 to0.1U. 2/10
Remove Q61 & R501. 3/2
Change R46 to 100ohm. 7/19
Del R365 & change F2. 3/2
NI. 3/6
Add L20 & C390. 3/6
HF
Q13SI2305DS-T1-E3_SOT23-3
2
31
R3490_0805_5%
12
L2010UH_LB2012T100MR_20%_0805
1 2
C695 0.1U_0402_16V4Z1 2
R346
100K_0402_5%
12
R338100_0402_1%
12
C368 0.1U_0402_16V4Z1 2
R348 47K_0402_5%1 2
R618 100K_0402_5%1 2
R3450_0402_5% 12
JLCD1
ACES_50238-05071-001CONN@
1133557799111113131515171719192121232325252727292931313333353537373939
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
4141 42 424343 44 444545 46 464747 48 484949 50 50GND51 GND 52
G
D S
Q14AP2301GN 1P_SOT23
2
1 3
C35
90.
1U_0
402_
16V
4Z
1
2
Q68B2N7002DW-7-F_SOT363-6
3
5
4
Q68A2N7002DW-7-F_SOT363-6
61
2C27
8
10U
_080
5_10
V4Z
1
2
C390220P_0402_50V7K
1
2
C346 0.1U_0402_16V4Z1 2
R14
6
10K
_040
2_5%1
2
C351
47P_0402_50V
8J@
12
C363 0.1U_0402_16V4Z1 2
C704 0.1U_0402_16V4Z1 2
C702 0.1U_0402_16V4Z1 2
R36710K_0402_5%
12
Q8B2N7002DW-T/R7_SOT363-6
3
5
4
D11 CH751H-40PT_SOD323-22 1
R35
1
1M_0
402_
5%1
2
R287 10K_0402_5%1 2
C3484.7U_0805_10V4Z
1
2
C361
47P_0402_50V
8J
@
12
C700 0.1U_0402_16V4Z1 2
JDP1
MOLEX_105020-0001CONN@
GND 24GND 23GND 22GND 21
DP_PWR20RTN19HP_DET18AUX_CH-17GND16AUX_CH+15GND14CA_DET13LANE3-12LANE3_shield11LANE3+10LANE2-9LANE2_shield8LANE2+7LANE1-6LANE1_shield5LANE1+4LANE0-3LANE0_shield2LANE0+1
D48BAV99-7-F_SOT23-3 @
231
R344100K_0402_1%
@
12
R36
0
0_12
06_5
%1
2
C367 0.1U_0402_16V4Z1 2
F2N
AN
OS
MD
C05
0F 0
.5A
13.
2V P
OLY
-FU
SE
21
C703 0.1U_0402_16V4Z1 2
G
D S
Q342N7002_SOT23-3
2
1 3
R36810K_0402_5%
12
G
DS
Q16AP2301GN 1P_SOT23
2
13
C696 0.1U_0402_16V4Z1 2
D13
SD
M10
U45
-7_S
OD
523-
2
@2
1
C283
4.7U_0805_25V
6-K
@
1
2
R46100_0402_1%1 2
C362
4.7U_0805_25V
6-K
@
1
2
C369 0.1U_0402_16V4Z1 2
R334 100K_0402_5%1 2
C27
7
0.01
U_0
402_
16V
7K
1
2
C370 0.1U_0402_16V4Z1 2
Q8A2N7002DW-T/R7_SOT363-6
61
2
C354
4.7U_0805_10V
4Z
1
2
C3494.7U_0805_10V4Z@
1
2
C699 0.1U_0402_16V4Z1 2
D10
CM1293A-02SR_SOT143-4@GND 1
IO1 2
PWR4
IO23
C43
968
0P_0
402_
50V7
K
@
12
Q15
DTC124EKAT146_SC59-3IN2
OU
T1
GN
D3
R335 100K_0402_5%1 2
C366 0.1U_0402_16V4Z1 2
C357 680P_0402_50V7K1 2
C3470.1U_0402_16V4Z
1
2
R36
3
5.1M
_040
2_5%
12
C365 0.1U_0402_16V4Z1 2C364 0.1U_0402_16V4Z1 2
C698 0.1U_0402_16V4Z1 2C697 0.1U_0402_16V4Z1 2
R3420_0402_5% 12
R347 100K_0402_5%@1 2
C352
0.01U_0402_16V
7K
1
2
C378220P_0402_50V7K
1
2
R341 47K_0402_5%1 2C701 0.1U_0402_16V4Z1 2
C3580.1U_0402_16V4Z
1
2
C360
680P_0402_50V7K
1
2
R617 100K_0402_5%1 2
C356680P_0402_50V7K
1
2
C350
1U_0603_10V
4Z
1
2
L1610UH_LB2012T100MR_20%_0805
1 2
C353
0.1U_0402_16V
4Z
1
2
R340 1M_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPA_HPD_G
PRSNT_L#
ENAVDD_G
ENAVDD_GINV_PWM_G
ENABLT
INV_PWM_GENAVDD_G
INV_PWM_G
PWR_LEVEL
TH_PWM
TH_OVERT#
SML1DAT_MXMSML1CLK_MXM
HDMI_CEC
EDID_DATAEDID_CLK
PRSNT_R#
WAKE#
TH_OVERT#
DPB_HPD_G
DPA_HPD_G
PRSNT_L#
PEG_CLKREQ#
WAKE#PRSNT_R#
DPC_HPD_G
DPA_ AUX-DPA_ AUX+
MXM_VGA_POK_R
PEG_CLKREQ#
HDMI_CEC
DPC_HPD_G
DPB_HPD_G
SML1CLK_MXM
DPA_ AUX-
DPA_ AUX+
DDC1_EN
DDC1_EN
DPD_HPD_G
MXM_VGA_POK
MXM_VGA_POK
SML1DAT_MXM
PWR_LEVEL
DPD_HPD_G
DAC_GRN 19DAC_BLU 19
ENAVDD20
DPC_TXP229
DPC_TXN329DPC_TXP329
DPC_TXN129DPC_TXP129
DPC_TXN229
DPC_AUX29DPC_AUX#29
INV_PWM20
DPA_TXP120DPA_TXN120
DPA_TXP220DPA_TXN220
DPA_TXP320DPA_TXN320
DPA_TXP020DPA_TXN020
EDID_CLK20EDID_DATA20
DPC_TXP029DPC_TXN029
PLT_RST# 4,13,16,22,24,27,28,30
DPB_TXP0 29DPB_TXN0 29
DPB_TXP1 29DPB_TXN1 29
DPB_TXN2 29DPB_TXP2 29
DPB_TXP3 29
DPB_AUX 29DPB_AUX# 29
DPB_TXN3 29
CRT_HSYNC 19CRT_VSYNC 19
CRT_DDC_DATA 19CRT_DDC_CLK 19
DAC_RED 19
PEG_CLKREQ# 14
DPD_TXP0 20DPD_TXN0 20
DPD_TXP1 20DPD_TXN1 20
DPD_TXN2 20DPD_TXP2 20
DPD_TXP3 20DPD_TXN3 20
DPD_AUX 20DPD_AUX# 20
DPA_HPD20
SML1DAT_MXM 14SML1CLK_MXM 14
DPA_C_AUX- 20
DPA_C_AUX+ 20
DDC1_EN20
DPB_HPD29
DPC_HPD29
H_THERMTRIP#_U1 4THERM_SCI# 4,16
VCCP_EN 11,34,40
ENABLT20
MXM_VGA_POK 34
CLK_PEG_VGA_PCH14CLK_PEG_VGA_PCH#14
PCIE_CRX_GTX_P145PCIE_CRX_GTX_N145
PCIE_CRX_GTX_N155PCIE_CRX_GTX_P155
PCIE_CRX_GTX_N105PCIE_CRX_GTX_P105
PCIE_CRX_GTX_N95PCIE_CRX_GTX_P95
PCIE_CRX_GTX_P125
PCIE_CRX_GTX_N115PCIE_CRX_GTX_P115
PCIE_CRX_GTX_P45
PCIE_CRX_GTX_P135PCIE_CRX_GTX_N135
PCIE_CRX_GTX_N125
PCIE_CRX_GTX_P55
PCIE_CRX_GTX_N45
PCIE_CRX_GTX_N75
PCIE_CRX_GTX_N65
PCIE_CRX_GTX_P85
PCIE_CRX_GTX_P75
PCIE_CRX_GTX_P65
PCIE_CRX_GTX_N85
PCIE_CRX_GTX_N55
PCIE_CTX_GRX_P4 5PCIE_CTX_GRX_N4 5
PCIE_CTX_GRX_N6 5PCIE_CTX_GRX_P6 5
PCIE_CTX_GRX_P5 5PCIE_CTX_GRX_N5 5
PCIE_CTX_GRX_P8 5PCIE_CTX_GRX_N8 5
PCIE_CTX_GRX_N7 5PCIE_CTX_GRX_P7 5
PCIE_CTX_GRX_P10 5
PCIE_CTX_GRX_P9 5PCIE_CTX_GRX_N9 5
PCIE_CTX_GRX_P12 5
PCIE_CTX_GRX_N11 5PCIE_CTX_GRX_P11 5
PCIE_CTX_GRX_N10 5
PCIE_CTX_GRX_P13 5
PCIE_CTX_GRX_N12 5
PCIE_CTX_GRX_N15 5
PCIE_CTX_GRX_P14 5PCIE_CTX_GRX_N14 5
PCIE_CTX_GRX_N13 5
PCIE_CTX_GRX_P15 5
PCIE_CRX_GTX_N15PCIE_CRX_GTX_P15
PCIE_CRX_GTX_P05PCIE_CRX_GTX_N05
PCIE_CRX_GTX_N25PCIE_CRX_GTX_P25
PCIE_CTX_GRX_P35PCIE_CTX_GRX_N35
PCIE_CTX_GRX_N0 5PCIE_CTX_GRX_P0 5
PCIE_CTX_GRX_P2 5
PCIE_CTX_GRX_N1 5PCIE_CTX_GRX_P1 5
PCIE_CTX_GRX_N2 5
PCIE_CRX_GTX_P3 5PCIE_CRX_GTX_N3 5
LVDS_BCLKP20LVDS_BCLKN20
LVDS_ACLKN 20LVDS_ACLKP 20
LVDS_B2P20LVDS_B2N20
LVDS_B1N20
LVDS_B0N20
LVDS_B1P20
LVDS_B0P20
LVDS_A2N 20
LVDS_A1P 20
LVDS_A2P 20
LVDS_A0P 20
LVDS_A1N 20
LVDS_A0N 20
ADP_PRES31,35,38,44
DPD_HPD 20
B+ +3VS +5VS
B+B+
+3VS
+3VS
+3VS
+5VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
MXM-III CONN
21 48Tuesday, July 28, 2009
2005/03/10 2006/03/10Compal Electronics, Inc.
Layout Note:Place as close as to MXM connector
Reverse. 01/19
M/N DP
Docking
DockingDream Color Panel
Remove R387. 02/04
Change R387, R391, R393, and R394 to 10K. 11/11
Add FET near PCH for isolation. 11/11
Nvidia: No need 10K,so change to 0 ohm.11/15
Nvidia: NCpin277. 11/15
Change value from 10K to 2.2K. 3/6
Add to support DP/DVI dual mode. 11/24
Remove R393 because duplicate to other page. 12/02
Remove R395 andR364. 11/30
Place close to JDOCK1. 11/30
Place close to JMXM1. 11/30
Modify net. 12/02
Add R357. 12/05
NI R387, because have PR120 PU to +3VL. 12/05
Add PU. 12/08
Remove Q19 & R376. 2/24
Reserve D15 & D38. 12/08
Layout Note: DPB_HPD and DPC_HPD mustnot routed close to high speedsignals.
Change R394 to NI and install R381 & R382. 12/08
Modify. 12/08
Change R322 to 2.2K. 3/6
Change to dummy. 12/22
Reverse. 01/19Remove R287. 02/04
Install Q69. 2/24
NI R390 & R392. 3/6
Add D41. 3/6
Add R265 close toQ20, Q67 gate pin.4/25
Remove C377. 7/10
C371220P_0402_50V7K@
1
2
C2650.1U_0402_16V4Z
1
2
R396 100K_0402_5%1 2
D38BAV99-7-F_SOT23-3 @
2
31
C37
2
0.1U
_060
3_50
V4Z
1
2
C379220P_0402_50V7K@
1
2
C
BE
Q70MMBT3906_SOT23-3
1
2
3
Q20B2N7002DW-T/R7_SOT363-6
3
5
4
C655 0.1U_0402_16V4Z1 2
T109PAD
C656 0.1U_0402_16V4Z1 2
R62 0_0402_5%1 2
R38847K_0402_5%
12
R381 4.7K_0402_5%1 2
C37
6
22U
_121
0_25
V6-M
1
2
C37
4
22U
_121
0_25
V6-M
1
2
Q67A2N7002DW-T/R7_SOT363-6
61
2
Q20A2N7002DW-T/R7_SOT363-6
61
2
R397 100K_0402_5%1 2
R357 10K_0603_5%1 2
R392 10K_0402_5%@12
R394 10K_0402_5%@1 2
R130 2.2K_0402_5%1 2
R518 10K_0402_5%1 2
R390 10K_0402_5%@12
L15 0_0603_5%1 2
G
D
S
Q692N7002_SOT23-3
2
13
D41BAV99-7-F_SOT23-3
231
R391 10K_0402_5%1 2
D14BAV99-7-F_SOT23-3
2
31
R382 4.7K_0402_5%1 2R383 10K_0402_5%1 2
R135100K_0402_5%
12
R219 0_0402_5%@1 2T110PAD
R386 0_0402_5%12
L17 0_0603_5%1 2
R380 10K_0603_5%1 2
Q67B2N7002DW-T/R7_SOT363-6
3
5
4
R1188.2K_0402_5%
12
R379 0_0402_5%12
C37
3
22U
_121
0_25
V6-M
1
2
R378 0_0402_5%1 2
D15BAV99-7-F_SOT23-3 @
2
31
R322 10K_0603_5%1 2
JMXM1A
FOX_AS0B826-S43B-4HCONN@
PWR_SRC1PWR_SRC3 PWR_SRC 2
PWR_SRC 4PWR_SRC 6PWR_SRC 8PWR_SRC 10PWR_SRC 12PWR_SRC 14
PWR_SRC5PWR_SRC7PWR_SRC9PWR_SRC11PWR_SRC13PWR_SRC15PWR_SRC17PWR_SRC19
PWR_SRC 16PWR_SRC 18PWR_SRC 20
GND21GND23GND25GND27GND29GND31GND33GND35GND37GND395V415V435V455V475V49GND51GND53GND55GND57PEX_STD_SW#59VGA_DISABLE#61PNL_PWR_EN63PNL_BL_EN65PNL_BL_PWM67HDMI_CEC69DVI_HPD71LVDS_DDC_DAT73LVDS_DDC_CLK75GND77OEM79OEM81OEM83OEM85GND87PEX_RX15#89PEX_RX1591GND93PEX_RX14#95PEX_RX1497GND99PEX_RX13#101PEX_RX13103GND105PEX_RX12#107PEX_RX12109GND111PEX_RX11#113PEX_RX11115GND117PEX_RX10#119PEX_RX10121GND123PEX_RX9#125PEX_RX9127GND129PEX_RX8#131PEX_RX8133GND135PEX_RX7#137PEX_RX7139GND141PEX_RX6#143PEX_RX6145GND147PEX_RX5#149PEX_RX5151GND153PEX_RX4#155PEX_RX4157
GND 22GND 24GND 26GND 28GND 30GND 32GND 34GND 36GND 38GND 40
PRSNT_R# 42WAKE# 44
PWR_GOOD 46PWR_EN 48
RSVD 50RSVD 52RSVD 54RSVD 56
PWR_LEVEL 58TH_OVERT# 60TH_ALERT# 62
TH_PWM 64GPIO0 66GPIO1 68GPIO2 70
SMB_DAT 72SMB_CLK 74
GND 76OEM 78OEM 80OEM 82OEM 84GND 86
PEX_TX15# 88PEX_TX15 90
GND 92PEX_TX14# 94
PEX_TX14 96GND 98
PEX_TX13# 100PEX_TX13 102
GND 104PEX_TX12# 106
PEX_TX12 108GND 110
PEX_TX11# 112PEX_TX11 114
GND 116PEX_TX10# 118
PEX_TX10 120GND 122
PEX_TX9# 124PEX_TX9 126
GND 128PEX_TX8# 130
PEX_TX8 132GND 134
PEX_TX7# 136PEX_TX7 138
GND 140PEX_TX6# 142
PEX_TX6 144GND 146
PEX_TX5# 148PEX_TX5 150
GND 152PEX_TX4# 154
PEX_TX4 156
R385 10K_0402_5%@12
JMXM1B
FOX_AS0B826-S43B-4H CONN@
GND158PEX_TX3#160PEX_TX3162GND164GND166PEX_RX2#168PEX_RX2170GND172PEX_RX1#174
GND 159PEX_RX3# 161
PEX_RX3 163GND 165GND 167
PEX_TX2# 169PEX_TX2 171
GND 173PEX_TX1# 175
PEX_TX1 177GND 179
PEX_TX0# 181PEX_TX0 183
GND 185PEX_CLK_REQ# 187
PEX_RST# 189VGA_DDC_DAT 191VGA_DDC_CLK 193
VGA_VSYNC 195VGA_HSYNC 197
GND 199VGA_RED 201
VGA_GREEN 203VGA_BLUE 205
GND 207LVDS_LCLK# 209
LVDS_LCLK 211GND 213
LVDS_LTX3# 215LVDS_LTX3 217
GND 219LVDS_LTX2# 221
LVDS_LTX2 223GND 225
LVDS_LTX1# 227LVDS_LTX1 229
GND 231LVDS_LTX0# 233LVDS_LTX0# 235
GND 237DP_D_L0# 239
DP_D_L0 241
PEX_RX1176GND178PEX_RX0#180PEX_RX0182GND184PEX_REFCLK#186PEX_REFCLK188GND190RSVD192RSVD194RSVD196RSVD198RSVD200LVDS_UCLK#202LVDS_UCLK204GND206LVDS_UTX3#208LVDS_UTX3210GND212LVDS_UTX2#214LVDS_UTX2216GND218LVDS_UTX1#220LVDS_UTX1222GND224LVDS_UTX0#226LVDS_UTX0228GND230DP_C_L0#232DP_C_L0234GND236DP_C_L1#238DP_C_L1240GND242 GND 243
DP_D_L1# 245DP_D_L1 247
GND 249DP_D_L2# 251
DP_D_L2 253GND 255
DP_D_L3# 257DP_D_L3 259
GND 261DP_D_AUX# 263
DP_D_AUX 265DP_C_HPD 267DP_D_HPD 269
RSVD 271RSVD 273RSVD 275RSVD 277
DP_B_L0# 279DP_B_L0 281
DP_C_L2#244DP_C_L2246GND248DP_C_L3#250DP_C_L3252GND254DP_C_AUX#256DP_C_AUX258RSVD260RSVD262RSVD264RSVD266RSVD268RSVD270RSVD272RSVD274RSVD276RSVD278RSVD280
GND 283DP_B_L1# 285
DP_B_L1 287GND 289
DP_B_L2# 291DP_B_L2 293
GND 295DP_B_L3# 297
DP_B_L3 299GND 301
DP_B_AUX# 303DP_B_AUX 305DP_B_HPD 307DP_A_HPD 309
3V3 3113V3 313
GND 315GND 317
RSVD282GND284DP_A_L0#286DP_A_L0288GND290DP_A_L1#292DP_A_L1294GND296DP_A_L2#298DP_A_L2300GND302DP_A_L3#304DP_A_L3306GND308DP_A_AUX#310DP_A_AUX312PRSNT_L#314GND316GND318
R384 0_0402_5%12
R129 2.2K_0402_5%1 2
C37
5
4.7U
_080
5_10
V4Z
1
2
R212 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_CTRL_10
XTAL1XTAL2
LAN_DIS#
PLT_RST#_LAN
PCIE_PRX_DTX_P6_CPCIE_PRX_DTX_N6_C
XTAL1
XTAL2
+3.3VM_LAN_OUT_R
+1.0VM_LAN4
+1.0VM_LAN3
+1.0VM_LAN2
LAN_JTAG_TMSLAN_JTAG_TCK
+3.3VM_LAN_OUTLAN_DIS#_R
TRM_CT
LAN_DIS#
LAN_MDI1N 23LAN_MDI1P 23
LAN_MDI2N 23LAN_MDI2P 23
LAN_MDI3N 23LAN_MDI3P 23
LAN_MDI0N 23LAN_MDI0P 23
LAN_DIS#16,23
PLT_RST#4,13,16,21,24,27,28,30
PCIE_PRX_DTX_P614PCIE_PRX_DTX_N614
PCIE_PTX_C_DRX_P614PCIE_PTX_C_DRX_N614
CLK_PCIE_LAN_PCH#16CLK_PCIE_LAN_PCH16
LAN_ACT#23,29LED_LINK_LAN#23
LED_LINK_LAN#_R16,23,31
CLK_PCIE_LAN_REQ#16
SML0CLK14SML0DATA14
CLK_PCIE_LAN_REQ#_R14
+1.0VM_LAN
+3VM_LAN
+1.0VM_LAN+3VM_LAN
+1.05V_LAN_M
+3VALW
+3VM +3VM_LAN
+3VM_LAN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Intel 82578 Hanksville-LM
22 48Tuesday, July 28, 2009
2008/09/15 2009/12/31Compal Electronics, Inc.
Update on 10/27.
Remove note. 0205
Remove C382, C383, C384, C385, C694, R401,R366, Q21 and R402 as not needed. 2/17
Remove R354, R355, Q22A, Q22B; andconnect SML0CLK and SML0DATA directly toLAN_SM_CLK and LAN_SM_DAT. 2/23
Add on 12/4.
Remove C388, C389, C390, & C393 on +1.0VM_LAN; Remove C394, C396& C397 on +3.3VM_LAN_OUT_R; Remove C399 & C400 on +1.0VM_LAN4;Remove C401 on +1.0VM_LAN3; and Remove C402 on +1.0VM_LAN2 asdone in Intel's RedFort CRB
NI R407. 5/11
Swap signals to U9.26&27. 02/23
Change R558 PU to +3VM_LAN. 5/11
Remove Q17, R124, and R405 (Intelconfirmed isolation not required forHanksville)
2/23
R414 0_0603_5%1 2
R285 0_0402_5%@1 2
T60PAD
R407 0_0402_5%@1 2
R419 0_0603_5%1 2
R413 0_0603_5%1 2
T61PAD
PCIE
MDI
SMBUS
JTAG
LED
U9
WG82577LM_QFN48P
RSVD_VCC3P3_1 1RSVD_VCC3P3_2 2
LAN_DISABLE_N3VDD3P3_OUT 4
VDD3P3_IN 5
VCT 6
CTRL_1P0 7
VDD1P0_8 8
XTAL_OUT9XTAL_IN10
VDD1P0_11 11
RBIAS12
MDI_PLUS0 13MDI_MINUS0 14
VDD3P3_15 15
VDD1P0_16 16
MDI_PLUS1 17MDI_MINUS1 18
VDD3P3_19 19
MDI_PLUS2 20MDI_MINUS2 21
VDD1P0_22 22
MDI_PLUS3 23MDI_MINUS3 24
LED225
LED026LED127
SMB_CLK28
VDD3P3_29 29
TEST_EN30
SMB_DATA31
JTAG_TDI32
JTAG_TMS33 JTAG_TDO34
JTAG_TCK35
PE_RST_N36
VDD1P0_37 37
PETp38PETn39
VDD1P0_40 40
PERp41PERn42
VDD1P0_43 43
PE_CLKP44PE_CLKN45
VDD1P0_46 46VDD1P0_47 47
CLK_REQ_N48
VSS_EPAD 49
R40610K_0402_5%
12
R319 3.01K_0402_1%1 2
C38
0 0.1U_0402_16V
4Z
1
2
R403 0_0603_5%1 2
R418 0_0603_5%1 2
R408 0_0402_5%1 2
Y525MHZ_20P_1BG25000CK1A
1 2
T107 PAD
R398 0_0603_5%1 2
C391 0.1U_0402_16V7K1 2
R415 10K_0402_5%@1 2
C40427P_0402_50V8J
1
2
R411 3.01K_0402_1%1 2C
387
10U_0805_6.3V
6M
1
2
C38
6
0.1U_0402_16V
4Z
1
2
R421 1K_0402_5%1 2
R416 0_0603_5%1 2
C40327P_0402_50V8J
1
2
C647 10P_0402_25V8K1 2
R558 10K_0402_5%1 2
C392 0.1U_0402_16V7K1 2
C395 1U_0402_6.3V4Z@1 2
R417 10K_0402_5%@1 2
R423 3.01K_0402_1%1 2
C398 1U_0603_10V4Z1 2
C38
1 10U_0805_10V
4Z
1
2
R412 0_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LED_LINK_LAN#
MDO1+
MDO1-
MDO0+
MDO0-
LAN_ACT# LAN_ACT_R#
MDO3-
MDO3+
MDO2-
MDO2+
LED_LINK_LAN_R#LED_LINK_LAN#
LED_LINK_LAN_R#
LAN_ACT_R#
MDO1+
MDO3-
MCT2
TRM_CT_R
MCT0
TRM_CT_R
MDO3+
TRM_CT_R
MDO2-
TRM_CT_R
MDO0-
MCT1
MCT3
MDO1-
MDO0+
MDO2+
LED_LINK_LAN_DOCK#29
LED_LINK_LAN#_R16,22,31
LAN_ACT#22,29
DOCK_ID29
LED_LINK_LAN#22
LAN_DIS# 16,22
MDO2- 29
LAN_MDI0N22
LAN_MDI3P22
MDO3- 29
MDO0- 29
MDO2+ 29
LAN_MDI0P22
MDO1+ 29
LAN_MDI2P22
LAN_MDI1N22
MDO1- 29
LAN_MDI2N22
LAN_MDI1P22
LAN_MDI3N22
MDO3+ 29
MDO0+ 29
+3VM_LAN_LED
+3VM_LAN
+3VM_LAN +3VM_LAN_LED
+3VM_LAN_LED
+3VM_LAN
+3VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Magnetic & RJ45
23 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Change on 12/17.Modify & remove Q63A & R132. 02/23
Change combo connector to RJ45 only. 2/16
20 mil
Note. Close to JLAN1
Modify. 0223
Add C264. 4/23
HF
Change. 5/16
Move R510 close to Q28, and PU to+3VALW. 5/19
C409 0.1U_0402_16V7K1 2
R424
10K_0402_5%
12
C412 0.1U_0402_16V7K1 2
R42775_0402_1%1 2
C416 680P_0402_50V7K@1 2
C417 0.1U_0402_16V7K1 2
C413 0.01U_0402_50V7K1 2
JLAN1
FOX_JM3611A-P1123-7HCCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED-12
Green LED+11
Yellow LED-14
Yellow LED+13
SHLD1 15
SHLD2 16
DETECT PIN1 9
DETCET PIN2 10
1:1
1:1
1:1
1:1
U11
NS892402 1GTCT11
TD1+2
TD1-3
TCT24
TD21+5
TD2-6
TCT37
TD3+8
TD3-9
TCT410
TD4+11
TD4-12 MX4- 13
MX3- 16
MCT3 18
MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
MX4+ 14
MCT4 15
MX3+ 17
C26
4
1U_0
603_
10V
4Z
1
2
R510 10K_0402_5%12
G
D
S
Q282N7002_SOT23-3
2
13
C418 0.01U_0402_50V7K1 2
C410 0.01U_0402_50V7K1 2
C411 680P_0402_50V7K@1 2
R426300_0603_5%
1 2
R138100K_0402_5%
12
R557
10K_0402_5%
12
C414 0.1U_0402_16V7K1 2
R42575_0402_1%1 2
R43175_0402_1%1 2
R430300_0603_5%
1 2
Q63B2N7002DW-T/R7_SOT363-6
3
5
4
C419 1000P_1808_3KV7K1 2
R42975_0402_1%1 2
D39PJSOT05C_SOT23-3@
231
R203 0_0402_5%1 2
G
DS
Q60FDN338P_SOT232
13
C415 0.01U_0402_50V7K1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
UIM_RST
UIM_PWR
UIM_CLKUIM_DATA
UIM_VPP
WW_LED#
TP_NV_VREF
TP_NV_DOS_0#
TP_NV_DOS_1#
TP_NV_RFU_1TP_NV_RFU_2TP_NV_RFU_3TP_NV_RFU_4
TP_NV_WP0#
TP_NV_CK_0#
TP_NV_CK_1#
PLT_RST#CLK_PCI_DEBUG
PCIE_C_RXP4PCIE_C_RXN4
WL_LED#
DEG_FRAME#DEBUG_AD3DEBUG_AD2DEBUG_AD1DEBUG_AD0PCI_RST#_R
PCI_RST#_R
DEG_FRAME#DEBUG_AD3
DEBUG_AD0
DEBUG_AD2DEBUG_AD1
UIM_PWR
UIM_CLK
UIM_PWRUIM_RST
UIM_DATAUIM_VPP
CLK_PCI_DEBUG
WWAN_TRANSMIT_OFF# 16
USB20_N9 16USB20_P9 16
WW_LED# 30
NV_DQ016NV_DQ116NV_DQ216NV_DQ316NV_DQ416NV_DQ516NV_DQ616NV_DQ716
NV_RE#_WR#116NV_RE#_WR#016
NV_CLE16
NV_ALE16
NV_DQ816NV_DQ916
NV_DQ1016
NV_DQ1216NV_DQ1116
NV_DQ1316NV_DQ1416NV_DQ1516
NV_DQS0 16
NV_DQS1 16
NV_RB# 16
NV_WE#_CK0 16
NV_WE#_CK1 16
NV_CE0# 16
NV_CE1# 16
NV_CE3# 16
LPC_LFRAME# 13,28,31,33
PCI_RST# 16,32
PCIE_WAKE#15,27,30
CLKREQ_WLAN#14
PCIE_PRX_DTX_N414PCIE_PRX_DTX_P414
PCIE_PTX_C_DRX_N414PCIE_PTX_C_DRX_P414
MC2_DISABLE31
PLT_RST# 4,13,16,21,22,27,28,30
WL_LED# 30
WLAN_TRANSMIT_OFF# 16
LPC_LAD3 13,28,31,33LPC_LAD2 13,28,31,33LPC_LAD1 13,28,31,33LPC_LAD0 13,28,31,33
MC1_DISABLE31
CLK_PCI_DEBUG_PCH 16
CL_RST#114
CL_CLK114CL_DATA114
CLK_PCIE_MCARD_PCH14CLK_PCIE_MCARD_PCH#14
NV_CE2# 16
NAND_DET#13
WWAN_DET# 16
+3V_WWAN
+3V_WWAN
+3V_WWAN
+3V_WWAN
+3VS
+1.8VS
+V_NVRAM_VCCQ+3.3V_NVRAM+3VS
+1.5VS
+1.5VS
+3V_WLAN
+3V_WLAN
+3V_WLAN
+3VALW
+3V_WLAN
+3VALW
+3VALW
+3V_WWAN
+3VS
+3V_WWAN
+3V_WWAN
+3VALW +3VALW
+3V_WWAN
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
WWAN/NAND mini
24 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
WWAN WLAN
Remove UWB. (10/24)
NAND FLASH
(USB Only)
Reserved 10/27.
Removed R439 connect to U3. 10/27
Swap. 12/22
Change net name. 5/11
Remove PLT_RST# onJWWAN1.22. 2/24
Change from GND to +3VALW. 12/09
Change to 0805. 2/24
Close to JWWAN1 pin2 and pin52.
Remove R441 of pin5. 2/10
Disconnection. 2/10
Remove USB20_P6 and USB20_N6connections to JWLAN1.36 and 38.2/10
2A
HF HF
Add. 7/7
Install. 4/25
Remove C499~C452,and change C448 to22uF. 4/27
Remove C444~C447,and change C443 to150uF. 4/27
NI. 7/7 NI. 7/7
JWLAN1
MOLEX_67910-5700CONN@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
GND153 GND2 54
D18DAN217T146_SC59-3@
2
31
C706
4.7U_0805_25V
6-K
@
1
2
T72PAD
R45047K_0402_5%@
12
JWWAN1
FOXCONN AS0B226-S40N-7F 52PCONN@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
GND153 GND2 54
C426
0.01U_0402_16V
7K
1
2
C605
0.1U_0402_16V4Z
1
2
T98 PAD
R455 0_0603_5%12
T71PAD
C709
47P_0402_50V
8J
@1
2
C432
18P_0402_50V
8J
@
1
2
T62 PAD
C422
4.7U_0805_10V
4Z
1
2
T74PAD
R434 0_0402_5%1 2
R44810K_0402_5%@
12
T75PAD
C420
0.01U_0402_16V
7K
1
2
T64 PAD
R131 10K_0402_5%1 2
JNAND1FOX_AS0B726-N2SN-7F CONN@
VC
C_1
1V
CC
_22
VC
C_3
3V
CC
_440
VC
C_5
41V
CC
_642
VC
CQ
_138
VC
CQ
_239
VC
CQ
_378
RFU_1 15RFU_2 16RFU_3 63RFU_4 64
CE_0# 24
VSS_13 44
DQ06DQ17DQ245DQ346DQ412DQ513DQ651DQ752DQ828DQ929DQ1067DQ1168DQ1234DQ1335DQ1473DQ1574
DOS_0# 9DOS_0 10
DOS_1# 31DOS_1 32
CE_2# 25CE_1# 22CE_3# 61CE_4# 4CE_6# 43CE_5# 37CE_7# 76
CK_0# 48CK_0/WE_0# 49
CK_1# 70CK_1/WE_1# 71
R/B# 54WP# 55
VREF 77
CLE_018CLE_157ALE_019ALE_158
W/R_1#/RE_1#60W/R_0#/RE_0#21
VSS_15VSS_28VSS_311VSS_414VSS_517VSS_620VSS_723VSS_826VSS_927VSS_1030VSS_1133VSS_1236
VSS_14 47VSS_15 50VSS_16 53VSS_17 56VSS_18 59VSS_19 62VSS_20 65VSS_21 66VSS_22 69VSS_23 72VSS_24 75
U12
S DIO(BR) NUP4301MR6T1 TSOP-6@
CH11
Vn2
CH23 CH3 4
Vp 5
CH4 6
R444 0_0402_5%1 2
R454 0_0603_5%@12
C425
4.7U_0805_10V
4Z
1
2
T63 PAD
T68PAD
R452
220K_0402_1%1 2
R446 0_0402_5%12
JSIM1
SANTA_135306-3CONN@
VCC 1RST 2CLK 3
GND4VPP5I/O6
GND 8GND 9
DET7
D17 CH751H-40PT_SOD323-22 1
Q27SI2305DS-T1-E3_SOT23-3
2
31
D16
CH751H-40PT_SOD323-22 1
R442 10K_0402_5%1 2
Q26SI2305DS-T1-E3_SOT23-3
2
31
T69PAD
R432 0_0402_5%1 2
R443 0_0402_5%1 2
R44910K_0402_5%@
12
R453 0_0603_5%12
C429
39P_0402_50V
8J@
1
2
C708
47P_0402_50V
8J
@1
2
C424
0.1U_0402_16V
4Z
1
2
T99 PAD
R435 0_0402_5%1 2
T66PAD
R451
220K_0402_1%1 2
C421
0.1U_0402_16V
4Z
1
2
T70PAD
R447 0_0402_5%12
C427
0.1U_0402_16V
4Z
1
2
R132 0_0402_5% @1 2
C423
0.01U_0402_16V
7K
1
2
T67PAD
R437 0_0402_5%1 2
T73PAD
C431
39P_0402_50V
8J@
1
2
C430
39P_0402_50V
8J@
1
2
+ C44
3
150U
_B2_
6.3V
M_R
35M1
2
C606
0.1U_0402_16V4Z @
1
2
R445 0_0402_5%12
C433
4.7U_0805_10V
4Z
1
2
C434
0.1U_0402_16V
4Z
1
2
T65 PAD
C44
8
22U
_080
5_6.
3V6M
1
2
C707
4.7U_0805_25V
6-K
@
1
2
C428
4.7U_0805_10V
4Z
1
2
R433 0_0805_5%@1 2
R436 0_0402_5%1 2
R438 0_0402_5%1 2
R440 0_0402_5%1 2
ON/OFF#
KSI[0..7]
KSO[0..13]
KSI0
KSI1
KSI5
KSI3
KSI4
KSI2
KSI_D_0
KSI_D_8
KSI_D_9
KSI_D_1
KSI_D_2 KSI_D_5
KSI_D_10
KSI_D_11
KSI_D_3
KSI_D_13
KSI_D_12
KSI_D_4
KSI6KSI_D_14
KSI_D_6
TP_DATATP_CLK
KSI_D_4KSI_D_0
KSI_D_1KSI_D_2
KSI_D_12KSI_D_8KSI_D_14
KSI_D_10
KSO12KSO9KSI_D_9KSI_D_11
KSI_D_6KSI_D_5
KSI_D_13KSI7
KSO1KSO10KSO6KSO7
KSO11
KSO5
KSO0KSO2
KSO4KSO8KSO3KSI_D_3
KSO13
KSI_D_12
KSO12
KSI_D_6
KSO4
KSI_D_4
KSI_D_8
KSO9
KSI_D_5
KSO8
KSI_D_14
KSI_D_9
KSO1
KSO3
KSO11
KSO5
KSI_D_11
KSO10
KSI_D_3
KSO0
KSI_D_0
KSO2
KSI_D_13
KSO6
KSI_D_1
KSI_D_10
KSO13
KSI7
KSO7
KSI_D_2
KSI_D_12
KSO12
KSI_D_6
KSO4
KSI_D_4
KSI_D_8
KSO9
KSI_D_5
KSO8
KSI_D_14
KSI_D_9
KSO1
KSO3
KSO11
KSO5
KSI_D_11
KSO10
KSI_D_3
KSO0
KSI_D_0
KSO2
KSI_D_13
KSO6
KSI_D_1
KSI_D_10
KSO13
KSI7
KSO7
KSI_D_2
CAP_DAT
CAP_RST_EC
CAP_CLK
STB_LED#
WL/BT_LED#
CAP_SENS_INT
ON/OFF#LID_SW#
HDA_SDIN1_MDC
CAP_RST_ECWL/BT_LED#
CAP_CLK CAP_DAT
CAP_SENS_INT STB_LED#
ON/OFF# LID_SW#
LID_SW#
LEFTRIGHT
CAP_RST_EC31
CAP_CLK14,31CAP_DAT14,31
CAP_SENS_INT31
STB_LED#29,30
ON/OFFBTN_KBC# 31
ON/OFFBTN# 15
WL/BT_LED#30
KSO[0..13]31
KSI[0..7]31
ON/OFF#29LID_SW#14,20,31
HDA_SDOUT_MDC13
HDA_SYNC_MDC13HDA_SDIN113
HDA_BIT_CLK_MDC 13
TP_CLK31TP_DATA31
HDA_RST#_MDC13
SP_CLK31SP_DATA 31
PWRBTN_OUT# 31
+3VALW
+3VL +3VL+3VL
+3VS
+3VL +3VS +3VL
+5VS
+5VS
+3VL +3VL
+3VS
+5VS
+5VS
+3VS+3VL
+3VL
+5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
MDC/KBD/ON_OFF/LID
25 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
CAP SWITCH BOARD.
MDC 1.5 Conn.
Power button
INT_KBD CONN.
Track Point CONN. Touch Pad CONN.
Modify circuit to correct theconnection. 4/22
Remove modem disable GPIO and U13. ConnectHDA_RST#_MDC to JMDC1.11. 2/10
Add R216. 7/7
Add on 7/21
R464
10K_0402_5%
12
C4631U_0603_10V4Z
1
2
CP4
100P_1206_8P4C_50V8K@
234 5
6781
R467100K_0402_5%
12
U14SN74LVC1G14DCKR_SC70-5
NC
1
A2
G3
Y 4
V5
C455
1000P_0402_50V7K
1
2
R462
5.1K_0402_5%
12
JSW1
ACES_50611-0120N-001CONN@
11335577991111131315151717191921212323
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 24
C456
0.1U_0402_16V
4Z
1
2
CP6
100P_1206_8P4C_50V8K@
234 5
6781
C4600.1U_0402_16V4Z
1
2JTO1
ACES_87153-08011CONN@
8 877 6 655 4 433 2 211
G19G311 G2 10
G4 12
R468
100K_0402_5%
12
R465 33_0402_5%1 2
D54 PJUSB208_SOT23-6@
I/O11
REF12
I/O23 I/O3 4
REF2 5
I/O4 6
D24
CHP202UPT_SOT323-3
2
31
CP1
100P_1206_8P4C_50V8K @
234 5
6781
R21
6
100K
_040
2_5%
12
R470 100K_0402_5%@1 2
R463
5.1K_0402_5%
12
C4621U_0603_10V4Z
1
2
C457
4.7U_0805_10V
4Z
@
1
2
CP3
100P_1206_8P4C_50V8K @
234 5
6781
C60
8
0.1U
_040
2_16
V4Z
@
1
2
C60
7
1000
P_0
402_
50V7
K@
1
2
JKB1
HRS_FH12HP-30S-1SV 55 CONN@
60 605959 58 585757 56 565555 54 545353 52 525151 50 504949 48 484747 46 464545 44 444343 42 424141 40 403939 38 383737 36 363535 34 343333 32 323131 30 302929 28 282727 26 262525 24 242323 22 222121 20 201919 18 181717 16 161515 14 141313 12 121111 10 1099 8 877 6 655 4 42 21133
G161G363 G2 62
G4 64
JMDC1
ACES_88020-12101CONN@
11335577991111
2 24 46 68 8
10 1012 12
GND13GND14GND15
GND 16GND 17GND 18
D20
CHP202UPT_SOT323-3
2
31
D23
CHP202UPT_SOT323-3
2
31
R466 0_0402_5%1 2
CP7
100P_1206_8P4C_50V8K@
234 5
6781
G
D
S
Q292N7002_SOT23-3
2
13
D21
CHP202UPT_SOT323-3
2
31
D22
CHP202UPT_SOT323-3
2
31
CP5
100P_1206_8P4C_50V8K@
234 5
6781
R469 100K_0402_5%1 2
D25
CHP202UPT_SOT323-3
2
31
D53PJUSB208_SOT23-6@
I/O11
REF12
I/O23 I/O3 4
REF2 5
I/O4 6
D26
CHP202UPT_SOT323-3
2
31
C461
0.1U
_040
2_16
V4Z
1
2
CP2
100P_1206_8P4C_50V8K @
234 5
6781
JTP1
ACES_50611-0040N-001CONN@
77553311 2 24 46 68 8
C454 10P_0402_25V8K@1 2
C453100P_0402_50V8J@
1 2
D27PACDN042Y3R_SOT23-3@
2 31
R758 0_0402_5%1 2
D28
CH751H-40PT_SOD323-2@
21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_P8_RUSB20_N8_R
USB20_P1USB20_N1
USB20_P116USB20_N116
BT_LED 30USB20_N8 16USB20_P8 16
BT_OFF16
ACCEL_INT#16
SMB_CLK_S34,9,10,12,14SMB_DATA_S34,9,10,12,14
SLP_S419,27,35
+3VAUX_BT+3VALW
+3VAUX_BT
+3VS_ACL
+3VS_ACL_IO+3VS_ACL
+3VS_ACL
+3VS +3VS_ACL
+3VS_ACL
+3VS_ACL_IO
+3VAUX_BT
+5VALW +5VALW +USB_VCCA
+USB_VCCA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
USB & BT Connector & Acclerometer
26 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
BT Connector
ACCELEROMETER
L Must be placed in the center of the system.
Add on 11/11.
Add on 11/15.Change connectionfrom port0. 0204
Low Active
(2A,100mils ,Via NO.=4)
W=100mils
G
DS
Q30
AP2301GN 1P_SOT232
13
R47310K_0402_5%
12
G
D
S
Q422N7002_SOT23-3@
2
13
R471 0_0402_5%1 2
U15
G548A2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
C474
0.1U_0402_16V
4Z
1
2
R47410K_0402_5%
12
R500470_0402_5%@
12
+
C465
150U_B
2_6.3VM
_R35M
1
2
D30CH751H-40PT_SOD323-22 1
JBT1
ACES_87212-05G0_5PCONN@
12345
LIS302DLU17
HP302DLTR8_LGA14_3X5
VDD_IO1GND 2
RSVD 3
GND 4GND 5
VDD6
CS7
INT 18INT 29 GND 10
RSVD 11
SDO12SDA / SDI / SDO13SCL / SPC14
R479 10K_0402_5%12
C475
10U_0805_6.3V
6M
1
2
C237
0.1U_0402_16V
4Z1
2
C466
0.1U_0402_16V
4Z
1
2
D31
CM1293A-02SR_SOT143-4@GND 1
IO1 2
PWR4
IO23
JUSBL1
SUYIN_020167GR004S568ZRCONN@
11223344GND5GND6GND7GND8
C467
1000P_0402_50V7K
1
2
C469
10U_0805_10V
4Z
1
2
C468
0.1U_0402_16V
4Z
1
2
R4780_0603_5%
1 2
R475
220K_0402_1%
1 2
R472 0_0402_5%1 2
C464
4.7U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U3TXDP2
U3TXDN2
U3TXDP1
U3TXDN1
SPISCK
SPICSB
SPISI
U3TX_C_DP2PCIE_PRX_DTX_C_P8
PPON1
SPISCK
PPON2
U3TX_C_DN2
USB3XO
U2DN2
SPISO
SPISOSPISI
U3TX_C_DP1
OCI2B
PCIE_PRX_DTX_C_N8
OCI1B
U2DP1
U2DN1U3TX_C_DN1
SPICSB
CLKREQ#_USB30
CLKREQ#_USB30
PSEL
PSEL
USB3XI
SLP_S4
SLP_S4
U3RXDP2
U3RXDP1
U3RXDN1
U3RXDN2
U2DP2
U2DN2
U2DP2
U2DN1
U2DP1
U3RXDP2
U3RXDN2
U3TXDP2
U3TXDN2
U3RXDP2
U3RXDN2
U3TXDP2
U3TXDN2
U3RXDN1
U3RXDP1
U3TXDP1
U3TXDN1
U3RXDP1
U3RXDN1
U3TXDP1
U3TXDN1
PCIE_PRX_DTX_N814PCIE_PRX_DTX_P814
PCIE_PTX_C_DRX_N814PCIE_PTX_C_DRX_P814
CLK_PCIE_USB30_PCH14CLK_PCIE_USB30_PCH#14
PLT_RST#4,13,16,21,22,24,28,30
PEG_B_CLKREQ#14
PCIE_WAKE#15,24,30
SLP_S419,26,35
CLK_48M_USB3_PCH14
PCH_XDP_GPIO013,16
+3VA
+USB3_VCCA
+3VS
+USB3_VCCB
+3VS
+3VS
+3VS
+3VA+3VS
+1.05VS+1.05VSR
+3VS
+3VS
+3VS
+USB3_VCCA
+5VALW +5VALW
+1.05VSR
+3VS
+USB3_VCCB
+5VALW +5VALW
+3VS
+3VA+3VA
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
USB3.0 ConnectorsCustom
27 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Add on 7/7.
Add on 11/24.
Change to use 48MHz from DB2. 3/3
W=100mils
(2A,100mils ,Via NO.=4)
Low Active
W=100mils
(2A,100mils ,Via NO.=4)
Low Active
Install. 3/3
Layout note:keep the R369 & R371 as close to the traces of USB3XI& USB3XO to keep the stub length at the minimum.
CSEL=0 : 24MHz XTAL; CSEL=1: 48MHz Clock
Change power rail to 3.3V.
Close to U41.D7 Close to U41.P13
Del R226, R227, R458, R459. 5/11
Del D57~D60, but change D55. 5/14
CorrectJUSB3A/B. 05/11
Layout note:
2. +1.05VS --> 700mA
1. +3VS --> 100mA
Add D57 for USB2.0. 5/16
Reserve D58 forUSB3.0. 7/15
C638 0.1U_0402_16V4Z12
C658
10U_0805_10V
4Z
1
2
C629
0.1U_0402_16V
4Z
1
2
C645
12P_0402_50V8J@1
2
C635
0.1U_0402_16V
4Z
1
2
R688 100K_0402_1%1 2
U41UPD720200F1-XXX-A_FBGA176
GN
DC
12G
ND
C13
GN
DD
3G
ND
D4
GN
DD
11G
ND
D12
GN
DD
13G
ND
D14
GN
DE
1G
ND
E2
GN
DE
13G
ND
E14
GN
DG
1G
ND
G2
GN
DG
6G
ND
G7
GN
DG
8
GN
DG
13
GN
DG
11
GN
DH
6
GN
DG
12
GN
DG
9
GN
DF4
GN
DF6
GN
DF7
GN
DF8
GN
DF9
GN
DF1
1G
ND
F12
GN
DH
7G
ND
H8
GN
DH
9G
ND
H12
GN
DJ3
GN
DJ4
GN
DJ6
GN
DJ7
GN
DJ8
GN
DJ9
GN
DJ1
1G
ND
J12
GN
DK
3G
ND
K4
GN
DL1
GN
DL2
GN
DL3
GN
DL4
GNDA1GNDA2GNDA3GNDA4GNDA5GNDA7GNDA9GNDA11GNDA13GNDA14GNDB3GNDB4GNDB5GNDB7GNDB9GNDB11GNDB13GNDB14GNDC1GNDC2GNDC3GNDC10GNDC11
GND P14GND P11GND P9GND P7GND P2GND P1GND N13GND N9GND N7GND N3GND M13GND M12GND M11GND M10GND M9GND M8GND M7GND M6GND M5GND M4GND M3GND L12GND L11GND L7GND L6
VD
D33
D10
VD
D33
F13
VD
D33
F14
VD
D33
F3V
DD
33G
3V
DD
33G
4
VD
D33
L9V
DD
33L1
0
VD
D33
L13
VD
D33
L14
VD
D33
N4
VD
D33
N5
VD
D33
N6
VD
D33
P3
VD
D10
C4
VD
D10
C5
VD
D10
C6
VD
D10
C7
VD
D10
D5
VD
D10
C8
VD
D10
C9
VD
D10
D8
VD
D10
D9
VD
D10
E3
VD
D10
E4
VD
D10
E11
VD
D10
E12
VD
D10
H3
VD
D10
H4
VD
D10
L5
VD
D10
H11
VD
D10
K11
VD
D10
K12
VD
D10
L8
PECLKPB2PECLKNB1
PETXPD2PETXND1
PERXPF2PERXNF1
PERSTBH2PEWAKEBK1PECREQBK2
AUXDETJ2PSELJ1SMIBH1
PONRSTBP5
SPISCKM2SPISCBN2SPISIN1SPISOM1
GNDK13GNDK14GNDJ13GNDP4
GNDC14
XT1N14XT2M14
CSELP6
U3TXDP2 B6
U3TXDN2 A6U2DM2 N8
U3RXDN2 A8
U3RXDP2 B8U2DP2 P8
OCI2B G14OCI1B H13
PPON2 H14PPON1 J14
U2DM1 N10
U2DP1 P10U3RXDP1 B12
U3RXDN1 A12
RREF P12U2AVSS N12
U2PVSS N11
U3AVSS D6
U3TXDN1 A10
U3TXDP1 B10
U3A
VD
O33
D7
U2A
VD
D10
P13
C639 0.1U_0402_16V4Z12
G
D S
Q252N7002_SOT23-3@2
1 3
8
D58
RCLAMP0524P.TCT~D@
4
5
1
6
2
7
3
10
9
C407
10U_0805_10V
4Z
1
2
JUSB3B
TYCO_1932260-1CONN@
SSTX-8
SSTX+9
GND 10GND 11GND 12GND 13
VBUS1
D-2
D+3
GND4SSRX-5
SSRX+6
GND7
+
C471
150U_B
2_6.3VM
_R35M
1
2
C438 0.1U_0402_16V4Z@12
R220 0_0603_5%1 2
C621
0.01U_0402_16V
7K
1
2
C659
0.1U_0402_16V
4Z
1
2
C651
0.1U_0402_16V4Z1
2
C625
0.01U_0402_16V
7K
1
2
C619
0.01U_0402_16V
7K
1
2
D57
PJDLC05_SOT23-3@
2
31
C64
3
1U_0
805_
25V
6K
12
C644
12P_0402_50V8J@1
2
R692 1.6K_0603_1%1 2
R37
10_
0402
_5%
12
X2
24MHZ_20PF_1BX24000BK1A~D@
1 2
C624
0.01U_0402_16V
7K
1
2 C650
5P_0402_50V
8C1
2
C634
5P_0402_50V
8C
1
2
C631
0.1U_0402_16V
4Z
1
2 C632
0.1U_0402_16V
4Z
1
2
C627
0.01U_0402_16V
7K
1
2
C620
0.01U_0402_16V
7K
1
2
R689 10K_0402_5%1 2
C630
0.1U_0402_16V
4Z
1
2
D40 1SS355_SOD323-21 2
+
C406
150U_B
2_6.3VM
_R35M
1
2
C637 0.1U_0402_16V4Z12
R70010K_0402_5%
12
C636
0.01U_0402_16V
7K
1
2
C641 0.1U_0402_16V4Z12
R696
47K_0402_5%
12
R693 100_0402_5%@
12
R221 0_0603_5%1 2
JUSB3A
TYCO_1932260-1CONN@
SSTX-8
SSTX+9
GND 10GND 11GND 12GND 13
VBUS1
D-2
D+3
GND4SSRX-5
SSRX+6
GND7
C642 0.1U_0402_16V4Z12
U40
AT25F512AN-10SU-2.7_SO8~D
CS#1SO2WP#3GND4
VCC 8HOLD# 7
SCK 6SI 5
R699
10K_0402_5%
12
U42
G548A2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
R321 0_0402_5%@1 2
C473
1000P_0402_50V7K
1
2
R697
10K_0402_5%
12
D56
PJDLC05_SOT23-3@
2
31
C470
4.7U_0805_10V4Z
1
2
C660
1000P_0402_50V7K
1
2
C626
0.01U_0402_16V
7K
1
2
C618
0.01U_0402_16V
7K
1
2
C617
0.1U_0402_16V
4Z
1
2
C657
4.7U_0805_10V4Z
1
2
R53
60_
0402
_5%
12 R
537
0_04
02_5
%
@
12
C65
2
10U
_080
5_10
V4Z
1
2
C628
0.01U_0402_16V
7K
1
2
R690 10K_0402_5%1 2
R428
0_06
03_5
%
12
R691 10K_0402_5%12
C437 0.1U_0402_16V4Z@12
C622
0.01U_0402_16V
7K
1
2
C640 0.1U_0402_16V4Z12
U16
G548A2P8U_MSOP8
GND1IN2
OC# 5OUT 6
OUT 8
IN3EN#4
OUT 7
L1310UH_LB2012T100MR_20%_0805
1 2
C472
0.1U_0402_16V
4Z
1
2
R72310K_0402_5%
12
R47710K_0402_5%
12
R918 10K_0402_5%@1 2
R310 0_0402_5%1 2
8
D55
RCLAMP0524P.TCT~D@
4
5
1
6
2
7
3
10
9
C623
0.01U_0402_16V
7K
1
2
R3690_0402_5%
12
C633
0.01U_0402_16V
7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPM_XTALO
TPM_XTALI
TPM_XTALI
TPM_XTALO
TPM_GPIO2TPM_GPIO
SPI_HOLD#_0SPI_SO_JPSPI_SI_JP
USB20_P10USB20_N10
LPC_LAD0
LPC_LFRAME#
LPC_LAD2LPC_LAD1
SIRQ
LPC_LAD3
8051_RECOVER#
SPI_CLK_JPSPI_CS0#_JP
SIRQ
SPI_WP#
SPI_SO_RSPI_SI
SPI_CS0#
SPI_CLK
SPI_WP#
SPI_HOLD#_1
SPI_HOLD#_0SPI_HOLD#_1
SPI_CLK_JPSPI_CLK
SPI_SI_JPSPI_SI
SPI_CS0# SPI_CS0#_JP
USB20_N10 PLT_RST#SUS_STAT#
SPI_SO_R SPI_SO_JP
CLK_PCI_TPM_PCH
CLK_PCI_TPM_PCH
SUS_STAT#
SPI_HOLD#_1 SPI_CLKSPI_SI
SPI_WP#SPI_SO_R
SPI_CLK
SPI_CS0#
USB20_P10
USB20_N1016USB20_P1016
FPR_OFF16
SPI_CS0#31
LPC_LFRAME#13,24,31,33SIRQ13,31,32,33
PLT_RST#4,13,16,21,22,24,27,30
LPC_LAD013,24,31,33LPC_LAD113,24,31,33LPC_LAD213,24,31,33LPC_LAD313,24,31,33
PM_CLKRUN#15,31,32,33
SPI_CLK31
SPI_SI31
8051RX318051TX31
CLK_PCI_TPM_PCH16
PCI_SERR#16,31,32
8051_RECOVER#31DEBUG_KBCRST39
CLK_PCI_DB_PCH16
SUS_STAT#15,32,33
SPI_CS1#31
SPI_SO 31
+3VS
+3VS
+3VS+3VS
+3VALW
Vin_Debug
+3VL
+3VALW
+3VL
+3VL
+3VL
+5VALW
+USB20_N1_PWR
+USB20_N1_PWR
+3VL
+3VL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
TCG/BIOS ROM/PS2/SW LPC DEBUG
28 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
TPM1.2 on board
0 = 02Eh1 = 04Eh*
Base I/O Address
Finger printer
LPC Debug Port
20mils
20mils
20mils
BIOS ROM(8MB)SPI ROM Socket
SPI ROM
SPI ROM Socket
SPI ROM
Reserve for 8M rom not ready 12/02.
Removed R500, R501 connect to U3. 10/27
Removed R490 connect to U3. 10/27
Add & Change. 11/11
Connect pin3 &23. 11/11
Add on 11/11.
Add on 11/15.
Add R6. 4/23
Modify. 12/05
Change R481 to noinstall. 11/30
Change net name. 11/30
Have internal PD,del R489. 11/30
Colay 16 pins SPI ROM
Change from B+.1209
5mA 25mA
EMI request close toU19/34. 12/11
Install on DB2.
C477
0.1U_0402_16V
4Z
1
2
&U1
SST25VF032B-66_SO845@
C480
0.1U_0402_16V
4Z
1
2
T77PAD
JFP1
ACES_50611-0040N-001CONN@7 75 53 31 122
446688
JDBG1
ACES_50238-02471-001CONN@
LPC_PCI_CLK2
LPC_FRAME#4
LPC_RESET#6
LPC_AD08
LPC_AD210
VCC_3VA12
CAPS_LED#14
VCC1_PWRGD16
SPI_CS#18
SPI_SO20
RSV22
RSV24
GND26
GND1
GND3
+3VS5
+3VS7
LPC_AD19
LPC_AD311
PWR_LED#13
NUM_LED#15
SPI_CLK17
SPI_SI19
SPI_HOLD#21
RSV23
GND25
C48410P_0402_50V8K@
1 2
R499 0_0402_5%1 2
C238
0.1U_0402_16V
4Z
1
2
R488220K_0402_1%
1 2
R48310K_0402_5%
12
R509470_0402_5%@
12
D32
CM1293A-02SR_SOT143-4GND 1
IO1 2
PWR4
IO23
R145 0_0402_5%1 2
R497 0_0402_5%1 2
R481 10K_0402_5%@1 2
R4844.7K_0402_5%@
12
R496 0_0402_5%@1 2
C478
0.1U_0402_16V
4Z
1
2
T76PAD
R4824.7K_0402_5%
12
R502 0_0402_5%1 2
G
D
S
Q652N7002_SOT23-3@
2
13
Y6
32.768KHZ 1TJS125DJ4A420POUT 4
IN 1
NC3
NC2 R48010M_0402_5%
12
R485 10_0402_5%@1 2
R6 100K_0402_5%@1 2
U34
WIESO_G6179-07000002-00
1122334455667788
16 1615 1514 1413 1312 1211 1110 109 9
C481 22P_0402_50V8J1 2
U19
WIESO_G6179-100000_8P
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3R492100K_0402_5%
12
C476 22P_0402_50V8J1 2
G
DS
Q31AP2301GN 1P_SOT23
2
13
&U2
SST25VF032B-66_SO845@
C483
10U_0805_10V
4Z
1
2
R49433_0402_5%1 2
R495 3.3K_0402_5%1 2
C479
0.1U_0402_16V
4Z
1
2
C4850.1U_0402_16V4Z
1
2
R493 3.3K_0402_5%1 2
C705
47P
_040
2_50
V8J
@1
2
R486 0_0402_5%1 2
R503 0_0402_5%1 2
R498 0_0402_5%1 2
R4874.7K_0402_5%@
12
SLB 9635 T T 1.2
U18
SLB 9635 TT 1.2_TSSOP28
NC 1
GPIO2 2
NC 3
GN
D4
VS
B5
GPIO 6
PP7
TEST1 8TESTB1/BADD 9
VD
D10
GN
D11
NC 12
XTALI/32K IN13
XTALO14
CLKRUN#15
LRESET#16
LAD317
GN
D18
VD
D19
LAD220
LCLK21
LFRAME#22
LAD123 VD
D24
GN
D25
LAD026
SERIRQ27 LPCPD#28
C482
0.1U_0402_16V
4Z
1
2
DOCK_ID DOCK_ID DOCK_ID
R_DOCK_RED
R_DOCK_BLU
R_DOCK_GRN
DOCK_RED
DCAD
R_DOCK_RED
STB_LED#_R
DOCK_BLU
DCAD2
DETECT
R_DOCK_BLU
DETECT
DOCK_GRN
R_DOCK_GRN
DOCK_RED
DOCK_GRNDOCK_BLU
DOCK_RED
DOCK_BLUDOCK_GRN
DOCK_BLUDOCK_GRNDOCK_RED
DPB_DDC2DATADPC_DDC6CLKDPC_DDC6DATA
DOCK_ID
DPC_AUXDPC_AUX#
DPB_AUXDPB_AUX#
DPB_DDC2CLK
STB_LED#_R
DPB_HPD21SLP_S5#15
VGA_RED19 VGA_GRN19
BLUE_R 19RED_R 19
VGA_BLU19
GREEN_R 19
DPC_HPD 21ON/OFF# 25
ISO_PREP#16
DPB_TXN221
DPB_TXP121
DPB_AUX#21DPB_AUX21
DPC_TXP0 21
DPC_TXN2 21
DPC_TXP1 21
DPC_AUX# 21DPC_AUX 21
DPC_TXP3 21
DPC_TXP2 21
DPC_TXN0 21
DPC_TXN3 21
DPC_TXN1 21
DPB_TXP321
DPB_TXP221
DPB_TXN021
DPB_TXN321
DPB_TXN121
DCD#1 33RI#1 33DTR#1 33CTS#1 33RTS#1 33DSR#1 33
TXD1 33RXD1 33
LAN_ACT# 22,23
USB20_P11 16USB20_N11 16
DPB_TXP021
LPTACK#33LPTBUSY33
LPTPE33LPTSLCT33
LPD733LPD633LPD533LPD433LPD333LPD233LPD133LPD033
LPTSLCTIN#33LPTINIT#33
DockID1 16DockID0 16
LPTSTB#33LPTAFD#33LPTERR#33
D_DDCDATA 19D_DDCCLK 19D_VSYNC 19D_HSYNC 19
USB20_P1316USB20_N1316
SATA_PRX_DTX_N213SATA_PRX_DTX_P213
SATA_PTX_C_DRX_P213SATA_PTX_C_DRX_N213
DLINE_OUT_L 30DLINE_OUT_R 30
LINE_IN_SENSE 30PS2_CLK 31
LINE_OUT_SENSE 30
PS2_DATA 31
DOCK_LINE_IN_L 30DOCK_LINE_IN_R 30
KBD_DATA 31KBD_CLK 31
LED_LINK_LAN_DOCK# 23
DOCK_ID23
MDO0+ 23MDO0- 23
MDO1+ 23MDO1- 23
MDO2+23MDO2-23
MDO3+23MDO3-23
SATA_PRX_DTX_P513SATA_PRX_DTX_N513
SATA_PTX_C_DRX_N513SATA_PTX_C_DRX_P513
STB_LED#25,30
SATA_LED#13,30
+5VS
VIN
ADP_SIGNAL
+3VS +3VS +3VS
VA
VA +5VS+5VS
+5VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
DOCK CONNCustom
29 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
IN
H
L
NC<-->COM
OFF
ON
12A
ON
OFF
NO<-->COM
(2) PS/2 Interfaces(2) USB 2.channels (2) SATA Channels (2) Display Port Channels(1) Serial Port(1) Parallel Port(1) Line In(1) Line Out(1) RJ45 (10/100/1000)(1) VGA(1) 2 LAN indicator LED's(1) Power Button(1) I2C interface
RGB Q-Switch
DOCKING CONNECTOR (190 pins) Place close to R506 ~ R508. 11/11
Change net name from DOCK_HPS#. 11/11
Correct to swap them. 4/23
SATA port4 chage to port5.
EMI request. 11/24
Remove C512, C513, C514, C515, R117 & R118, they willplace at dock side. 11/30
Add on 12/10.
Change to GND. 12/04
Add on 12/10.
SATA port3 chage to port2. 2/10
Change. 0223
Add. 0224Add. 0224
Remove R514~R517. 2/26
Remove C496 ~ C511, because putthem to docking side. 2/17
Add. 4/25
Disconnect SER_SHD. 4/25
L18
HCB2012KF-121T50_08051 2
R736 0_0402_5%1 2
R508 0_0402_5%1 2
C494
0.1U_0402_16V
4Z
1
2
C490
0.1U_0603_50V
4Z
1
2
JDOCK1A
FOX_QL0094L-D26601-8HCONN@
P1190 G1 189
1 12 23 34 45 56 67 7
8 89 9
10 1011 1112 1213 1314 1415 1516 1617 1718 1819 1920 2021 2122 2223 2324 2425 2526 2627 2728 2829 2930 3031 3132 3233 3334 3435 3536 3637 3738 3839 3940 4041 4142 4243 4344 4445 45144144 145145 146146 147147 148148 149149 150150 151151 152152 153153 154154 155155 156156 157157 158158 159159 160160 161161 162162 163163 164164 165165 166166 167167 168168 169169 170170 171171 172172 173173 174174 175175 176176 177177 178178 179179 180180 181181
182182 183183 184184 185185 186186 187187 188188
R507 0_0402_5%1 2
T88PAD
R5051K_0402_5%
12
R6710K_0402_5%
12
R737 0_0402_5%1 2
C521 0.1U_0402_16V4Z12
U22
TS5A3157_SC70-6
NO1
GND2
NC3 COM 4
VCC 5
IN 6
U20
TS5A3157_SC70-6
NO1
GND2
NC3 COM 4
VCC 5
IN 6
R520 150_0402_1%@12
R504 1K_0402_5%12
T87 PAD
C517 0.1U_0402_10V6K@1 2C516 0.1U_0402_10V6K@1 2
C491
0.1U_0402_16V
4Z
1
2
C492
10U_0805_10V
4Z
1
2
C493
0.1U_0402_16V
4Z
1
2
T85PAD
G
D
S
Q712N7002_SOT23-3
2
13
R739 0_0402_5%1 2
C489
0.1U_0603_50V
4Z
1
2
C519 0.1U_0402_16V4Z12
C486 0.1U_0402_16V4Z@1 2
T111PAD
C495
0.1U_0402_16V
4Z
1
2
D42PJSOT24C_SOT23@
2 31
U21
TS5A3157_SC70-6
NO1
GND2
NC3 COM 4
VCC 5
IN 6
C487 0.1U_0402_16V4Z@1 2
L1
HCB2012KF-121T50_08051 2
R522 150_0402_1%@12C488 0.1U_0402_16V4Z@1 2
T84 PAD
C520 0.1U_0402_16V4Z12
R738 0_0402_5%1 2
C518 0.1U_0402_10V6K@1 2
JDOCK1B
FOX_QL0094L-D26601-8HCONN@
48 4849 4950 5051 5152 5253 5354 5455 5556 5657 5758 5859 5960 6061 6162 6263 6364 6465 6566 6667 6768 6869 6970 7071 7172 7273 7374 7475 7576 7677 7778 7879 7980 8081 8182 8283 8384 8485 8586 8687 8788 8889 8990 9091 9192 9293 9394 949595 9696 9797 9898 9999 100100 101101 102102 103103 104104 105105 106106 107107 108108 109109 110110 111111 112112 113113 114114 115115 116116 117117 118118 119119 120120 121121 122122 123123 124124 125125 126126 127127 128128 129129 130130 131131 132132 133133 134134 135135 136136 137137 138138 139139 140140 141141 47 4746 46143143
142142
G1 191G3 193G5 195G7 197
G2192G4194G6196G8198
G9 199G10200
R506 0_0402_5%1 2
R521 150_0402_1%@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT_LED
BT_LED
WL_LED
WL/BT_LED#
WL_LED
STB_LED#WL/BT_LED#
PLT_RST#CPPE#
AQUAWHITE_BATLED#
PLT_RST#WL/BT_LED#
WL/BT_LED#
CPPE#
BT_LED26
WL/BT_LED# 25STB_LED# 25,29HDD_HALTLED 13SATA_LED# 13,29AQUAWHITE_BATLED# 31AMBER_BATLED# 31
MUTE_LED_CNTL 31HDA_SPKR 13
SD_MMC_MS_XDC_D032SD_MMC_MS_XDC_D132SD_MMC_MS_XDC_D232SD_MMC_MS_XDC_D332
PLT_RST#4,13,16,21,22,24,27,28PCIE_WAKE#15,24,27
MMC_XDC_D432MMC_XDC_D532
SLP_S3#15,31,34,35,38,40,41
MMC_XDC_D632MMC_XDC_D732
XDCLE32XDALE32
LINE_IN_SENSE29 LINE_OUT_SENSE 29
DOCK_LINE_IN_L29DOCK_LINE_IN_R29 DLINE_OUT_R 29
DLINE_OUT_L 29
HDA_BIT_CLK_CODEC13HDA_SYNC_CODEC13
HDA_SDOUT_CODEC13HDA_RST#_CODEC13
HDA_SDIN013
CLK_PCIE_EXP_PCH#14CLK_PCIE_EXP_PCH14
SDPWR0_MMC_MS_XDPWR 32SDPWR1_XDWP# 32SD_MMCCMD_MSBS_XDWE# 32SD_MMC_MSCLK_XDRE# 32
SDCD#_MMCCD#_XDCD0# 32MS_XDC1D# 32XDCE# 32SDWP#_XDR/B# 32
PCIE_PTX_C_DRX_N2 14
PCIE_PRX_DTX_P2 14
PCIE_PTX_C_DRX_P2 14PCIE_PRX_DTX_N2 14
USB20_N4 16USB20_P4 16
AQUAWHITE_BATLED 13
WL_LED#24
WW_LED#24
USB_OC#713,16
+3VS
+3VS
+3VS
+3VL +3VALW +5VS +3VS +1.5VS
+3VS+1.5VS
+3VALW+5VS+3VS
+3VS
+3VL+3VALW
+5VALW
A_SD# 31
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
CR&LEDS&PW&Audio&Exp ConnCustom
30 48Tuesday, July 28, 2009
2008/09/01 2010/09/01Compal Electronics, Inc.
Power Button Connector
Audio/Express/LEDs/Card Read Connector
Change CLKREQ_EXP# to CPPE# and connect to GPIO14. 7/21
Removed Power button JPB1 & C522, combin withJSWITCH1. 11/10
Change net name from DOCK_HPS#. 11/11
Add on 7/21.
Change R734 & R735 to NI. 02/06
Add for debuging. 3/3
HF
HF
Add 1 pin for +1.5VS. 4/29
Change net name from A_SD. 5/04Change net name from EAPD. 5/04
Add on 5/11.
C52
7
0.1U
_040
2_16
V4Z
1
2
C52
6
0.1U
_040
2_16
V4Z
1
2
C52
3
0.1U
_040
2_16
V4Z
1
2
R3541K_0402_5%
12
C52
5
0.1U
_040
2_16
V4Z
1
2
10K
47KQ32
DTA114YKAT146_SOT23-3@
2
13
R759 0_0402_5%1 2
R525 100K_0402_5%1 2
R458 0_0402_5%1 2
JEXP1
ACES_50026-07071-001CONN@
11 2 233 4 455 6 677 8 899 10 10
12 121111131315151717191921212323252527272929
14 1416 1618 1820 2022 2224 2426 2628 2830 30
31313333353537373939414143434545474749495151535355555757595961616363656567676969
32 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 5254 5456 5658 5860 6062 6264 6466 6668 6870 70
G171 G2 72
R73510K_0402_5%@
12
R73
4
330K
_040
2_5%
@
12
10K
47K
Q33DTA114YKAT146_SOT23-3@
2
13
D50LTST-S110TBKT-5A
21
R456 0_0402_5%1 2
R52347K_0402_5%
12
R524 100K_0402_5%1 2
Q9A2N7002DW-T/R7_SOT363-6
61
2
G
D
S
Q66
2N7002_SOT23-32
13
Q9B2N7002DW-T/R7_SOT363-6
3
5
4
C52
4
0.1U
_040
2_16
V4Z
1
2
KSI6
KSI4KSI5
KSI7
AB1B_DATA
AB1A_CLK
AB1B_CLKAB1A_DATA
CRACK_BGA
PDG_IN
KSI2
KSI0
PS2_CLKSP_DATASP_CLK
PS2_DATA
KSO[0..13]
KSI[0..7]
ADP_EN
KBC_PWR_ON
PM_RSMRST#
KSI3KSI2
KSI1KSI0
KBRST#
BATCON
VCC1_PWRGDTP_CLKTP_DATA
KBD_DATAKBD_CLK
LATCH
FET_A
FET_B
ADP_EN
KSI3
KSI1
8051TX
CR Y1
SP_CLK
KSI1
KSO1
AB2A_CLK
KSI7
KSO10
PDG_IN
CRACK_BGA
KSI4
KSO3
PM_RSMRST#
KSI6KSI5
KBD_DATA
AQUAWHITE_BATLED#
KSO9KSO8
KSO5
FET_A
VCC1_PWRGD
AB2A_DATA
KBC_PWR_ON
LATCH
FET_B
AB1B_DATA
KBD_CLK
KSO13
32K_CLK
AB1A_DATA
SP_DATA
TP_DATATP_CLK
KSI2
KSI0
KSO11
KSO2
KSO0
AB1B_CLK
KSO6
AB1A_CLK
KBRST#
TEST
KSO7
CR Y2
KSO12
PWRBTN_OUT#
PS2_DATAPS2_CLK
KSI3
RUNSCI_EC#
KSO4
ADP_DET#
AQUAWHITE_BATLED#
ADP_EN
PDG_IN
PWRBTN_OUT#
LPC_LAD313,24,28,33LPC_LAD213,24,28,33LPC_LAD113,24,28,33LPC_LAD013,24,28,33
LPC_LFRAME#13,24,28,33NPCI_RST#16,33
KSI[0..7]25
SIRQ13,28,32,33PM_CLKRUN#15,28,32,33
RUNSCI_EC#16
TP_CLK25TP_DATA25
KSO[0..13]25
KBC_SPI_SO13
SPI_SI28KBC_SPI_SI_R13
SPI_CS0#28KBC_SPI_CS0#_R13
SPI_SO28
SPI_CLK28
MUTE_LED_CNTL 30AC_PRESENT 15
KB_RST# 16
KBC_PWR_ON 39AQUAWHITE_BATLED# 30
BAT_PWM_OUT 38CHGCTRL 38
PM_RSMRST# 15CRACK_BGA 18
CAP_DAT 14,25CAP_CLK 14,25CELLS 38
THM_MAIN# 36GATEA20 16
ADP_PRES 21,35,38,44
CAP_SENS_INT 25
PM_PWROK 43ADP_EN 44
PWR_GD 4,11,13,34
AMBER_BATLED# 30
CAP_RST_EC 25LID_SW# 14,20,25
FAN_PWM 4
KBD_DATA 29KBD_CLK 29
KBC_SPI_CLK_R13
AB1A_CLK 36AB1A_DATA 36
AB1B_DATA 36AB1B_CLK 36
MC2_DISABLE24
MC1_DISABLE24
THM_TRAVEL# 36
PCI_SERR# 16,28,32
8051RX 288051TX 28
KBC_SPI_CS1#_R13
PS2_CLK29PS2_DATA29
LATCH 37
OCP 44
BAT_ALARM37
VCC1_PWRGD 39,44
ON/OFFBTN_KBC# 25
FET_A 37
8051_RECOVER# 28
CLK_PCI_KBC_PCH16
PM_SLP_M# 15,34,35SUS_PWR_ACK 15
SP_CLK25
SLP_S3# 15,30,34,35,38,40,41
SP_DATA25
AC_ADP_PRES 38
FET_B 37
SPI_CS1#28
A_SD# 30ADP_DET# 44
PDG_IN 15
ADP_A_ID 44
PMC38OCP_A_IN44
ADP_ID_CHK 44
LED_LINK_LAN#_R 16,22,23
PWRBTN_OUT# 25
+5VS
+3VL
+3VL
+3VS
+RTCVCC
+VCC0
+VCC0
+3VL
+3VS+3VL
+3VL
+3VL
A_GND
A_GND
A_GND
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
KBC1098
31 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Removed R548, R549 connectto U3. 10/27
R526 R528 R529 R530System Board ID Detect
KSI1 & 3 swap. 11/20
EMI: 12/11Add R144.
Change design on 2/17.
Leave TP. 2/23
X X
X
X
MV
ID
X
XDB1
DB2
DBx
SI1
SI2
SIx
PV
PVx
N/A
N/A
N/A
N/A
X
X
Change from 10K. 5/11
Remove R587 PD. 4/25
Add R755 and connectGPIO24 to D228.2. 7/19
Change net name from EAPD. 5/04
Add R136, C388. 5/04
Add. 5/04
Add. 5/04
X X
X: mean install
XX
C388
2200P_0402_50V7K1
2
R539 0_0402_5%1 2
R545 10K_0402_5%1 2
R1370_0402_5%
12
C529
0.1U_0402_16V
4Z
1
2
R544 10K_0402_5%1 2
R5270_0402_5%
12
R144 0_0402_5%1 2
R540 0_0402_5%1 2
C38
922
00P
_040
2_50
V7K 1
2
R538 10K_0402_5% @1 2
T89 PAD
U4474LVC1G02GW_SOT353-5
B 1
A 2
P5
G3
O4
RP25
10K_0804_8P4R_5%
1 82 73 64 5
R572 0_0402_5%1 2
R128 47K_0402_5%1 2
R566 100K_0402_5%1 2
C538
0.1U_0402_16V
4Z
1
2
R547 10K_0402_5%1 2
R755 0_0402_5%@1 2
R535 10K_0402_5%1 2
R560 1K_0402_5%1 2General Purpose I/O InterfaceK
eyboard/Mouse Interface
LPCBus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1098-NU_TQFP-128P
U23
KBC1098-NU_TQFP128_14X14
AG
ND
72
KSO021KSO120KSO219KSO318KSO417KSO516KSO613KSO712KSO810KSO99KSO108KSO117KSO12/GPIO00/KBRST6KSO13/GPIO185
KSI029KSI128KSI227KSI326KSI425KSI524KSI623KSI722
IMCLK35IMDAT36KCLK61KDAT62EMCLK66EMDAT67
CLKRUN#55SER_IRQ57PCI_CLK54EC_SCI#76
LAD[3]51LAD[2]50LAD[1]48LAD[0]46
LFRAME#52LRESET#53
AV
SS
45
XTAL170XTAL271
VC
C1
14
TEST PIN 69
VS
S11
VS
S37
VS
S47
VS
S56
VS
S10
4V
SS
82V
SS
117
VC
C1
39V
CC
158
VC
C1
84V
CC
110
6
VC
C1
119
VC
C2
49
OUT0/(SCI) 124OUT1/IRQ8# 125
CFETA/OUT7/nSMI 123OUT8/KBRST 122OUT9/PWM2 121
OUT10/PWM0 120PWM_CHRGCTL 118
GPIO02 79GPIO03 80
GPIO04/KSO14 81GPIO05/KSO15 83
GPIO07/PWM3 85GPIO08/RXD 86GPIO09/TXD 87
GPIO11/AB2A_DATA 88GPIO12/AB2A_CLK 89
GPIO13/AB2B_DATA 90GPIO14/AB2B_CLK 91
GPIO15/FAN_TACH1 92GPIO16/FAN_TACH2 101
GPIO17/A20M 102
GPIO20/PS2CLK 103GPIO21/PS2DAT 105
AB1A_DATA 111AB1A_CLK 112
AB1B_DATA 109AB1B_CLK 110
GPIO25 73
GPIO01 107
GPIO26/KSO17 108NC_CLOCKI 59
32KHZ_OUT/GPIO22/WK_SE01 75RESET_OUT#/GPIO06 60
PWRGD 78VCC1_RST# 77
ADC_TO_PWM_OUT/GPIO19 38
GPIO24/KSO16 4ADP_PRES[CKT#2]/GPIO27/WK_SE05 74
CFETB/GPIO10 116BAT_LED# 113
PWR_LED#/8051TX 115FDD_LED#/8051RX 114
Alarm [CKT#2]/GPIO361HSTCLK/GPIO412FLCLK3GPIO3930HSTCS1#/GPIO4231FLCS1#32GPIO3833GPIO3734ADC1/GPIO4643ADC_TO_PWM_IN44
AVCC 40GPIO35 63GPIO34 64Q/GPIO33 65ADC2/GPIO40 42AC[CKT#2]/GPIO23 41
HSTDATAIN/GPIO4394 FLDATAIN95 HSTCS0#/GPIO4496 FLCS0#97 HSTDATAOUT/GPIO45127 FLDATAOUT128 CAP 15
GPIO28 93GPIO29 98GPIO30 99GPIO31 100GPIO32 126
VCC068
R541 100K_0402_5%1 2
C528
0.1U_0402_16V
4Z
1
2
Q10A2N7002DW-T/R7_SOT363-6
6 1
2
R529 0_0402_5%1 2
RP22
10K_0804_8P4R_5%
1 82 73 64 5
R919 100K_0402_5%1 2
Q10B2N7002DW-T/R7_SOT363-6
3
5
4
C533
0.1U_0402_16V
4Z
1
2
R528 0_0402_5%1 2R526 0_0402_5%@1 2
R542 0_0402_5%1 2
RP234.7K_0804_8P4R_5%
1 82 73 64 5
C534 4.7U_0805_10V4Z1 2
R533 100K_0402_5%1 2
R555 0_0402_5%1 2
C531
0.1U_0402_16V
4Z
1
2
C537
1U_0603_10V
4Z
1
2
C535
33P_0402_50V
8J
1
2
R15047K_0402_5%@
12
R556 220_0402_5%1 2
D33CH751H-40PT_SOD323-2
21
R149 300_0402_5%1 2
R136 300_0402_5%1 2
R552 0_0402_5%1 2
R531 10K_0402_5%@1 2
C532
4.7U_0805_10V
4Z
1
2
RP21
10K_0804_8P4R_5%
1 82 73 64 5
Y7
32.7
68K
HZ
1TJS
125D
J4A
420P
OU
T4
IN1
NC
3
NC
2
C39
322
00P
_040
2_50
V7K 1
2
R139 300_0402_5%1 2
R5840_0402_5%
12
R543 0_0402_5%1 2
R532 10K_0402_5%@1 2
R530 0_0402_5%@1 2
C530
0.1U_0402_16V
4Z
1
2
RP24
10K_0804_8P4R_5%
1 82 73 64 5
C536
33P_0402_50V
8J
1
2
T108 PAD
R546 10K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IEEE1394_TPBP0
IEEE1394_TPAN0IEEE1394_TPAP0
IEEE1394_TPBN0
IEEE1394_TPBIAS0
R5C832XIR5C832XO UDIO4
SCVCC3EN#
+SC_PWR
SDCD#_MMCCD#_XDCD0#
SDPWR1_XDWP#
SDWP#_XDR/B#
MS_XDC1D#XDCE#
SDPWR0_MMC_MS_XDPWR
SD_MMC_MSCLK_XDRE#_RSD_MMC_MS_XDC_D0
SD_MMCCMD_MSBS_XDWE#
XDCLE
MMC_XDC_D4
4IN1_LED#TP_MSEXTCK
SC_DATA
SC_DATA
SC_RST
SC_CLK
PCI_AD28
PCI_AD31
PCI_AD21PCI_AD22
PCI_AD18
PCI_AD24
PCI_AD27
PCI_AD30
PCI_AD17
PCI_AD29
PCI_AD10
PCI_AD25PCI_AD26
PCI_AD23
PCI_AD20
PCI_AD12
PCI_AD4
PCI_AD14
PCI_AD1
PCI_AD9PCI_AD8
PCI_AD11
PCI_AD19
PCI_AD5
PCI_AD15PCI_AD16
PCI_AD7
PCI_AD0
PCI_AD6
PCI_AD2
PCI_AD13
CLK_PCI_1394
PCI_AD3
UDIO5
PCI_AD22 CBS_IDSEL
PCI_SERR#
SIRQTP_UDIO1
R5C832XI
TP_UDIO2
CBS_GRST#
UDIO5
CLK_PCI_1394
SCVCC5EN#
XDALE
R5C832XO
IEEE1394_TPAP0
IEEE1394_TPBN0IEEE1394_TPBP0IEEE1394_TPAN0
IEEE1394_TPBIAS0
SD_MMC_MS_XDC_D1
UDIO4UDIO3
SD_MMC_MS_XDC_D2
PCI_PAR
SD_MMC_MS_XDC_D3
PCI_FRAME#
PCI_STOP#PCI_DEVSEL#
PCI_TRDY#PCI_ IRDY#
SC_CD#
SC_RST
SC_CLKSC_DATA
PCI_PERR#
SCVCC3EN#
SCVCC5EN#
SC_RSTSC_CLK
SCSENSE
MMC_XDC_D5
UDIO3
MMC_XDC_D6MMC_XDC_D7
CBS_GRST#
SC_CD#
SCVCC3EN#
SIRQ 13,28,31,33
PCI_AD[0..31]16
PCI_CBE3#16PCI_CBE2#16PCI_CBE1#16PCI_CBE0#16
PCI_SERR#16,28,31
PCI_REQ2#16PCI_GNT2#16
PM_CLKRUN#15,28,31,33
CLK_PCI_139416
PCI_PIRQE#16PCI_PIRQG#16
PCI_RST#16,24
PCI_FRAME#16PCI_TRDY#16PCI_IRDY#16PCI_STOP#16
PCI_PAR16
PCI_DEVSEL#16
PCI_PERR#16
SD_MMC_MS_XDC_D0 30SD_MMC_MS_XDC_D1 30SD_MMC_MS_XDC_D2 30SD_MMC_MS_XDC_D3 30MMC_XDC_D4 30MMC_XDC_D5 30MMC_XDC_D6 30MMC_XDC_D7 30XDCLE 30XDALE 30
SDCD#_MMCCD#_XDCD0# 30MS_XDC1D# 30XDCE# 30SDWP#_XDR/B# 30SDPWR0_MMC_MS_XDPWR 30
SD_MMCCMD_MSBS_XDWE# 30
SDPWR1_XDWP# 30
SUS_STAT#15,28,33
PCI_PME#16
SD_MMC_MSCLK_XDRE# 30
+3VS
+3VS
+3VS_PHY
+SC_PWR
+3VS
+3VS
+SC_PWR
+SC_PWR
+3VS
+3VS
+3VS
+5VS
+SC_PWR
+3VS_PHY
+SC_PWR
+3VS
+3VS
+SC_PWR
+3VS
+5VS
+5VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
RICOH & Card ReaderCustom
32 48Tuesday, July 28, 2009
2008/03/13 2009/05/11Compal Electronics, Inc.
XDPWR
XDR/B#
XDLED#
XDWE#
XDCE#
XDRE#
Layout Note: Place close to R5C835and Shield GND.
MMCPWR0
MMCPWR1
SMART Card connector
Change on 11/14.
Change+3V_PHY to+3VS_PHY. 10/27
49mA
2.5mA
0.2mA10mA
25.6mA
2mA
Add on 12/02.
Layout Note: Add GND shield.
MMCDAT0
MMCDAT1
MMCDAT2
MMCDAT3
MMCDAT4
MMCDAT5
MMCDAT6
MMCDAT7
MDIOPIN NameMDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
SD CardPIN NameSDCD#
SDWP#
SDPWR0
SDPWR1
SDLED#
SDCCMD
MDIO09 SDCCLK
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
Layout Note: Add GND shield forSD_MMC_MSCLK_XDRE#.
Layout Note: Shield GND and place C564 and R600 close to U24.
SDCDAT0
SDCDAT1
SDCDAT2
SDCDAT3
MMC CardPIN Name
Layout Note: Place these cap close to U24.
Reserve them for testif any EMI issue
Layout Note: Shield GND forIEEE1394_TPA and TPB
Layout Note: Please them close to U14.
GND
GND
GND
Layout Note: Add GND shield for 1394.
SD,MMC,MS,XD muti-function pin define
Function set pin defineUDIO3 UDIO5UDIO4 Function
Pull-down Disable MS,xD Card,serial ROM
MMCCMD
MMCCLK
MMCCD#
Pull-down Pull-up
MMCLED#
MS CardPIN Name
MSCD#
MSPWR
Pull-downPull-upPull-up
MSLED#
MSEXTCK
MSCDAT0
MSCDAT1
Enable serial EEPROM
Pull-up
MSCDAT2
MSCDAT3
MSBS
MSCCLK
Pull-upPull-up Ensable MS,xD Card,disable serial ROM
XD CardPIN Name
XDCDAT0
XDCDAT1
XDCDAT2
XDCDAT3
XDCDAT4
XDCDAT5
XDCDAT6
XDCDAT7
XDCLE
XDALE
XDCD0#
XDCD1#
XDWP#
Change value. 2/6
Add on 12/02.
Layout Note: Place these cap close to U24.
Layout Note: Place these cap close to U24.
Remove R591and C558 keepR731 and C661,becauseduplicated.12/05
add GND shield Layout Note:
Add. 2/25
Change. 4/24
Add. 3/02
Add. 3/7
HFHF
HF
R36
6
10K_
0402
_5%
12
C565 12P_0402_50V8J1 2
R364 100K_0402_5%1 2
R597 0_0402_5%1 2
R612
56.2_0402_1%
12
J13941
SUYIN_020204FR004S506ZLCONN@
XTPB0-1XTPB0+2XTPA0-3XTPA0+4GND15GND26GND37GND48
C547
0.1U_0402_16V4Z
1
2
C542
0.01U_0402_16V7K
1
2
R159
0_0402_5%12
C569
0.01U_0402_16V7K
1
2C
5460.01U
_0402_16V7K
1
2
R611
56.2_0402_1%
12
C541
0.01U_0402_16V7K
1
2
D45 1SS355_SOD323-21 2
C555
0.01U_0402_16V7K
1
2
R605
56.2_0402_1%
12
C554
16P_0603_50V8
1 2
R610 0_0402_5%1 2
R225 15K_0402_5%1 2
C557
4.7P_0402_50V8C
@
1
2
S
G
D Q36AP2301GN_SOT23-3
2
3 1
R606
56.2_0402_1%
12
R224 15K_0402_5%1 2
C57
2
0.1U
_060
3_50
V4Z
1
2
C570
0.01U_0402_16V7K
@
1
2
R59810K_0402_5%
12
R604
5.1K_0402_1%
12
R733 33_0402_5%12
C601
1000P_0402_25V8J
1
2
R5C835
U24
R5C835-TQFP128P_TQFP128_14X14
AD31121AD30122AD29123AD28124AD27125AD26126AD25127AD241AD234AD225AD217AD209AD1910AD1812AD1713AD1614AD1527AD1428AD1329AD1230AD1131AD1032AD934AD836AD739AD640AD541AD442AD343AD244AD145AD046
VCC_PCI3V 6VCC_PCI3V 23
VCC_RIN 92
VCC_ROUT 11VCC_ROUT 33
VCC_3V 79
VCC_MD3V 54
AVCC_PHY3V 97AVCC_PHY3V 104AVCC_PHY3V 108
TPBIAS0 110
MDIO00 70
MDIO03 68MDIO04 67MDIO05 66MDIO06 65MDIO07 64
MDIO10 58MDIO11 57MDIO12 56MDIO13 55
VREF 99REXT 100
MDIO08 62MDIO09 60
MDIO01 69MDIO02 63
MDIO14 53MDIO15 52MDIO16 51MDIO17 50MDIO18 49MDIO19 48
C/BE3#2C/BE2#15C/BE1#26C/BE0#37
PAR25FRAME#16TRDY#18IRDY#17STOP#21DEVSEL#19IDSEL3PERR#22SERR#24
TEST81 HWSPND#77
INTA#112INTB#113
PCICLK117PCIRST#116GBRST#82CLKRUN#114PME#78
REQ#120GNT#119
AGND109 AGND105
GND 8GND 20GND 35GND 47
UDIO0/SRIRQ# 76UDIO1 75UDIO2 74UDIO3 73UDIO4 72UDIO5 71
XI 95XO 96
AGND101 AGND98
GND 61GND 80GND 93GND 94
GND 128
VCC_PCI3V 118VCC_PCI3V 38
VCC_ROUT 91VCC_ROUT 59
VCC_ROUT 111
VCC_SC 90
TPAP0 107TPAN0 106
TPBP0 103TPBN0 102
GND 115
SCVCC5EN# 83SCVCC3EN# 84
SCCLK88 SCRST89
SCIO87SCCD#86SCSENSE85
L19MBK2012601YZF_2P
1 2
C562
0.01U_0402_16V7K
1
2
C543
0.01U_0402_16V7K
1
2
C566 12P_0402_50V8J1 2
C553
0.47U_0603_16V4Z
1
2
C38
3
0.1U
_060
3_50
V4Z
@
1
2
R609 0_0402_5%1 2
C556
10U_0805_10V4Z
1
2
T80PADR599 15K_0402_5%1 2
R731
100K_0402_1%
12
R593 10K_0402_5%1 2
C38
40.
1U_0
603_
50V4
Z
1
2
C568
270P_0402_50V7K
1
2
C544
10U_0805_10V4Z
1
2
C549
10U_0805_10V4Z
1
2
C551
0.01U_0402_16V7K
1
2
R730 0_0402_5%@1 2
R608 0_0402_5%1 2
S
G
D
Q17AP2301GN_SOT23-3
2
3 1
C567 12P_0402_50V8J1 2
C552
0.47U_0603_16V4Z
1
2
X124.576MHz_16P_3XG-24576-43E1
12
R607 0_0402_5%1 2
D44 1SS355_SOD323-21 2
T79PAD
R601 10K_0402_5%1 2
R600
10K_0603_1%
12
R603 100K_0402_5%1 2
C548
0.01U_0402_16V7K
1
2
G
D
S
Q192N7002_SOT23-3
2
13
T81PADC
561
10U_0805_6.3V6M
1
2
C571
0.33U_0603_16V4Z
1
2
R590
10_0402_5%
@12
C564
0.01U_0402_16V7K
1
2
C560
10U_0805_10V4Z
1
2
JSC1
E-T_6900-Q10N-00RCONN@
1 1223 3445 5667 7889 91010
11 11121213 13141415 15161617 17181819 192020
R592 100_0402_5%1 2
R602 10K_0402_5%1 2
R732 0_0402_5%@1 2
R594 10K_0402_5%1 2
C540
0.01U_0402_16V7K
1
2
R595 10K_0402_5%@1 2
D43 1SS355_SOD323-21 2
C661
1U_0603_10V4Z X5R
1
2
C38
50.
1U_0
603_
50V4
Z1
2
C559
0.01U_0402_16V7K
1
2
C545
16P_0603_50V8
1 2
S
G
D
Q35AP2301GN_SOT23-3
2
31
R15
8
10K_
0402
_5%1
2
C550
0.01U_0402_16V7K
1
2
R596 10K_0402_5%1 2
C563
0.01U_0402_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_SIO_PCH
LPTERR#
LPTINIT#LPTAFD#
CLK_14M_SIO_PCH
LPTPELPTBUSYLPTACK#LPTSLCTIN#
LPD5LPD4LPD3LPD2
LPTSLCT
LPD1LPD0LPTSTB#
LPD7LPD6
RI#1CTS#1DSR#1DCD#1
SIO_GPIO41SIO_GPIO42SIO_GPIO43SIO_GPIO44SIO_GPIO45SIO_GPIO46SIO_GPIO47
SIO_GPIO23
SIO_GPIO10
CLK_14M_SIO_PCH
SIO_PME#LPD0LPD1LPD2LPD3LPD4LPD5LPD6LPD7
SYSOPT
CLK_PCI_SIO_PCH
SIO_GPIO12
LPTBUSY
LPTSLCT
LPTACK#LPTERR#
LPTPE
LPTSTB#LPTAFD#
LPTINIT#LPTSLCTIN#
CTS#1
RI#1
RTS#1
TXD1
DCD#1
RXD1
DSR#1
DTR#1
SIO_GPIO46SIO_GPIO45
SIO_GPIO43SIO_GPIO44
SIO_GPIO12SIO_GPIO10
SIO_IRQ
RXD1
SYSOPT
SIO_GPIO42
SIO_GPIO41
SIO_GPIO23
SIO_IRQ
SIO_GPIO47
CLK_14M_SIO_PCH14
LPC_LAD113,24,28,31
LPC_LFRAME#13,24,28,31
LPC_LAD013,24,28,31
LPC_LAD213,24,28,31LPC_LAD313,24,28,31
LPC_LDRQ#013
SIRQ13,28,31,32
PM_CLKRUN#15,28,31,32CLK_PCI_SIO_PCH16
LPD5 29LPD6 29
LPD4 29LPD3 29
LPD7 29
LPD0 29
LPD2 29LPD1 29
LPTBUSY 29LPTPE 29LPTSLCT 29
LPTERR# 29LPTACK# 29
LPTINIT# 29
LPTAFD# 29LPTSTB# 29
LPTSLCTIN# 29
NPCI_RST#16,31DTR#1 29
DCD#1 29
CTS#1 29
TXD1 29DSR#1 29RTS#1 29
RXD1 29
RI#1 29SUS_STAT#15,28,32
+3VS
+5VS+5VS_PRN
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
Super I/O LPC47N217Custom
33 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Base I/O Address0 = 02Eh1 = 04Eh*
Change to 4.7K. 3/3
Disconnect SER_SHD to dock,but add PD here. 4/25
Change SER_SHD to SIO_GPIO47. 5/04
C57
30.
1U_0
402_
10V
6K
1
2R622
10_0402_5%@
12
C57
50.
1U_0
402_
10V
6K
1
2
R549 10K_0402_5%12
R616 10K_0402_5%12
R7 10K_0402_5%12
RP29 4.7K_0804_8P4R_5%1 82 73 64 5
R615 1K_0402_5%1 2
C57
64.
7U_0
805_
10V
4Z
1
2R623
10_0402_5%@
12
R614 10K_0402_5%1 2
POWER
CLOCK
GPIO
LPC
I/F
SERI
AL I
/FPA
RALL
EL I/F
U25
LPC47N217N-ABZJ_QFN56_8X8
LAD09LAD111LAD212LAD313
LFRAME#14LDRQ#15
PCI_RESET#16LPCPD#17
CLKRUN#18PCI_CLK19SER_IRQ20IO_PME#6 INIT# 35
SLCTIN# 36PD0 37PD1 39PD2 40PD3 41PD4 42PD5 43PD6 44PD7 45
SLCT 47PE 48
BUSY 49ACK# 50
ERROR# 51ALF# 52
STROBE# 53
GPIO4121GPIO4222GPIO4324GPIO4425GPIO4526GPIO4627GPIO4728GPIO1029GPIO11/SYSOPT30GPIO12/IO_SMI#31GPIO13/IRQIN132GPIO14/IRQIN233GPIO2334
CLK148
VTR 7
VCC 23
VCC 46
EPAD57VCC 38
VCC 10
RXD1 54TXD1 55
DSR1# 56RTS1# 1CTS1# 2DTR1# 3
RI1# 4DCD1# 5
RP28 4.7K_0804_8P4R_5%1 82 73 64 5
D35
CH751H-40PT_SOD323-2
21
R548 10K_0402_5%12
RP26 4.7K_0804_8P4R_5%1 82 73 64 5
R621 4.7K_0402_5%1 2
C57818P_0402_50V8J@
1
2
RP27 4.7K_0804_8P4R_5%1 82 73 64 5
C57
40.
1U_0
402_
10V
6K
1
2
R613 10K_0402_5%12
C57910P_0402_25V8K@
1
2
RP30 4.7K_0804_8P4R_5%1 82 73 64 5
RP1010K_0804_8P4R_5%1 8
2 73 64 5
RP1110K_0804_8P4R_5%1 8
2 73 64 5
1.5V_POK
M_PWROK
2VREF_393
2VREF_393
PWR_GD_R
M_PWROK2VREF_393_1
2VREF_393
1.5V_POK42
SLP_S3#15,30,31,35,38,40,41
VCCP_EN 11,21,40
VCCP_POK40
VTTPWRGOOD 4
M_PWROK 15
MXM_VGA_POK21PWR_GD 4,11,13,31
1.05VM_LAN_POK42
PM_SLP_M#15,31,35
1.8VS_POK41
+5VALW
+0.75VS
+5VS
2VREF_51125
+3VS
+5VALW
+3VS
+3VALW
+5VALW
+3VALW
+3VM
+1.05VM
+5VALW
2VREF_51125
+1.05VS
+3VALW
+1.5VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
POK CKT
34 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
MDC STANDOFF
Around M/B
MXMWWAN STANDOFFWLAN STANDOFF
+3VL --> +3VALW. 12/08
Add for debuging. 3/3Removed R625 and 1.05VM_LAN_POK. 12/08
New add. 2/26
Change PM_SLP_LAN# to PM_SLP_M#. 2/24
Modify. 2/26
Change C513 from 0.047uF to 0.068uF. 7/22
H9HOLEA
1
R647 10K_0402_5%12
H24HOLEA
1
R649 14.7K_0402_1%1 2
R630 34.8K_0402_1%1 2
H21HOLEA
1
U28B
LM393DR_SO8
+5
-6 O 7
P8
G4
C5823300P_0402_25V7K
1
2
C5813300P_0402_25V7K
1
2
R64356.2K_0402_1%
12
R62610K_0402_5%
12
FM31
R6354.99K_0402_1%
12
R624 1M_0402_5%1 2
U27MC74AHC1G08DFT2G SC70 5P
IN11
IN22 G3
O 4
P5
H17HOLEA
1
FM21
R65186.6K_0402_1%
12
D47
CH751H-40PT_SOD323-2
2 1
H4HOLEA
1
H22HOLEA
1
U43MC74AHC1G08DFT2G SC70 5P
IN11
IN22 G3
O 4
P5
C5121000P_0402_50V7K
1
2
R513 1M_0402_5%1 2
R3531K_0402_5%
12
D46
1N4148WS-7-F_SOD323-2
1 2
R641 49.9K_0402_1%1 2
R634 3.3K_0402_5%1 2
R5121K_0402_5%
12
H7HOLEA
1
R636 1M_0402_5%1 2
R6402.49K_0402_1%
12
R629 10K_0402_5%1 2
R15561.9K_0402_1%~D
12
H2HOLEA
1
H10HOLEA
1
H3HOLEA
1
H12HOLEA
1
R646 3.3K_0402_5%1 2
H11HOLEA
1
D36
CH751H-40PT_SOD323-2
21
H14HOLEA
1
H18HOLEA
1
H15HOLEA
1
J1 SHORT PADS1 2
D37
CH751H-40PT_SOD323-2
21
H16HOLEA
1
R642 11.5K_0402_1%1 2
R519 41.2K_0402_1%1 2
FM41
H13HOLEA
1
R6453.3K_0402_5%
12
H19HOLEA
1
U26B
LM393DR_SO8
+5
-6 O 7
P8
G4
FM11
R511 71.5K_0402_1%1 2
R156 10K_0402_5%1 2 H8HOLEA
1
R637 3.3K_0402_5%1 2
C5801000P_0402_50V7K
1
2
R644 1M_0402_5%12
C3183300P_0402_25V7K
1
2
R638 16.2K_0603_1%1 2
C513 0.068U_0603_16V7K1 2
U26A
LM393DR_SO8
+3
-2 O 1
P8
G4
R650 3.3K_0402_5%1 2
ZZZ1
PCB-MB
R632 49.9K_0402_1%1 2
H23HOLEA
1
H20HOLEA
1
R639 10K_0402_5%1 2
H28HOLEA
1
H5HOLEA
1
R648 46.4K_0402_1%1 2
U28A
LM393DR_SO8
+3
-2 O 1
P8
G4
C5833300P_0402_50V7K
12
R157 1M_0402_5%1 2
H1HOLEA
1
H26HOLEA
1
R628 76.8K_0402_1%1 2
R631 11.5K_0402_1%1 2
H6HOLEA
1
D49LTST-S110TBKT-5A
21
R633 3.3K_0402_5%1 2
R627 3.3K_0402_5%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RUNON
SLP_S3
SLP_S3 SLP_S3SLP_S3
SLP_S3
RUNON
SLP_S3
RUNON
ADP_PRES
SLP_S4 SLP_S3
LAN_EN#
SLP_S4
RUNON
LAN_EN#
PM_SLP_M
PM_SLP_M#
PM_SLP_M
ADP_PRES
SLP_S3
PM_SLP_M
ADP_PRES21,31,38,44
SLP_S3#15,30,31,34,38,40,41SLP_S4#15,42
PM_SLP_LAN#15,42
PM_SLP_M#15,31,34
SLP_S419,26,27
RUNON 11
SLP_S311
+5VS+5VALW
+3VS +5VS
+3VS+3VALW
+1.05VS +1.5VS
+1.8VS
B++1.5VS+1.5V
+1.5V +0.75VS
+1.05VM +3VM
+3VL +3VL
+1.05VS+1.05V_LAN_M
+3VALW +3VM
+1.05V_LAN_M +1.05VM
B+
+3VL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
DC/DC Circuits
35 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Discharge circuit-1
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer +1.5V to +1.5VS Transfer
Discharge circuit-2 for V-M
+1.05VM_LAN to +1.05VM Transfer
+3VALW to +3VM Transfer
+1.05VM to +1.05VS Transfer
Add on 10/27.
Modify on 10/28.
Add on 5/14.
Change LAN_EN# to PM_SLP_M. 7/22
Change from +1.05VMP_LANto +1.05V_LAN_M. 11/11
Q39 be remove. 7/22
Reserve C320. 11/24
Reserve C405. 11/24
Change to 330uF. 12/03
Change to 330uF. 12/03
Install for DB1. 12/04
Install for DB1. 12/04Install for DB1. 12/04
Change from
+1.05VM_LAN.
12/09
HFHF
HF
HF
HF
Change to22ohm. 7/14
Chnage AC_PRESENTto ADP_PRES. 5/14
R677470_0402_5%
12
+
C320
330U
_X_2
VM_R
6M1
2
U30SI7326DN-T1-E3_PAK1212-8
352
4
1
G
D
SQ41
2N7002_SOT23-3
2
13
R370 820K_0402_5%12
R68022_0402_5%
12
U32SI7326DN-T1-E3_PAK1212-8
352
4
1
G
D
SQ49
2N7002_SOT23-3
2
13
C892
10U_0805_10V
4Z
1
2
C591
10U_0805_10V
4Z
1
2
G
D
SQ51
2N7002_SOT23-3
2
13
G
D
S
Q472N7002_SOT23-3
2
13
R660330K_0402_5%
12
G
D
SQ402N7002_SOT23-3
2
13
R668100K_0402_5%
12
R679470_0402_5%
12
G
D
SQ52
2N7002_SOT23-3
2
13
G
D
SQ50
2N7002_SOT23-3
2
13
G
DS
Q62N7002_SOT23-3
2
13
R676470_0402_5%
12
C612
0.1U_0402_16V
4Z
1
2
U35AO4430 1N SOIC-8
365
78
2
4
1
R674470_0402_5%
12
R663820K_0402_5%
12
C590
0.1U_0402_16V
4Z
1
2
R681470_0402_5%
12
C60010U_0805_10V4Z
1
2
C60
3 0.1U_0402_16V
4Z
1
2
C59810U_0805_10V4Z
1
2
+
C405
330U
_X_2
VM_R
6M1
2
G
D
S
Q432N7002_SOT23-3
2
13
C593
10U_0805_10V
4Z
1
2
G
D
SQ452N7002_SOT23-3
2
13
R672470_0402_5%
12
C613
10U_0805_10V
4Z
1
2
C599
0.1U_0402_16V
4Z
1
2
R670 4.7K_0402_5%1 2
G
D
SQ562N7002_SOT23-3
2
13
G
D
SQ53
2N7002_SOT23-3
2
13
G
D
SQ57
2N7002_SOT23-3
2
13
R664470_0402_5%
12
Q38AO4430 1N SOIC-8
365
78
2
4
1
C596
10U_0805_10V
4Z1
2
G
D
SQ55
2N7002_SOT23-3
2
13
G
DS
Q46AP2301GN 1P_SOT23
2
13
C895
10U_0805_10V
4Z
1
2
R914 330K_0402_5%1 2
C595
0.1U_0402_16V
4Z
1
2
C594
0.1U_0402_16V
4Z
1
2
C610
10U_0805_10V
4Z
1
2
R66947K_0402_5%
12
R673470_0402_5%
12
+
C646
330U
_X_2
VM_R
6M1
2
C5970.01U_0402_16V7K
1
2
R675470_0402_5%
12
J2SHORT PADS
12
C60
2 0.1U_0402_16V
4Z
1
2
U31SI7326DN-T1-E3_PAK1212-8
352
4
1
R667100K_0402_5%
12
C60410U_0805_10V4Z
1
2
C893
0.1U_0402_16V
4Z
1
2
C589
10U_0805_10V4Z
1
2
G
D
SQ48
2N7002_SOT23-3
2
13
C894
0.1U_0402_16V
4Z
1
2
R659100K_0402_5%
12
C611
0.1U_0402_16V
4Z
1
2
G
D
SQ442N7002_SOT23-3
2
13
G
D SQ59 2N7002_SOT23-3
2
1 3
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ADPIN
EN0 39
AB1B_DATA 31
AB1A_CLK 31
AB1A_DATA 31
AB1B_CLK 31THM_TRAVEL#31
THM_MAIN#31
OCP_ADJ44
VIN
VL2VREF_51125
VMB_A
VMB_B
BATT_A
BATT_B
ADP_SIGNAL
+3VL
+3VL
+3VLVL
VL+3VL
2VREF_51125
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891
DC-IN/ BATTERY CONNCustom
36 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.0.1
Close to CPU
(Need to be checked)
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
PC
2710
0P_0
402_
50V
8J1
2
PR10100K_0402_5%
12
PD4
PJS
OT2
4C_S
OT2
32 3
1
PC
710
0P_0
402_
50V
8J1
2
PD19BAV99WT1G_SC70-3
2 31
PC
410
00P
_040
2_50
V7K
12
PR4100K_0402_5%
12
C
BEPQ29
MMBT3906_SOT23-3
1
2
3
PR111K_0402_5%
12
PC3100P_0402_50V8J 1
2
PR8869.8K_0402_1%
1 2
PU15BLM393DR_SO8
+5
-6 O 7
P8
G4
PC60.01U_0402_50V4Z
12
PL3SMB3025500YA_2P
1 2
PC120.1U_0603_25V7K
12
PD20BAV99WT1G_SC70-32 3
1
PR89100K_0402_1%
12
PD3
PJS
OT2
4C_S
OT2
32 3
1
PL1SMB3025500YA_2P
1 2
PR
610
0_04
02_5
% 12
PR
31K
_040
2_5%
12
PJP2
@SUYIN_200046MR008G102ZR
1 1
3 34 45 56 6
8 8
2 2
7 7
PD18BAV99WT1G_SC70-3 2 3
1
PD15BAV99WT1G_SC70-3
2 31
PR8470K_0402_1%1 2
PD1@PJSOT24C_SOT23
2 31
PR91220K_0402_5%
12
PC
810
0P_0
402_
50V
8J1
2
PR71K_0402_5%1 2
PC
2810
0P_0
402_
50V
8J1
2
PC111000P_0402_50V7K
12
PC21000P_0402_50V7K
12
PC29100P_0402_50V8J
12
PR92294K_0402_1%1 2
PC100.01U_0402_50V4Z
12
PR9210K_0402_1%
12
G
D
S
PQ1SSM3K7002FU_SC70-3
2
13
PR
1410
0_04
02_5
% 12
PC9100P_0402_50V8J
12
PR90150K_0402_1%
12
PD17BAV99WT1G_SC70-3
2 31
PR
1510
0_04
02_5
% 12
PR2 1M_0402_1%12
G
D
SPQ30
SSM3K7002FU_SC70-3
2
13
PD16BAV99WT1G_SC70-3
2 31
PR12150K_0603_1%1 2
PR
510
0_04
02_5
% 12
PR1375K_0402_1%
1 2
PR17150K_0402_1%
12
PR1637.4K_0402_1%
12
PL2SMB3025500YA_2P
1 2
PJP1
@ACES_88334-057N
1 1
3 34 45 5
2 2
PCN1
@SUYIN_20163S-06G1-K
BATT+ 1
TS 5
SMD 2
GND 6
SMC 3B/I 4
PH1100K_0603_1%_TSM1A104F4361RZ
12
PC
110
0P_0
402_
50V
8J
12
PC131000P_0402_50V7K
12
PC51000P_0402_50V7K
12
PR1@15K_0402_5%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4BATT_IN
CFET_A
BATT_IN
CFET_B
BATT_IN
BATT_IN
BATT_A_PBATT_B_P
BATT_IN
CFET_B
CFET_A44
BAT_ALARM 31
LATCH31
FET_A 31
FET_B 31
BATT
BATT
BATT_A
BATT_B
BATT_A
BATT_B
+3VL
BATT2VREF_51125
VL
Vin
B++ 51125_PWR
Vin_Debug
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891
Battery selectorCustom
37 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
PC150.1U_0603_50V4Z
12
PD2RB715F_SOT323-3
2
31
PD6SX34-40_SMA
21
PQ17
PMBT
2222
A_SO
T23-
3
1
2
3
PD8
GLZ27D_LL34-2
12
PQ19A2N7002KDW-2N_SOT363-6
61
2
PQ15AO4407A
3 65
78
2
4
1
G
DS
PQ27
BSS84LT1G_SOT23-3
2
13
PQ20B2N7002KDW-2N_SOT363-6
34
5
PR414.7K_0402_5%
12
PR28470K_0402_5%
12
PR35470K_0402_5%
12
PD91SS355_SOD323-2
1 2
PD12
1SS355_SOD323-2
12
PR36470K_0402_5%
12
PR4410K_0402_5%
1 2
PC300.1U_0603_50V4Z
12
PQ19B2N7002KDW-2N_SOT363-6
34
5
PQ7B2N7002KDW-2N_SOT363-63
4
5
PQ8PMBT2222A_SOT23-3
1
2
3
PR9310K_0402_5%
12
PR20100K_0402_5%
12
PQ20A2N7002KDW-2N_SOT363-6
61
2
PR4210K_0402_5%
12
PQ7A2N7002KDW-2N_SOT363-6
61
2
PU10BLM393DR_SO8
+5
-6 O 7
P8
G4
PQ13AO4407A
365
78
2
4
1
PR314.7K_0402_5%
12
PR3010K_0402_5%
12
PR2120K_0402_1%
12
PR3210K_0402_5%1 2
PD51SS355_SOD323-2
1 2
PR370_0402_5%1 2
PR181M_0402_5%
1 2
PR23100_0805_5%1 2
PR33470K_0402_5%
12
PD7SX34-40_SMA
21
PQ10B2N7002KDW-2N_SOT363-6
34
5
PQ14AO4407A
365
78
2
4
1
PR1993.1K_0603_1%
12
PR29470K_0402_5%
12
PR
3947
0K_0
402_
5%
12
PD221SS355_SOD323-2
12
PQ10A2N7002KDW-2N_SOT363-6
61
2
PQ12AO4407A
3 65
78
2
4
1
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DL_CHG
DH_CHG
LX_CHG
CHGEN#
REGNVADJ
BATT
ACDET
AC
P
AC
N
IADAPT
BST_CHG
IADAPT
AC_ADP_PRES
CHGEN#
ACDETACDET
CHGCTRL
ADP_PRES 21,31,35,44CHGCTRL 31
ADP_EN#44
BAT_PWM_OUT31
SRSET 44
CELLS 31
IADAPT44
SLP_S3#15,30,31,34,35,40,41
PMC 31
AC_ADP_PRES31
VIN
BATT
P2
+3VL
VL
CHG_B+
P4P2
P2
P2
+3VL
BQ24740VREF
2VREF_51125
2VREF_51125
+3VL
B+
CHG_B+
P4
+3VL
VL
P2BATT
+5VALW
+3VL
+3VL
+3VL
VIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891 0.1
Charger
38 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Charge DetectorHigh 17.588Low 17.292
AC DetectorHigh 11.85Low 10.55
Note: X7R type
NOTE:PU104-2 , PC127-2, PR144-2 GND near PU101-9 AGND
PC
104
4.7U
_080
5_25
V6M
12
PR136100K_0402_1%
1 2
LMV321AS5X_SOT23-5
PU104
V-2
+IN1
-IN3 OUT 4
V+ 5
PQ107AO4468_SO8
365 7 8
2
4
1
C
BE PQ108
MMBT3906_SOT23-3
1
2
3PR13110K_0603_0.1%
12
PR133220K_0402_5%
12
PC
112
4.7U
_080
5_25
V6M
12
PR
140
23.7
K_0
402_
1%12
PR14211K_0402_5%1 2
PC
108
0.1U
_060
3_50
V7K
12PC107
0.01U_0402_16V7K
12
PC
103
4.7U
_080
5_25
V6M
12
PR101200K_0402_5%
1 2
PR119200K_0402_1%
12
PC1230.047U_0402_16V7K
12
PC
113
4.7U
_080
5_25
V6M
12
PR122210K_0402_1%
12
PC1111U_0603_6.3V6M
1 2
PC
128
4.7U
_080
5_25
V6M
12
PD103
1SS355_SOD323-212
PC1161U_0603_6.3V6M
12
PQ106AO4466_SO8S
1S
2S
3G
4
D8
D7
D6
D5
PC1051U_0603_6.3V6M
1 2
PR1090_0402_5%1 2
PC
102
4.7U
_080
5_25
V6M
12
PU103BLM393DR_SO8
+5
-6 O 7
P8
G4
PR12876.8K_0402_1%
12
PR1120.01_1206_1%1 2
PR125604K_0402_1%
1 2
PC1091U_0805_25V6K
1 2
PR1301K_0402_5%1 2
PR1020.01_2512_1%
1
3
4
2
PR1060_0402_5%
12
PR14449.9K_0402_1%
12
BQ24740RHDR_QFN28_5X5PU101
AC
P3
LPM
D4
CH
GE
N1
AC
N2
AC
DE
T5
AC
SE
T6
IADSLP8
SR
P19
BA
T17
IAD
AP
T15
PGND 22
SR
SE
T16
ISYNSET14
VADJ12
VDAC11
LPR
EF
7
VREF10
DP
MD
ET
21
LODRV 23
CE
LLS
20
SR
N18
AGND9
REGN 24
EXTPWR13
PH 25
HIDRV 26
BTST 27
PVCC 28
TP 29
PC1170.1U_0402_10V7K
1 2
G
D
S
PQ109BSS138_SOT23-3
2
13
PQ102AO4407A
365
78
2
4
1
PR13724K_0603_1%
1 2
PC1240.1U_0402_10V7K
12
[email protected]_0603_25V7K
12
PR11643.2K_0402_1%
12
[email protected]_0402_1%@
12
PR132300K_0402_5%
12
PR14339.2K_0402_1%
1 2
PR12022K_0402_5%
12
PC1181U_0603_10V6K1
2
[email protected]_0603_25V7K
12
PU10ALM393DR_SO8
+3
-2 O 1
P8
G4
PR1151M_0402_1%
12
PC119100P_0402_50V8J
12
PQ101SI4459_SO8
3 65
78
2
4
1
PR12947K_0402_5%
1 2
G
D
S PQ104SSM3K7002FU_SC70-3
2
13
PR135100K_0402_1%
1 2
PR12341.2K_0402_1%
12
PC1221U_0603_6.3V6M
12
PC1100.1U_0402_10V7K
1 2
PR14722K_0402_5%
12
PR1450_0402_5%
1 2
PC1010.1U_0603_25V7K
1 2 PR104
56K_0402_1%1 2
PR
126
100K
_040
2_5%1
2
PL101HCB2012KF-121T50_0805
1 2
PC
114
4.7U
_080
5_25
V6M
12
[email protected]_1206_5%
12
PR10347K_0402_5%
1 2
PR118
255K_0402_1%1 2
PR111150K_0402_5%
12
PR10515K_0402_5%
12
PR113453K_0402_1%
12
PR138
100K_0402_5%1 2
PR134
470K_0402_5%
12
PQ103AO4407A
3 65
78
2
4
1
PC1271U_0603_10V6K
12
PR124147K_0402_1%
12
PU103ALM393DR_SO8
+3
-2 O 1
P8
G4
PR11010_0805_5%1 2
PC
115
4.7U
_080
5_25
V6M
12
PC1200.1U_0603_50V7K
12
PC126@680P_0603_50V8J
12
PR1210_0402_5%
1 2
PD102
RLS4148_LL34-2
12
PR114422K_0402_1%
1 2
PL10210U_LF919AS-100M-P3_4.5A_20%
1 2
PR117100K_0402_5%
12
PR139
1M_0402_5%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
LX_5V
LG_3V
LX_3V
UG_3V
EN
TRIP
1
EN
TRIP
2
UG_5V
BST_3V
EN
TRIP
2
EN
TRIP
1
LG_5V
UG1_3V
DEBUG_KBCRST
KBC_PWR_ON 31
RPGOOD 15
VCC1_PWRGD 31,44
EN0 36
DEBUG_KBCRST 28
B++
+5VALWP
+5VLP
+3VALWP
B++
51125_PWR
2VREF_51125
B+
+VREG3_51125+3VLP
+3VLP
2VREF_51125
VL
+5VALWP
+3VALW
+5VALW
+3VALWP
VL+5VLP
+3VL
+3VALWP +5VALWP
+3VL+3VEXTLP
+5VLP
+3VEXTLP+5VLP
P2
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4961P 0.1
3.3VALWP/5VALWPCustom
39 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)
PR317330K_0402_5%
12
PJP303
PAD-OPEN 4x4m
1 2
PR327
680K_0402_1%
1 2
PC
318
@0.
1U_0
603_
50V
7K
12
LMV321AS5X_SOT23-5
PU302
V-2
+IN1
-IN3 OUT 4
V+ 5
PQ301AO4466_SO8
36 578
2
4
1
PR315@620K_0402_5%
12
PD3051SS355_SOD323-2
12
G
D
S
PQ306SSM3K7002FU_SC70-3
2
13
G
D
S
PQ305SSM3K7002FU_SC70-3
2
13
PC321
1U_0603_16V6K
12
PC
315
10U
_080
5_10
V6K
12
PR30230.9K_0402_1%1 2
PL301HCB2012KF-121T50_0805
1 2
[email protected]_1206_5%
12
PC31910U_0805_10V6K
12
PR32416.5K_0402_1%
12PR318
100K_0402_5%
12
PR320255K_0402_1%
12
PC
301
@22
00P
_040
2_50
V7K
12
PR322
64.9K_0402_1%
12
PC312@680P_0603_50V8J
12
APL5317
PU303
GND2
VIN1
EN3 FB 4
VOUT 5
PC
304
@22
00P
_040
2_50
V7K
12
PR3080_0402_5%1 2
PC
305
4.7U
_080
5_25
V6-
K
12
PJP302
PAD-OPEN 2x2m
2 1
PQ302AO4466_SO8
365 7 8
2
4
1PR3090_0402_5%
1 2
PR3124.7_1206_5%
12
PC
317
@0.
1U_0
603_
50V
7K
12
PD3041SS355_SOD323-2
12
PR314@100K_0402_5%
12
PR30113.7K_0402_1%
1 2
PD3011SS355_SOD323-2
12
PU301TPS51125RGER_QFN24_4X4
VR
EF
3
TON
SE
L4
EN
TRIP
11
VFB
12
VFB
25
EN
TRIP
26
VREG38
DRVL1 19
VR
EG
517
GN
D15
VBST1 22
VIN
16
SK
IPS
EL
14
DRVL212
LL211
VO27
DRVH210 DRVH1 21
PGOOD 23
LL1 20
VC
LK18
VBST29
VO1 24
EN
013
P PAD25
PJP301
PAD-OPEN 4x4m
1 2
PR30420K_0402_1%1 2
PR
321
11.5
K_0
402_
1%
12
PC3090.1U_0402_10V7K1 2
PC3021U_0603_16V7
12
PR306113K_0402_1%1 2
PC32210U_0805_10V6K
12
PC320
2.2U_0603_6.3V6K<BOM Structure>
12
PQ303
S TR AO4712L 1N SO8
4
7 865
123
PR32320K_0402_1%
12
PR316100K_0402_5%1 2
PR326470K_0402_5%
12
PR30320K_0402_1%
1 2
+
PC310150U_D_6.3VM
1
2
PL3034.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
G
D
SPQ307
SSM3K7002FU_SC70-3
2
13
+
PC311150U_D_6.3VM
1
2
PJP304
PAD-OPEN 2x2m
2 1
PR3100_0402_5%1 2
PJP305
PAD-OPEN 2x2m
2 1
PR307
0_0402_5%1 2
+ PC316@100U_25V_M
1
2
PR
325
220K
_040
2_5%
12
PQ304AO4468_SO8
36 578
2
4
1
PL3024.7UH_SIQB74B-4R7PF_4A_20%
12
PC
306
4.7U
_080
5_25
V6-
K
12
PC3072.2U_0805_10V6K
12
PC
303
4.7U
_080
5_25
V6-
K
12
PC3140.1U_0603_25V7K
12
PR305100K_0402_1%
1 2
PC313680P_0603_50V8J
12
PC3080.1U_0402_10V7K
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+1.05V_VCCP
LX_V
CC
P
DH
_VC
CP
DH
_VC
CP
1
FB_V
CC
P
VCCP_B+
BS
T_V
CC
P
DL_VCCP
SE_VCCP
+1.05V_VCCP
SLP_S3#15,30,31,34,35,38,41
VCCP_POK34
VTT_SENSE 7
VSS_SENSE_VTT 7
H_VTTVID17
VCCP_EN11,21,34
+VCCP+1.05V_VCCP
+6269_VCC
+VCCP
+6269_VCC
+1.05V_VCCP
+5VALW
B+
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891 0.1
1.05V_VCCP
40 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(18A,720mils ,Via NO.= 36)
H_VTTVID1= Low, 1.1VH_VTTVID1= High, 1.05V
PQ402
AON6718L
35
2
4
1
PC4171000P_0603_50V7K1
2
PR4111.58K_0402_1%
1 2
PC4121000P_0603_50V7K1
2
PR4140_0402_5%
1 2
PJP402
PAD-OPEN 4x4m
1 2
PC4072.2U_0603_6.3V6K
12
PR4022.2_0603_5%
1 2
PC
413
0.01
U_0
402_
16V
7K
12
PR4077.87K_0402_1%
1 2
PC
403
4.7U
_080
5_25
V6-
K
12
PL401HCB2012KF-121T50_0805
1 2
PU401
ISL6269ACRZ-T_QFN16
FCCM3
EN4
BO
OT
13
PVCC 12VIN1
VCC2
PG
OO
D16
PH
AS
E15
UG
14
LG 11
PGND 10
VO
8
CO
MP
5
FB6
FSE
T7
ISEN 9G
ND
17
PL4020.47UH_FDV0630-R47M-P3_18A_20%
1 2
PR401@10K_0402_5%
12
PC
415
6800
P_0
603_
50V
7K
12
PQ401AO4474_SO8
365 7 8
2
4
1
PR4280_0402_5%
1 2
PR4184.7_1206_5%
12
PC4062.2U_0603_6.3V6K
1 2
PR406@0_0402_5%
1 2
PR4170_0603_5%
1 2
PR
409
90.9
K_0
402_
1% 12
PR4150_0402_5%
1 2
PR
410
49.9
K_0
402_
1%1
2
PC4050.22U_0603_16V7K
1 2PR427
10K_0402_5%
12
PC
402
4.7U
_080
5_25
V6-
K
12
PC41422P_0402_50V8J
12
PJP401
PAD-OPEN 4x4m
1 2
+
PC
410
330U
_X_2
VM
_R6M1
2
PR41310_0402_5%
1 2
[email protected]_0402_10V7K1
2
PR41635.7K_0402_1%
1 2
PR4121.96K_0402_1%
12
PR4084.7_1206_5%
12
PR4042.2_0603_5%1 2
PR4050_0402_5%1 2
PR4030_0402_5%
12
[email protected]_0402_25V4K
12
PC
401
2200
P_0
402_
50V
7K
12PC
416
0.1U
_040
2_25
V6
12
+
PC
408
330U
_X_2
VM
_R6M1
2
PC
404
4.7U
_080
5_25
V6-
K
12
+
PC
409
330U
_X_2
VM
_R6M
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SLP_S3#35,38,40
1.8VS_POK34
+0.75VSP
+5VALW
+5VALW
+1.5V
+0.75VS+0.75VSP
+1.8VS+1.8VSP
+5VALW
+1.8VSP
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891 0.1
0.75VSP/PCIE/1.8VSP
41 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(2A,80mils ,Via NO.= 4)
(1.5A,60mils ,Via NO.= 3)
PR60410K_0402_5%1 2
PR6090_0402_5%
1 2
PQ601B2N7002KDW-2N_SOT363-6
34
5
PC6031U_0603_10V6K
12
PR61012K_0402_1%
12
PC60710U_0805_6.3V6M
12
PC
602
@10
U_0
805_
10V
4Z
12
PC61510U_0805_10V6K
12
PJP601
PAD-OPEN 3x3m
1 2
PD601
1SS355_SOD323-2
1 2
PR61115K_0402_1%
12
PR6031K_0402_1%
12
PR6011K_0402_1%
12
PC61622U_0805_6.3V6M
12
PC
601
10U
_080
5_6.
3V6M
12
PC60510U_0805_6.3V6M
12
PR60210K_0402_5%
12 PQ601A
2N7002KDW-2N_SOT363-6
61
2
PC614150P_0402_50V8J
12
[email protected]_0402_16V7K
12
PC6060.1U_0402_16V7K
12
PU602
APL5930KAI-TRG SOP 8P
GN
D1
VOUT 4POK7
EN8
VC
NTL
6
VIN 5
VOUT 3
FB 2
TP 9
PC
604
0.1U
_040
2_10
V7K
12
PJP602
PAD-OPEN 3x3m
1 2
PC6181U_0603_6.3V6M
12
PU601
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+5VALW
BST_1.05V
UG1_1.05V
LG_1.05V
+5VALW
LX_1.05V
UG_1.05V
+5VALW
LX_1.5V
LG_1.5V
UG_1.5V
+5VALW
BST_1.5V
UG1_1.5V
PM_SLP_LAN#15,35
SLP_S4#15,35
1.5V_POK 34
1.05VM_LAN_POK 34
+1.05VMP_LAN
+1.05VMP_LAN
B+
+5VALW
+1.05VMP_LAN
1.05VS_B+
+1.5VP
+1.5VP
B+
+5VALW
+1.5VP
1.5V_B+
+1.05VMP_LAN+1.05V_LAN_M
+1.5V+1.5VP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891 0.1
1.5VP/1.05VSP
42 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
(8A,320mils ,Via NO.= 16)
(8A,320mils ,Via NO.= 16)
PR519 0_0402_5%1 2
PC519@1000P_0402_50V7K1
2
PL501
HCB1608KF-121T30_06031 2
PC526@10P_0402_50V8J
1 2
PC
509
4.7U
_080
5_25
V6M
12
PC524@1000P_0402_50V7K1
2
PJP501
PAD-OPEN 4x4m
1 2
PC
506
4.7U
_080
5_25
V6M
12
PR5134.7_1206_5%
12
PR503
4.22K_0402_1%<BOM Structure>
1 2
PC
505
@0.
1U_0
402_
25V
6
12
PR521
0_0402_5%12
PR5100_0402_5%1 2
PR516
0_0402_5%12
PC
508
4.7U
_080
5_25
V6M
12
PC5134.7U_0805_6.3V6K
12
PU502
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_PS
V1
TON2
VFB5
PGOOD6 DRVL 9
DRVH 13
LL 12
GN
D7
PG
ND
8
TRIP 11
V5DRV 10
VB
ST
14
TP15
PC5110.1U_0402_10V7K
1 2
PQ501AO4466_SO8<BOM Structure>
365 7 8
2
4
1
PC516@680P_0603_50V8J
12
PC5144.7U_0805_6.3V6K
12
PU501
TPS51117RGYR_QFN14_3.5x3.5
VOUT3
V5FILT4
EN
_PS
V1
TON2
VFB5
PGOOD6 DRVL 9
DRVH 13
LL 12
GN
D7
PG
ND
8
TRIP 11
V5DRV 10
VB
ST
14
TP15
PR715255K_0402_1%
1 2
PC5234.7U_0805_10V6K
12
PR50410K_0402_1%
12
PC
502
@0.
1U_0
402_
25V
6
12
[email protected]_1206_5%
12
PQ504
S TR AO4712L 1N SO8
4
7 865
123
PC
501
@10
00P
_040
2_50
V7K
12
PR522316_0402_1%
1 2
PC5214.7U_0805_10V6K
12
+
PC512330U_V_2.5VM_R6M
1
2
+
PC
518
330U
_V_2
.5V
M_R
6M1
2PC517680P_0603_50V8J
12
PQ503
S TR STS14N3LLH5 1N SO8
4
7 865
123
PR5090_0402_5%1 2
PC
507
4.7U
_080
5_25
V6M
12
PC
527
4.7U
_080
5_25
V6M
12
+
PC515@330U_4V_M
1
2
PR5110_0402_5%1 2
PR5080_0402_5%1 2
PC525@10P_0402_50V8J
1 2PC522
1U_0603_10V6K
12
PR716255K_0402_1%
1 2
PJP502
PAD-OPEN 4x4m
1 2
PC5100.1U_0402_10V7K
1 2
PR520 0_0402_5%1 2
PR50210K_0603_0.1%
12
PR518316_0402_1%
1 2
PR515 8.25K_0402_1%1 2
PL504
HCB1608KF-121T30_06031 2
PR517 15.4K_0402_1%1 2
PL5021UH_PCMC063T-1R0MN_11A_20%
1 2
PL5032.2UH_PCMC063T-2R2MN_8A_20%
1 2
PC
504
@10
00P
_040
2_50
V7K
12
PQ502SIS412DN
35
2
4
1
PR501
10.2K_0603_0.1%1 2
PC5201U_0603_10V6K
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
H_VID0
UGATE1_CPU3
H_VID1
BOOST_CPU2
UGATE_CPU2
PHASE_CPU2
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PROC_DPRSLPVR
CLK_EN#
PSI#1
BO
OS
T_CP
U1
VSSSENSE
VSUM+
VSUM-
UGATE1_CPU2
PHASE_CPU1
LGATE_CPU2
LGATE_CPU1
UGATE_CPU1
ISEN2
ISEN1
PSI#
BOOST_CPU3
PHASE_CPU3
UGATE_CPU3
LGATE_CPU3
ISEN3
VSUM-
VSUM-
VSUM-
ISEN1VSUM+
ISEN3VSUM+
ISEN2VSUM+
H_VID2
H_VID6
H_VID3
UGATE1_CPU1
H_VID0
H_VID1
H_VID2
H_VID6
H_VID3
PROC_DPRSLPVR
H_VID4
PROC_DPRSLPVR
H_VID5
H_VID4
H_VID5
FL1 V2N
FL2 V3N
FL3 V1N
PSI#1PSI#1
H_PROCHOT#4
CLK_EN#12
VGATE15
H_VID07
H_VID17
H_VID27
H_VID37
H_VID47
H_VID57
H_VID67
PM_PWROK31
PROC_DPRSLPVR7
PSI#7
VCCSENSE7
VSSSENSE7
IMVP_IMON 7
+CPU_CORE
CPU_B+
B+
CPU_B+
+CPU_CORE
+5VALW
+5VALW
CPU_B+
+VCCP
CPU_B+
+CPU_CORE
+5VALW
+VCCP
+3VALW
+VCCP
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891 0.1
CPU_CORE
43 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Iccmax= 48AI_TDC=TDBOCP=TDBA, Intel spec=TDBA
PC
233
4.7U
_080
5_25
V6-
K
12
PR210 0_0402_5%1 2
PR282 @1K_0402_5%12
PR
234
@24
9K_0
402_
1%1
2
PR2082.2_0603_5%
12
PR260768_0402_1%1 2
PC2231U_0603_10V6K
12
PR2482.2_0603_5%
12
PR277 @1K_0402_5%12
PC
242
0.33
U_0
603_
10V
7K
12
PR2220_0402_5%
1 2
PC
213
2200
P_0
402_
50V7
K1
2
PR221 @1K_0402_5%12
PR242 0_0402_5%1 2
PR2382.37K_0402_1%
1 2
PH202@470K_0402_5%_TSM0B474J4702RE
1 2
PR228@0_0402_5%1 2
PU202
ISL6208CRZ-T_QFN8
BOOT 1
FCCM6
VCC5
PWM2
LGATE 4GND3
PHASE 7
UGATE 8
PR268 1K_0402_5%12
PC
231
0.1U
_040
2_25
V6
12
PR271 1K_0402_5%12
PR2190_0402_5%
1 2
PR266 @1K_0402_5%12
PR
229
2.2_
1206
_5%1
2
PC
241
0.02
2U_0
402_
25V7
K
12
PR
256
10K
_040
2_1%
12
PC
222
1000
P_0
402_
50V7
K
12
PC
230
0.22
U_0
603_
25V
7K
12
PC
212
0.1U
_040
2_25
V6
12
PR251 0_0402_5%
1 2
PC
238
4.7U
_080
5_25
V6-
K
12
PR2466.81K_0402_1%
12
PR270 @1K_0402_5%12
PC
207
4.7U
_080
5_25
V6-
K
12
PR227 @4.02K_0402_1%1 2
PQ205AO4474_SO8
365 7 8
2
4
1
PR2640_0603_5%1 2
PC
208
4.7U
_080
5_25
V6-
K
12
PC
246
680P
_060
3_50
V7K
12
PR283 1K_0402_5%12
PR
213
3.65
K_0
603_
1% 12
PR280 1K_0402_5%12
PR
235
8.06
K_0
402_
1%1
2
PC
235
0.22
U_0
402_
10V
6K
12
PC
214
4.7U
_080
5_25
V6-
K
12
PC221@22P_0402_50V8J
1 2
PL2030.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PR223 147K_0402_1%1 2
PR239 0_0402_5%1 2
PC2190.22U_0603_10V7K1 2
PL201SMB3025500YA_2P
12
PC
204
4.7U
_080
5_25
V6-
K1
2P
C21
64.
7U_0
805_
25V
6-K
12
PC
243
0.06
8U_0
603_
16V
7K
12
PC2111U_0603_10V6K
1 2
PR267 @1K_0402_5%12 PR281 1K_0402_5%12
PR22468_0402_5%
1 2
PH201
10KB_0603_5%_ERTJ1VR103J
12
PC220 @56P_0402_50V81 2
PR236562_0402_1%
1 2
PC22533P_0402_50V8J
1 2
PC
245
0.01
U_0
402_
25V
7K
12
PR2161_0402_5%
12
PR272 @1K_0402_5%12
PL2040.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PQ203AO4474_SO8
365 7 8
2
4
1
PC
237
0.22
U_0
402_
10V
6K
12
PR269 1K_0402_5%12
PR2490_0603_5%
12
PC
248
330P
_040
2_50
V7K
12
PR
231
3.65
K_0
603_
1%
12
PR
232
10K
_040
2_1%1
2
+
PC
206
@10
0U_2
5V_M
1
2
PC244330P_0402_50V7K
12
PR2740_0603_5%
12
PC
229
0.22
U_0
603_
25V
7K
12
PR278 1K_0402_5%12
PR240 @0_0402_5%1 2
PQ204TPCA8036
35
2
4
1
PC
218
1U_0
603_
10V
6K
12
PR
255
3.65
K_0
603_
1%
12
PR263 0_0402_5%1 2
PR279 @1K_0402_5%12
PQ206TPCA8036
35
2
4
1
PR21547K_0402_5%
1 2
PC
201
0.1U
_040
2_25
V6
12
PC
250
0.1U
_040
2_16
V7K1
2
PC2090.22U_0603_10V7K1 2
+
PC
205
100U
_25V
_M
1
2
PC2471000P_0402_50V7K
12
PR
252
2.61
K_0
402_
1%1
2
PR2250_0402_5%
1 2
PL2020.36UH_PCMC104T-R36MN1R17_30A_20%
1
3
4
2
PC
210
680P
_060
3_50
V7K
12
PR209 0_0402_5%1 2
PC
236
0.22
U_0
402_
10V
6K
12
PC
226
680P
_060
3_50
V7K
12
PR
253
2.2_
1206
_5%1
2
PR2262.2_0603_5%
1 2
PC2400.22U_0603_10V7K1 2
PR
211
2.2_
1206
_5%1
2
PC
203
4.7U
_080
5_25
V6-
K1
2
PC
234
4.7U
_080
5_25
V6-
K1
2
PQ201AO4474_SO8
365 7 8
2
4
1
PC227150P_0402_50V8J
1 2
PC
232
2200
P_0
402_
50V7
K1
2
PR2571_0402_5%
12
PR273 1K_0402_5%12
PR276 1K_0402_5%12
PR
262
11K
_040
2_1%
12
PQ202TPCA8036
35
2
4
1
PC
215
4.7U
_080
5_25
V6-
K1
2
PR241324K_0402_1%
1 2
PC
239
4.7U
_080
5_25
V6-
K1
2
PU201
ISL62883HRZ-T_QFN40_5X5
PGOOD1PSI#2RBIAS3VR_TT#4NTC5VW6COMP7FB8
VIN
17
ISE
N1
11V
SE
N12
RTN
13IS
UM
-14
ISU
M+
15V
DD
16
VSSP1 22LGATE1 23PWM3 24VCCP 25LGATE2 26VSSP2 27PHASE2 28UGATE2 29
VID
031
VID
132
VID
233
VID
334
VID
536
VID
637
VR
_ON
38
ISEN39ISEN210
IMO
N18
BO
OT1
19U
GA
TE1
20
AGND41
PHASE1 21
BOOT2 30
DP
RS
LPV
R39
CLK
_EN
#40
VID
435
PR275 @1K_0402_5%12
PR244 1_0402_5%1 2
PR
214
10K
_040
2_1%1
2
PC224
390P_0402_50V7K1 2
PR
250
82.5
_0402_1%
PC
217
4.7U
_080
5_25
V6-
K1
2
PR2331_0402_5%
12
PC
202
2200
P_0
402_
50V7
K1
2
PC
228
1U_0
603_
10V6
K12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ADP_A_ID
ADP_A_ID
OCP_A_IN
IADAPT38
SRSET 38
ADP_PRES5,38
CFET_A37
OCP_ADJ 36
ADP_EN# 38
VCC1_PWRGD 31,39
ADP_DET# 31
ADP_A_ID 31
OCP_A_IN 31
ADP_EN 31
OCP# 16
OCP31
ADP_ID_CHK31
ADP_SIGNAL
+5VS
BQ24740VREF
+3VL
VIN
+3VL
VL
2VREF_51125
+3VS
+3VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4891
ADP_OCPCustom
44 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
PQ28A2N7002KDW-2N_SOT363-6
61
2
PD111SS355_SOD323-2
12
PR1003130K_0402_1%
12
PR5510K_0402_5%
12
PR100245.3K_0402_1%
12
G
DS
PQ32BSS138_SOT23-3
2
13
G
DS
PQ24NDS0610_NL_SOT23-3
2
13
PD231SS355_SOD323-2
12
PR95150K_0402_5%
1 2
PR438.06K_0402_1%
12
G
D S
PQ33BSS138_SOT23-3
2
1 3
PR49105K_0402_1%
12
EB
CPQ26MMBT3904W_SOT323-3
2
31
PR60100K_0402_5%
1 2
PR5627.4K_0402_1%
12
PR
1001
8.66
K_0
402_
1%1
2
PR7068K_0402_5%
12
PR66100K_0402_1%
1 2
G
D
SPQ25SSM3K7002FU_SC70-3
2
13
PR5110K_0402_1%
1 2
PD211SS355_SOD323-2
12
PR62200K_0402_1%
1 2
PU15ALM393DR_SO8
+3
-2 O 1
P8
G4
PD24
GLZ4.7B_LL34-2
12
PR8033K_0402_5%
12
PR63@0_0402_5%
1 2
PR100710K_0402_5%
1 2
PR
593.
9K_0
402_
5%12
PR45
13K_0402_1%
1 2
LMV321AS5X_SOT23-5
PU12
V-2
+IN1
-IN3 OUT 4
V+ 5
G
D S
PQ36
SSM3K7002FU_SC70-32
1 3
PC
310.
01U
_040
2_16
V7K
12
PR100100_0402_5%
1 2
PR65100K_0402_1%
12
PR100410K_0402_1%
12
PC32
0.01U_0402_16V7K
12
PR570_0402_5%
1 2
PR522K_0402_5%
12
PQ28B2N7002KDW-2N_SOT363-6
34
5
G
D
S PQ34SSM3K7002FU_SC70-3
2
13
C
BE
PQ35MMBT3906_SOT23-31
2
3
PR61
100K_0402_1%1 2
PC
2339
00P
_040
2_50
V7K
1
2
PR50165K_0402_1%
12
PR6410K_0402_5%
12
PR
814.
7K_0
402_
5%12
LMV331IDCKRG4_SC70-5
PU1
GND2OUT 4
IN+1
IN-3
VCC+ 5
PR100622K_0402_5%
12
PC210.22U_0603_10V7K
1 2
PR58100_0402_5%
1 2
PR10051M_0402_5%
1 2
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4961P 0.1
Changed-List History
45 48Tuesday, July 28, 2009
2008/09/15 2009/09/15Compal Electronics, Inc.
Version change list (P.I.R. List) Power section Page 1 of 1
Item Reason for change PG# Modify List Date Phase
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D D
C C
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
HW Changed-List History-(0.1 to 0.2)
46 48Tuesday, July 28, 2009
2006/02/28 2007/02/28Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW CircuitItem Issue DescriptionDate
RequestOwner Solution Description Rev.Page# Title
1 2 1 CompalMXM PEG Bus 01/19 Can't detect GPU of MXM board Need reverse TX & RX bus of PEG. 0 .20 .22 2 1 MXM LVDS Bus Compal Need reverse LVDS low&high bit BUS.No display of LVDS panel
1 3 RTC Compal RTC no function Reverse signals of RTC connector. 0 .234 JVGAFFC12 9 Compal 0 .25 0 .26 0 .2789
01/1901/1901/20 JVGAFFC1 pin23&24 was dummy, USB cacn't work Connect JVGAFFC1 pin23&24 to SLP_S4.02/0202/02
CompalCompal
2 02 0
DISP_OFF#Left USB port
Use wrong power rail for this signal.It's wrong port for debug
Currently panel spec is +3VS.Change connection from port0 to port1 for debug.
0 .20 .20 .2
02/04 Compal2 1 PWR_LEVEL Need isolation circit per HP request. Add Q69, Q70, R397, R388, R118.4 CPU FAN CONN 02/06 Compal No GND pin of FAN connector. Change Connector to 4 pin with GND pin.
4,13,24 SM BUS HP HP request to remove SM bus to XDP, JTAG & WLAN. Leave TP and remove signals.2 2 HP Intel change design to remove some caps. Remove these caps as Intel CRB design.101 1 Compal11 Data & CLK signals are reverse of U36. Reverse CLK & DATA.
Intel LANDDR M2 support
02/0602/0602/08
12 3 0 HP No install R734 & R735.LED CTL circuit 02/0613 1 5 HP
HP request to update LED control circuit.Duplicate 02/06 Remove R247.
14 1 3 HP Change R720 to NO INSTALL.PCH_JTAG_RST# 02/06 No install R720.15 1 3 HP Change GPIO43_R to USB_OC#4 & reserve 33 ohm serial.GPIO 02/06 Add R134 but no install.
Remove R247 because of R541existing.
LED control HP Remove GND & change connection of R176.1 316 02/06 Change R176 to 1K with install it.17 1 4 CLKREQ_EXP# HP Change R687 PU for CLKREQ_EXP# to INSTALL.02/06 Install R687.18 1 7 PCH Power Rail HP Some power rail of PCH are no use.02/06 Remove these power and add TP.19 3 2 Card Reader 02/06 HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.
21 1 6 WWAN CONN HP WOW# to WWAN connector is no longer supported. Remove R117 and signal.22 1 3 SATA port 02/10 HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.
02/1020 Debug port9 02/10 HP HP request to add debug port for iAMT. Add JiAMT1.
23 3 1 KBC1091 02/10 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.24 2 4 WLAN 02/10 HP Remove R441 and connection to JWLAN1.5 Remove R441.25 2 4 USB port6 02/10 HP Remove USB signals to JWLAN1.36 and 38. Remove them.26 2 0 WLAN 02/10 HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.27 2 2 Intel 82578 02/10 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.28 4, 16 Intel Change 02/10 HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.29 3 1 System ID control 02/17 HP Common Design with other project. Del D49, R149 and Q154 and Add U44.30 2 0 Webcam 02/17 HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.31 1 5 PWR_GD 02/17 HP HP request to change design. Add R399 and install R237.32 1 5 NAND Flash 02/17 HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.33 4 XDP PU 02/17 HP HP request to change design. Del R37, R38, R39.34 2 2 LAN Power 02/17 HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.35 2 9 Docking 02/17 HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.
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0 .20 .2
0 .20 .2
0 .20 .2
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0 .20 .2
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36 3 3 Super I/O 02/17 Compal Common design change to SMSC.
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4
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3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
HW Changed-List History-(0.1 to 0.2)
47 48Tuesday, July 28, 2009
2006/02/28 2007/02/28Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW CircuitItem Issue DescriptionDate
RequestOwner Solution Description Rev.Page# Title
1 2 5 CompalESD DIODE 04/23 Wrong connection of D53 & D54, system can't boot. Swap +5VS & GND of D53 & D54 pin 2 & 5. 0 .30 .32 2 9 SATA Port 5 Compal Swap SATA_PTX_C_DRX_P5/N5 of connector side.It have wrong connection of JDOCK1 pin108 & pin109.
2 8 SPI_CS0# HP HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19.34 SM BUS1 4 HP56789
04/23
Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2KHPHP
2 31 3
LAN TransfermerJTAG Port
Intel request to add 1uF cap between TRM caps to GND.HP review need swap JTAG1 pin4 & pin6.
Add C264 to GND.Swap XDP_FN16 & XDP_FN17 at JTAG1 side.
HP1 7 PCH +1.05VS HP review will no need connect resistor between them. Remove R310.1 4 PCH 25MHz Crystall HP No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52.3 1 KBC1098 VCC0 HP The VCC0 will never connect to GND. Remove R587 from schematic.1 6 HP GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD.102 1 HP11 Need 0.1uF cap for Q20, Q67 gate pin. Add C265.
LAN_DIS#DPA AUX
12 3 0 HP Change GPIO of PCH to WWAN_DET#.WWAN_DET#13 1 6 HP
Design Change PCH GPIO22 to WWAN_DET#.Webcam control Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GPIO47.
14 2 0 HP Del R350.15 1 3 HP Need inverter for docking power LED signal.DOCK LED Add Q71 & R67.
Chnage the control pin from GPIO47 to GPIO22 of PCH.
SER_SHD HP HP request to remove SER_SHD from SIO to docking.3 316 Disconnect SER_SHD at docking side, add R7 PU to +3VS.17 9, 10 DDR3 M1 & M3 HP Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1.18 1 7 PCH Power Rail HP Some power rail of PCH are no use. Remove these power and add TP.19 3 2 Card Reader HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.
21 1 6 WWAN CONN HP WOW# to WWAN connector is no longer supported. Remove R117 and signal.22 1 3 SATA port HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.
20 Debug port9 HP HP request to add debug port for iAMT. Add JiAMT1.
23 3 1 KBC1091 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.24 2 4 WLAN HP Remove R441 and connection to JWLAN1.5 Remove R441.25 2 4 USB port6 HP Remove USB signals to JWLAN1.36 and 38. Remove them.26 2 0 WLAN HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.27 2 2 Intel 82578 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.28 4, 16 Intel Change HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.29 3 1 System ID control HP Common Design with other project. Del D49, R149 and Q154 and Add U44.30 2 0 Webcam HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.31 1 5 PWR_GD HP HP request to change design. Add R399 and install R237.32 1 5 NAND Flash HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.33 4 XDP PU HP HP request to change design. Del R37, R38, R39.34 2 2 LAN Power HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.35 2 9 Docking HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.36 3 3 Super I/O Compal Common design change to SMSC.
0 .30 .30 .30 .30 .3
0 .30 .30 .30 .3
0 .30 .30 .30 .30 .30 .30 .30 .30 .3
0 .30 .3
0 .30 .30 .30 .30 .30 .30 .30 .30 .3
0 .30 .3
04/2304/2304/2304/2404/2504/2504/2504/2504/2504/2504/25
Webcam control 04/25 Chnage the control pin from GPIO47 to GPIO22 of PCH.04/2504/2504/30
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4
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3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-4951P 0.4
HW Changed-List History-(0.3 to 0.4)
48 48Tuesday, July 28, 2009
2006/02/28 2007/02/28Compal Electronics, Inc.
Version Change List ( P. I. R. List ) for HW CircuitItem Issue DescriptionDate
RequestOwner Solution Description Rev.Page# Title
1 4 HPFAN CTRL Circuit 07/2 FAN always 100% turn after power on Del D29 & NI R133 to prevent this issue. 0 .40 .32 2 9 SATA Port 5 Compal Swap SATA_PTX_C_DRX_P5/N5 of connector side.It have wrong connection of JDOCK1 pin108 & pin109.
2 8 SPI_CS0# HP HP request to add pull up resistor close to SPI ROM. Reserve R6 close to U19.34 SM BUS1 4 HP56789
04/23
Intel request to change PU to 2.2K. Change R199, R200 from 4.7K to 2.2KHPHP
2 31 3
LAN TransfermerJTAG Port
Intel request to add 1uF cap between TRM caps to GND.HP review need swap JTAG1 pin4 & pin6.
Add C264 to GND.Swap XDP_FN16 & XDP_FN17 at JTAG1 side.
HP1 7 PCH +1.05VS HP review will no need connect resistor between them. Remove R310.1 4 PCH 25MHz Crystall HP No need 25MHz for PCH as common design. No install R229, C281, C282, Y4 but add R52.3 1 KBC1098 VCC0 HP The VCC0 will never connect to GND. Remove R587 from schematic.1 6 HP GPIO12 of PCH have internal PU. No install R279 and reserve R53 PD.102 1 HP11 Need 0.1uF cap for Q20, Q67 gate pin. Add C265.
LAN_DIS#DPA AUX
12 3 0 HP Change GPIO of PCH to WWAN_DET#.WWAN_DET#13 1 6 HP
Design Change PCH GPIO22 to WWAN_DET#.Webcam control Modify WEBCAM_OFF to WEBCAM_ON, add R66 PU for GPIO47.
14 2 0 HP Del R350.15 1 3 HP Need inverter for docking power LED signal.DOCK LED Add Q71 & R67.
Chnage the control pin from GPIO47 to GPIO22 of PCH.
SER_SHD HP HP request to remove SER_SHD from SIO to docking.3 316 Disconnect SER_SHD at docking side, add R7 PU to +3VS.17 9, 10 DDR3 M1 & M3 HP Need implement M1, M3 but reserve M2 for SI1. Remove R91, R682~R684 and add divider for V_DDR_CPU_REF0/1.18 1 7 PCH Power Rail HP Some power rail of PCH are no use. Remove these power and add TP.19 3 2 Card Reader HP It will need find tune value of R731 & C661. Change R731 to 100K & C661 to 1uF X5R as Cartier first.
21 1 6 WWAN CONN HP WOW# to WWAN connector is no longer supported. Remove R117 and signal.22 1 3 SATA port HP Change SATA assignments to support PM. Port 4 --> 5, Port2 --> 4, Port3 -->2.
20 Debug port9 HP HP request to add debug port for iAMT. Add JiAMT1.
23 3 1 KBC1091 HP Remove ADP_DET# on U23 GPIO9. Add R320 PD on GPIO9.24 2 4 WLAN HP Remove R441 and connection to JWLAN1.5 Remove R441.25 2 4 USB port6 HP Remove USB signals to JWLAN1.36 and 38. Remove them.26 2 0 WLAN HP Add 680P on DISP_OFF# close JLCD1 and change C359. Change C359 to 0.1uF and add C439.27 2 2 Intel 82578 HP Can remove Q17, R405 & R124 if no leakage. Reserve Q17, R405 and R124 in DB2.28 4, 16 Intel Change HP 414044 DG update 1.11 Change R31/R32 to 1.5K/750ohm and R297 to 100K.29 3 1 System ID control HP Common Design with other project. Del D49, R149 and Q154 and Add U44.30 2 0 Webcam HP WEBCAM_OFF is active high, so need change design. Add R287 to turn on Gate.31 1 5 PWR_GD HP HP request to change design. Add R399 and install R237.32 1 5 NAND Flash HP HP request to change design. Add NAND_DETECT# form U4.Y7 to JNAND1.17.33 4 XDP PU HP HP request to change design. Del R37, R38, R39.34 2 2 LAN Power HP Remove power switch from 3V to 1V and related parts. Remove C382, C383, C384, C385, C694, R401, R366, Q21 and R402.35 2 9 Docking HP HP agree to remove caps for DP from MB to DOCKING.Remove C496 ~ C511 from MB.36 3 3 Super I/O Compal Common design change to SMSC.
0 .30 .30 .30 .30 .3
0 .30 .30 .30 .3
0 .30 .30 .30 .30 .30 .30 .30 .30 .3
0 .30 .3
0 .30 .30 .30 .30 .30 .30 .30 .30 .3
0 .30 .3
04/2304/2304/2304/2404/2504/2504/2504/2504/2504/2504/25
Webcam control 04/25 Chnage the control pin from GPIO47 to GPIO22 of PCH.04/2504/2504/30