COMP 1321 COMP 1321 Digital InfrastructureDigital Infrastructure

Richard HensonRichard HensonUniversity of WorcesterUniversity of Worcester

OctoberOctober 20122012

Week 3: The Fetch-Execute Week 3: The Fetch-Execute CycleCycle

Explain the instruction set of a typical CPU

Understand the sequential way a CPU works, using its instruction set

Understand how registers and memory addresses are used to process a CPU instruction and store the results

CPUs and the SAMCPUs and the SAM

SAM designed to allow you to watch SAM designed to allow you to watch what happens when a CPU workswhat happens when a CPU works

CPU very, very, very fastCPU very, very, very fast Processes one instruction at a timeProcesses one instruction at a time Instructions can require several cyclesInstructions can require several cycles

What is “Processing”?What is “Processing”?

Usually calculations:Usually calculations:need data inputneed data input

» from registerfrom register» from external memoryfrom external memory

need to store outputneed to store output» from registerfrom register» from external memoryfrom external memory

Could also be a command without dataCould also be a command without data

CPU typesCPU types

Most frequently used:Most frequently used:Intel 8086 familyIntel 8086 familyMotorola 68000 familyMotorola 68000 familyARM (many mobile phones)ARM (many mobile phones)

We’ll focus on Intel 8086 familyWe’ll focus on Intel 8086 familydates back to original IBM PC…dates back to original IBM PC…

RegistersRegisters Tiny memory stores inside the CPUTiny memory stores inside the CPU

usually containing one word of memoryusually containing one word of memory Examples here show an 8-bit word (as Examples here show an 8-bit word (as

used with original 8080 chip)used with original 8080 chip) Typical registers:Typical registers:

general purpose data: AX, BX, CX, DXgeneral purpose data: AX, BX, CX, DXspecific use e.g. specific use e.g.

» program counter: instruction address in memoryprogram counter: instruction address in memory» stack pointer…stack pointer…

Data and AddressingData and Addressing A general purpose register could A general purpose register could

contain contain datadataan address that points to dataan address that points to data

Needs to be a way to distinguish Needs to be a way to distinguish between thembetween themAX, 37 – move “37” into registerAX, 37 – move “37” into registerAX, [37] – move data contain in address 37 AX, [37] – move data contain in address 37

into registerinto register

8086 in practice8086 in practice General Purpose registers 16-bitGeneral Purpose registers 16-bit

Each gen register split into upper & lower Each gen register split into upper & lower bytebyte

AH AL

BLBH

CH

DH

CL

DL

AX

BX

CX

DX

upper byte lower byte

Fetch-Execute CycleFetch-Execute Cycle

1. Fetch instruction from memory

2. Decode the instruction and read any registers

3. Do any ALU operations (execute units)

5. Write back results to registers

(Organization and Control)

add ax , bx

4. Do any Memory Access

ALU <- ax ALU <- bx

ax + bx

(Data cache)

ax <- ALU

None needed

add ax , bx

add ax,bx

add ax

0

1

4

3

2

bx

Fetch-Exec : State 1Instruction Fetch

8

3

7

1

9

3 1

AX BX

0

1

4

3

2

Fetch-Exec : State 2Decode, Register Operations

8

3

7

1

9

add ax , bx

add ax,bx

add ax bx

3 1

3 1

AX BX

0

1

4

3

2

Fetch-Exec : State 3ALU Operation

8

3

7

1

9

add ax , bx

add ax,bx

add ax bxAX BX

3 14

0

1

4

3

2

Fetch-Exec : State 4Memory Access

8

3

7

1

9

add ax , bx

add ax,bx

add ax bxAX BX

3 14

0

1

4

3

2

Fetch-Exec : State 5Register Write

8

3

7

1

9

add ax , bx

add ax,bx

add ax bxBX

3 14

4

Fetch-Execute CycleFetch-Execute Cycle

1. Fetch instruction from memory

2. Decode the instruction and read any registers

3. Do any ALU operations (execute units)

5. Write back results to registers

(Organization and Control)

mov ax , [1]

4. Do any Memory Access

Read the ‘1’

Put ‘1’ into MAR

Data into ax

Read memory at addr ‘1’

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 1Instruction Fetch

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 2Decode, Register Operations

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 3ALU Operation

1

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 4Memory Access

1

8

3

7

1

9

8

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 5Register Write

1

8

3

7

1

9

88

8088: Brains of the IBM PC8088: Brains of the IBM PC

Inside the 8088Inside the 8088address bus

address adder

gen registers

Externalbuses

ALU

5

12

3

4

1. Fetch2. Decode3. ALU4. Mem Ops5. Reg Write

PentiumPentium

So THAT’S how it all works!So THAT’S how it all works!

now you try it on SAM2…now you try it on SAM2…

Next week: a focus on writing Next week: a focus on writing programs and i/oprograms and i/o