Communication Theory II · o The data-addressing modes include: 1. Register 2. Immediate 3. Direct 4. Register indirect 5. Base plus index 6. Register-relative 7. Base relative-plus-index

Microprocessor (COM 9323)

Lecture 8: Data Addressing Modes

Ahmed Elnakib, PhD

Assistant Professor, Mansoura University, Egypt

1March 10th, 2016

Text Book/References*

Textbook:The Intel Microprocessors, Architecture, Programming and Interfacing, 8th edition,

Barry B. Brey, Prentice Hall, 2009 (Chapter 03)

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*The presentation is based on the text book (Tables and Figures)

o The data-addressing modes include:

1. Register

2. Immediate

3. Direct

4. Register indirect

5. Base plus index

6. Register-relative

7. Base relative-plus-index

8. scaled-index mode (included in 80386 and above )

9. RIP relative addressing (available to 64-bit Pentium 4 or Core2)

o The program memory-addressing modes include:

1. Program relative

2. Direct

3. Indirect 3

Types of Addressing Mode

1. Register Addressing

2. Immediate Addressing

3. Direct Addressing

4. Register indirect Addressing

5. Base plus index Addressing

6. Register-relative Addressing

7. Base relative-plus-index Addressing

8. Scaled-index mode Addressing

9. RIP relative Addressing

Data-addressing modes

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o How many 8-bit subset of the MOV instruction?

- combinations are 64 different

variations (how?)

Data Addressing Modes:1. Register Addressing (cont’d)

Examples of register addressing instructions


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Data Addressing Modes: 2. Immediate Addressing (cont’d)

Examples of

immediate

addressing

using the MOV instruction

The ASCII characters

are stored as BA, so

exercise care when

using word-sized pairs

of ASCII characters.

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o The assembler generated the machine code and addresses, and stored the program in a file with the extension .LST.

short assembly

language

program

that places

0000H into the

16-bit registers

AX, BX, and CX.

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o Each statement in an assembly language program consists of

four parts or fields

o The leftmost field is called the label

o It is used to store a symbolic name for the memory location

that it represents


If the program is assembled and the list (.LST) file is viewed, it appears as follows:

(.LST) file

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o All labels must begin with a letter or one of the following

special characters: @, $, -, or ?

o A label may be of any length from 1 to 35 characters

o The label appears in a program to identify the name of a

memory location for storing data and for other purposes

that are explained as they appear.



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o The next field to the right is called the opcode field

o It is designed to hold the instruction, or opcode.

o The MOV part of the move data instruction is an example of an

opcode



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o To the right of the opcode field is the operand field, which

contains information used by the opcode

o For example, the MOV AL,BL instruction has the opcode MOV

and operands AL and B

o Note that some instructions contain between zero and three

operands



o The final field, the comment field, contains a comment about

an instruction or a group of instructions.

o A comment always begins with a semicolon (;).



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o Programs are also written using the inline assembler in some Visual C++ programs

o Example shows a function in a Visual C++ program that includes some code written with the inline assembler


o This function adds 20H to the number returned by the function

o Notice that the assembly code accesses C++ variable temp and all of the assembly code is placed in an _asm code block

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Data Addressing Modes: 3. Direct Addressing

o Direct addressing moves a byte or word between a memory location and a register

AX,[1234H]

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Data Addressing Modes: 3. Direct Addressing (cont’d)

o Example: The MOV CX, LIST instruction copies the word-sized contents of memory location LIST into register CX

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o In the 80386 and above, a doubleword-sized memory location can also be addressed

o Example: The MOV ESI, LIST instruction copies a 32-bit number, stored in four consecutive bytes of memory, from location LIST into register ESI

o The direct memory instructions in the 64-bit mode use a full 64-bit linear address

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o In fact, direct data addressing is applied to many instructions in

a typical program

o There are two basic forms of direct data addressing:

1. Direct form addressing, which applies to a MOV between a

memory location and AL, AX, or EAX

2. Displacement form addressing, which applies to almost any instruction in the instruction set

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o In either case, the address is formed by adding the

displacement to the default data segment address or an

alternate segment address

o Forms:

AX,[1234H]

MOV AX,[1234H] MOV AX,DS:[1234H]

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o Direct Addressing: direct addressing with a MOV instruction transfers data between a memory location, located within the data segment, and the AL (8-bit), AX (l6-bit), or EAX (32-bit) register

o A MOV instruction using this type of addressing is usually a 3-byte long instruction (What is this means?)

o In the 80386 and above, a register size prefix may appear before the instruction, causing it to exceed 3 bytes in length

AX,[1234H]

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Data Addressing Modes:3. Direct Addressing (cont’d)

Example:

sequence of

assembled

instructions

Machine-codedInstruction

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o The MOV AL,DATA instruction, as represented by most assemblers, loads AL from the data segment memory location DATA (1234H)

o Memory location DATA is a symbolic memory location, while the 1234H is the actual hexadecimal location

o With many assemblers, this instruction is represented as aMOV AL,[1234H] instruction or MOV AL,DATA or MOV AL,DS:[1234H]

AX,[1234H]

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o Figure shows how this instruction transfers a copy of the byte-sized contents of memory location 11234H into AL

o The effective address is formed by adding 1234H (the offset address)and 10000H (the data segment address of 1000H times 10H) in a system operating in the real mode

The operation of the

MOV AL,[1234H]

instruction when

DS = 1000H

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o These instructions

often appear in

programs, so Intel

decided to make

them special 3-

byte-long

instructions to

reduce the length

of programs*Note: The 80386–Pentium 4

at times use more than 3

bytes of memory for 32-bit

instructions.

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o All other instructions that move data from a memory location

to a register, called displacement addressed instructions,

require 4 or more bytes of memory for storage in a programo Displacement form Addressing: is almost identical to direct form

addressing, except that the instruction is 4 bytes wide instead of 3

AX,[1234H]

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o In the 80386 through the Pentium 4, this instruction can be up to 7 bytes wide if both a 32-bit register and a 32-bit displacement are specified

o This type of direct data addressing is much more flexible because most instructions use it

AX,[1234H]

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o The operation of the MOV CL,DS:[1234H] instruction is

compared to that of the MOV AL,DS:[1234H] instruction

o We see that both basically perform the same operation except

for the destination register (CL (offset) versus AL (direct))

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o Another difference only becomes apparent upon examining the

assembled versions of these two instructions

o The MOV AL,DS:[1234H] instruction is 3 bytes long and the

MOV CL,DS:[1234H] instruction is 4 bytes long

o This example shows how the assembler converts these two

instructions into hexadecimal machine language

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o You must include the segment register DS: in this example,

before the [offset] part of the instruction

o You may use any segment register, but in most cases, data are stored in the data segment, so this example uses DS:[1234H]

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o Table lists some MOV instructions using the displacement form of direct addressing

o Not all variations are listed because there are many MOV instructions of this type

o The segment registers can be stored or loaded from memory

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o Example shows a short program using models that address information in the data segment

o Note that the data segment begins with a .DATA statement to inform the assembler where the data segment begins

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o The model size is adjusted from TINY, to SMALL so that a data segment can be includedo The SMALL model allows one data segment and one code segmento The SMALL model is often used whenever memory data are required for a programo A SMALL model program assembles as an execute (.EXE) program file

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o Notice how this example allocates memory locations in the data segment by using the DB and DW directives

o Here the .STARTUP statement not only indicates the start of the code, but it also loads the data segment register with the segment address of the data segment

o If this program is assembled and executed with CodeView, the instructions can be viewed as they execute and change registers and memory locations











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Data Addressing Modes: 4. Register Indirect Addressing

o Register indirect addressing transfers a byte or word between a registerand a memory location addressed by an index or base register

o The index and base registers are BP, BX, DI, and SIo Example: The MOV AX, [BX] instruction copies the word-sized data from

the data segment offset address indexed by BX into register AX

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Data Addressing Modes: 4. Register Indirect Addressing (cont’d)

o In the 80386 and above, a byte, word, or doubleword is transferred between a register and a memory location addressed by any register: EAX, EBX, ECX, EDX, EBP, EDI, or ESI

o Example: The MOV AL, [ECX] instruction loads AL from the data segment offset address selected by the contents of ECX

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o In 64-bit mode, the indirect address remains 32 bits in size, which means this form of addressing at present only allows access to 4G bytes of address space if the program operates in the 32-bit compatible mode

o In the full 64-bit mode, any address is accessed using either a 64-bit address or the address contained in a register

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Data Addressing Modes:4. Register Indirect Addressing (cont’d)

o The data segment is used by default with register indirect addressing or

any other addressing mode that uses BX, DI, or SI to address memory

o If the BP register addresses memory, the stack segment is used by

default

Microprocessor BASE Registers used with Register Indirect Addressing

16-bit 32-bit 64-bit

BP (SS) EBPAny 64 bit register can

be used to held the linear address

DI (DS), and SI (DS) EDI, or ESI

BX (DS) EAX, EBX, ECX, EDX

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o For the 80386 and above, EBP addresses memory in the stack segment

by default

o EAX, EBX, ECX, EDX, EDI, and ESI address memory in the data segment

by default



BP (SS) EBPAny 64 bit register can

be used to held the linear address



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o In 64-bit mode: the segment registers are not used in the address calculation because the register contains the actual linear memory address



BP (SS) EBPo Any 64 bit register

can be used to held the linear address



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If Register BX =1000H,

DS=0100H and MOV AX,[BX]

instruction executes:

1. the word contents of data

segment offset address

1000H are copied into

register AX

2. If the microprocessor is

operated in the real mode

and, this instruction

addresses a word stored at

memory bytes 2000H and

2001H, and transfers it into

register AX

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o Note that the contents of

2000H are moved into AL

and the contents of 2001H

are moved into AH

o The [ ] symbols denote

indirect addressing in assembly language

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Assembler Directive

8-bit 16-bit 32-bit 64-bit

BYTE PTR WORD PTR DWORD PTR QWORD PTR

o These directives indicate the size of the memory data addressed by the

memory pointer (PTR)

o Example-1 MOV BYTE PTR [DI],10H : clearly designates the location

addressed by DI as a byte-sized memory location

o Example-2 MOV DWORD PTR [DI],10H: clearly identifies the memory

location as doubleword-sized

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Data Addressing Modes: 5. Base-Plus-Index Addressing

o Base-plus-index addressing transfers a byte or word between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI)

o Example: The MOV [ BX,DI], CL instruction copies the byte-sized contents of register CL into the data segment memory location addressed by BX plus DI

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Data Addressing Modes: 5. Base-Plus-Index Addressing

o In the 80386 and above, any two registers (EAX, EBX, ECX, EDX, EBP, EDI, or ESI) may be combined to generate the memory address

o Example: The MOV [EAX,EBX], CL instruction copies the byte sized contents of register CL into the data segment memory location addressed by EAX plus EBX

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Data Addressing Modes:5. Base-Plus-Index Addressing (cont’d)


16-bit 32-bit

Base BP (SS), BX (DS)Any two registers (EAX, EBX, ECX, EDX, EBP, EDI, or ESI) may be combined to

generate the memory addressPlus Index DI, SI

o The base register often holds the beginning location of a memory

array, whereas the index register holds the relative position of an

element in the array

o Remember that whenever BP addresses memory data, both the stack segment register and BP generate the effective address

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Data Addressing Modes: 5) Base-Plus-Index Addressing (cont’d)

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Data Addressing Modes: 5. Base-Plus-Index Addressing (cont’d)











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Data Addressing Modes: 6. Register Relative Addressing

o Register relative addressing moves a byte or word between a registerand the memory location addressed by an index or base register (BP, BX, DI, or SI) plus a displacement

o Example-1: The MOV CL,[BX+4] loads CL from the data segment address formed by BX plus 4

o Example-2: The MOV AX,ARRAY[BX] loads AX from the data segment memory location in ARRAY plus the contents of BX

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o The 80386 and above use any 32-bit register except ESP to address memory

o Example-1: MOV AX,[ECX+4] loads AX from the data segment address formed by ECX plus 4

o Example-2: MOV AX,ARRAY[EBX] loads AX from the data segment memory location ARRAY plus the contents of EBX

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Data Addressing Modes: 7. Base relative-plus-index Addressing

o Base relative-plus-index addressing transfers a byte or word between a register and the memory location addressed by a base and an index register plus a displacement

o Example: MOV AX, ARRAY[BX+DI] or MOV AX, [BX+DI+4] These instructions load AX from a data segment memory location The first instruction uses an address formed by adding ARRAY, BX, and

DI and the second by adding BX, DI, and 4

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o In the 80386 and above, MOV EAX, ARRAY[EBX,ECX] loads EAX from the data segment memory location accessed by the sum of ARRAY, EBX, and ECX

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Data Addressing Modes: 8. Scaled-index Addressing

o Scaled-index addressing is available only in the 80386 through thePentium 4 microprocessor

o The second register of a pair of registers is modified by the scale factor of 𝟐 ×, 𝟒 ×, or 𝟖 × to generate the operand memory address

o Example: A MOV EDX, [EAX+4*EBX ] instruction loads EDX from the data segment memory location addressed by EAX plus four times EBX

o Scaling allows access to word (2 ×), doubleword (4 ×), or quadword (8 ×) memory array data

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o Example: A MOV AX, [EDI+2*ECX ] instruction loads AX from the data segment memory location addressed by EDI plus two times ECX

o If ECX contains a 00000000H, word-sized memory element 0 is

addressed

o if ECX contains a 00000001H, word-sized memory element 1 is

accessed, and so forth

o This scales the index (ECX) by a factor of 2 for a word-sized memory array

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o Note that a scaling factor of also exists, but it is normally implied and does not appear explicitly in the instruction The MOV AL, [EBX,ECX] is an example in which the scaling factor is a one Alternately, the instruction can be rewritten as MOV AL, [EBX,1*ECX]

o Another example is a MOV AL, [2*EBX] instruction, which uses only onescaled register to address memory

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Data Addressing Modes: 9. RIP Relative Addressing

o This addressing mode is only available to the 64-bit extensions on the Pentium 4 or Core2 to address a linear location in the flat memory model

o This mode allows access to any location in the memory system by adding a 32-bit displacement to the 64-bit contents of the 64-bit instruction pointer

o For example, if RIP = 1000000000H and a 32-bit displacement is 300H, the location accessed is 1000000300H

o The displacement is signed so data located within from the instruction is accessible by this addressing mode

Questions

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Documents

Communication Theory II · o The data-addressing modes include: 1. Register 2. Immediate 3. Direct 4. Register indirect 5. Base plus index 6. Register-relative 7. Base relative-plus-index