Combined Input Output Combined Input Output Queuing Switch SimulatorQueuing Switch Simulator

The Laboratory of Computer The Laboratory of Computer Communication and NetworkingCommunication and Networking

Team membersTeam members

Developed by:Developed by:

Nir ZepkowitzNir Zepkowitz szefko@t2szefko@t2

Ari ShotlandAri Shotland shota@t2shota@t2

Amir NahirAmir Nahir samnahir@t2samnahir@t2

Instructor: Dr. Adi Rosen adiro@csInstructor: Dr. Adi Rosen adiro@cs

Supervisor: Mr. Guy Sela guysela@txSupervisor: Mr. Guy Sela guysela@tx

Project GoalProject Goal

To determine how the memory (buffer To determine how the memory (buffer space) of a CIOQ switch should be space) of a CIOQ switch should be partitioned between the output ports partitioned between the output ports and the input ports, and how the and the input ports, and how the performance of the switch is affected performance of the switch is affected by this division.by this division.

Project sub - goalsProject sub - goals

• Provide an easily configurable switch Provide an easily configurable switch simulator to allow user to compare simulator to allow user to compare switch behavior upon various switch behavior upon various parameters of both switch and parameters of both switch and network traffic.network traffic.

• Provide a tool for generation of Provide a tool for generation of network traffic.network traffic.

BackgroundBackground

• The increasing speed of The increasing speed of communication lines poses communication lines poses technological challenges on the design technological challenges on the design of network switches. In a nutshell, the of network switches. In a nutshell, the problem is that it is hard to build problem is that it is hard to build switches with internal speed which is switches with internal speed which is much higher than the speed of current much higher than the speed of current communication lines.communication lines.

BackgroundBackground

• Combined Input Output Queued (CIOQ) Combined Input Output Queued (CIOQ) switches are switches that have buffers both switches are switches that have buffers both at the input ports and at the output ports. at the input ports and at the output ports. Packets arriving on input ports are first Packets arriving on input ports are first stored in buffers at their input port. They are stored in buffers at their input port. They are later transferred to buffers at the output later transferred to buffers at the output ports, and from there transmitted on the ports, and from there transmitted on the output lines. Typically, the internal speed of output lines. Typically, the internal speed of such switches is some (small) constant such switches is some (small) constant times the speed of the communication lines.times the speed of the communication lines.

Project ArchitectureProject Architecture

• The project consists of three main The project consists of three main modules:modules:• Network Traffic Generator.Network Traffic Generator.• Switch Simulator.Switch Simulator.• Report Generator.Report Generator.

Simulation FlowSimulation Flow

Traffic.iniNetwork Traffic

Generator

Traffic.out

Simulate.ini

Switch SimulatorResults.csv

The Network Traffic GeneratorThe Network Traffic Generator

• A tool for generating network streams.A tool for generating network streams.• The Network Traffic Generator can be The Network Traffic Generator can be

configured to generate streams configured to generate streams representing different traffic scenarios.representing different traffic scenarios.

• Packets arrive at each of the input Packets arrive at each of the input ports at a Poisson rate determined by ports at a Poisson rate determined by the user.the user.

NTGNTG – – Destination Ports DistributionDestination Ports Distribution

• Uniform distribution - Uniformly choose Uniform distribution - Uniformly choose an output port out of all possible ports.an output port out of all possible ports.

• Single vector distribution - Choose a port Single vector distribution - Choose a port according to its ratio within a single according to its ratio within a single vector of size m (the number of output vector of size m (the number of output ports).ports).

• Multi vector distribution - Stating a Multi vector distribution - Stating a distribution vector for each input port.distribution vector for each input port.

The Switch SimulatorThe Switch Simulator

• The Switch Simulator can be loaded The Switch Simulator can be loaded with several configurations.with several configurations.

• The Switch Simulator outputs a CSV The Switch Simulator outputs a CSV format file for the report generator.format file for the report generator.

Configuring The Switch Configuring The Switch SimulatorSimulator

• A single configuration is supplied for A single configuration is supplied for the physical parameters of the switch: the physical parameters of the switch: number of input, number of output number of input, number of output ports and simulation time.ports and simulation time.

• The simulator can be loaded with The simulator can be loaded with several configurations each describing several configurations each describing a switch behavior to simulate.a switch behavior to simulate.

Configuring a Switch Configuring a Switch BehaviorBehavior

The following parameters defines a switch:The following parameters defines a switch:• Input Queuing Algorithm: FIFO, VOQ Input Queuing Algorithm: FIFO, VOQ

and Shared Memory.and Shared Memory.• Fabric Matching Algorithm : Maximum Fabric Matching Algorithm : Maximum

matching, Weighted Matching. matching, Weighted Matching. • Fabric SpeedUp.Fabric SpeedUp.• Memory Size.Memory Size.• Input Buffer percentage.Input Buffer percentage.

Virtual Output Queuing Virtual Output Queuing Buffer Buffer

Each input buffer is divided into m (the Each input buffer is divided into m (the number of output ports) logical number of output ports) logical buffers, each logical buffer is a FIFO buffers, each logical buffer is a FIFO queuequeue. .

Input port 2

Output port 1

Output port 2

Output port 3

Output port 4Accessible packets

Shared Memory BufferShared Memory Buffer

• packets in the shared memory buffer packets in the shared memory buffer can be accessed randomly in a can be accessed randomly in a manner that will serve the matching manner that will serve the matching algorithm in the best way.algorithm in the best way.

Input port 2

Output port 1

Output port 2

Output port 3

Output port 4Accessible packets

Maximum Matching Maximum Matching AlgorithmAlgorithm

Matches the maximum number of Matches the maximum number of packets possible.packets possible.

Implemented using Ford-Fulkerson’s Implemented using Ford-Fulkerson’s max flow algorithm.max flow algorithm.

Super-source

Super-target

Input portsOutput ports

Weighted Matching Weighted Matching AlgorithmAlgorithm

• Each input buffer is assigned a weight Each input buffer is assigned a weight proportionate to its occupancy.proportionate to its occupancy.

• Each output buffer is assigned a Each output buffer is assigned a weight inverse-proportionate to its weight inverse-proportionate to its occupancy.occupancy.

• Each packet is assigned a weight Each packet is assigned a weight which is the sum of the input port which is the sum of the input port weight and the output port weight.weight and the output port weight.

Weighted Matching Weighted Matching AlgorithmAlgorithm

The algorithm is greedy:The algorithm is greedy:

first, it tries to add packets with first, it tries to add packets with maximum possible weight.maximum possible weight.

than, it tries to add packets with than, it tries to add packets with

maximum possible weight – 1.maximum possible weight – 1.

……

Simulator OutputSimulator Output

The Switch Simulator creates a CSV format file The Switch Simulator creates a CSV format file with data representing simulation results:with data representing simulation results:

• A time slot based table holding all raw data A time slot based table holding all raw data of the simulation process including the of the simulation process including the state of all buffers (input and output), the state of all buffers (input and output), the total number of packets that have entered total number of packets that have entered the switch, the total number of packets the switch, the total number of packets that were lost until this time slot and the that were lost until this time slot and the number of packets transferred over the number of packets transferred over the fabric.fabric.

• A summary of packet loss percentage for A summary of packet loss percentage for each configuration.each configuration.

Simulator OutputSimulator Output

• Tables holding data of all possible Tables holding data of all possible comparisons between simulation comparisons between simulation results of the different configurations. results of the different configurations. Each table consists of two or more Each table consists of two or more configurations that differ on a single configurations that differ on a single parameter. parameter.

Report GeneratorReport Generator

All output is written in a CSV format so All output is written in a CSV format so further analysis and processing can further analysis and processing can be done with MS Excel.be done with MS Excel.

Exemplary Results

Extending The SimulatorExtending The Simulator

• The simulator was designed to be The simulator was designed to be extendible.extendible.

• The Switch Simulator module consists The Switch Simulator module consists of three main sub – modules:of three main sub – modules:

• SwitchSwitch• BuffersBuffers• Matching algorithmsMatching algorithms

Extending The SimulatorExtending The Simulator

Bu

ffer In

terfa

ces

Bu

ffer In

terfa

ces

Matching Algorithm Interface

Architecture Of The Switch Simulator Sub Modules

Switch Sub - Module

Extending The SimulatorExtending The SimulatorYou can extend the type of buffers and modules supported by the switch by designing your own buffers and matching algorithms objects and adding them to appropriate Create() global methods.

Buffer Interface CreateBuffer)(

BUFFER_TYPE

+

Parameters

Algorithm

Interface

CreateAlgorithm)(

ALG_TYPE

+

Parameters

Buffer Object

Algorithm Object

Q & AQ & A

Head Of Line Case Study

Exemplary ResultsExemplary Results

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

Pac

ket

Lo

ss

FIFO SHARED VOQ

Input Buffer Type

Fabric Matching Algorithm:MAXMATCH Speed Up:1 Memory Size:100 Input Buffer Precentage:25

Exemplary ResultsExemplary Results

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

Pa

ck

et

Lo

ss

MAXMATCH WEIGHTED

Fabric Matching Algorithm

Input Queueing Algorithm:FIFO Speed Up:1 Memory Size:100 Input Buffer Precentage:25

Exemplary ResultsExemplary Results

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

Pa

ck

et

Lo

ss

1 2 3 4

SpeedUp

Input Queueing Algorithm:FIFO Fabric Matching Algorithm:MAXMATCH Memory Size:100 Input Buffer Precentage:25

Exemplary ResultsExemplary Results

Input Queueing Algorithm:FIFO Fabric Matching Algorithm:MAXMATCH Speed Up:1 Memory Size:100

0

0.05

0.1

0.15

0.2

0.25

10 25 50 75 100

Input Buffer Percentage

Pa

ck

et

Lo

ss

Back to presentation