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Department of Electrical & Computer Engineering
COEN 212:DIGITAL SYSTEMS DESIGN I
Lecture 7: Common Combinational Logic Circuits(Adders and Multipliers)
Instructor: Dr. Reza Soleymani, Office: EV-5.125, Telephone: 848-2424 ext.: 4103.
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Department of Electrical & Computer Engineering
Lecture 7: Objectives of this lecture
β’ In this lecture, we talk about: β Adders.β Subtractors.β Multipliers and,β Magnitude Comaparators.
β’ In the next lecture, we will talk about:β Decoders, Encoders, Multiplexers
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Department of Electrical & Computer Engineering
Lecture 7: Reading for this lecture
β’ Digital Design by M. Morris R. Mano and Michael D. Ciletti, 6th Edition, Pearson, 2018:β Chapter 4 (4.5 to 4.8)
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Department of Electrical & Computer Engineering
Lecture 7:Binary Adders
β’ Binary numbers are added bit by bit. β’ To add two bits, we need a Full Adder.β’ It takes in two bits and a carry and outputs a sum and a carry:
β’ A full adder can be implemented either directly or using two half adder. A half adder has two inputs and two outputs.
Full Adder: Half Adder:
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Department of Electrical & Computer EngineeringLecture 7:Addition: HA
β’ Truth table for a half adder is:
β’ So: ππ = π΄π΄β²π΅π΅ + π΄π΄π΅π΅β² = π΄π΄β¨π΅π΅
πΆπΆ = π΄π΄π΅π΅β’ The implementation is:
π΄π΄ π΅π΅ πΆπΆ ππ0 0 0 00 1 0 11 0 0 11 1 1 0
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Department of Electrical & Computer EngineeringLecture 7:Addition: HA
β’ Half adder can also be implemented using XOR:
β’ Implementing a FA using two HAβs:
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Department of Electrical & Computer EngineeringLecture 7:Addition: FA implementation uisng HAβs
β’ Half adder can also be implemented using XOR:
ππππ = π΄π΄ππβ¨π΅π΅ππβ¨πΆπΆππβ’ Also, : πΆπΆππ+1 = π΄π΄πππ΅π΅ππ + π΄π΄πππΆπΆππ + π΅π΅πππΆπΆππ
= π΄π΄ππ π΅π΅ππ + πΆπΆππ + π΅π΅ππ π΄π΄ππ + πΆπΆππ
= π΄π΄ππ π΅π΅ππ + π΅π΅ππβ²πΆπΆππ + π΅π΅ππ π΄π΄ππ + π΄π΄ππβ²πΆπΆππ
= πΆπΆππ π΄π΄πππ΅π΅ππβ² + π΄π΄ππβ²π΅π΅ππ + π΄π΄πππ΅π΅ππ
= πΆπΆππ π΄π΄ππβ¨π΅π΅ππ + π΄π΄πππ΅π΅ππ
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Department of Electrical & Computer EngineeringLecture 7:Addition: FA direct implementation
β’ Truth Table of FA: K-map of S
ππ = π₯π₯β²π¦π¦β²π§π§ + π₯π₯β²π¦π¦π§π§π§ + π₯π₯π¦π¦β²π§π§π§ + π₯π₯π¦π¦π§π§
K-map of C
πΆπΆ = π₯π₯π¦π¦ + π₯π₯π§π§ + π¦π¦π§π§
π±π± π²π² π³π³ ππ ππ
0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1
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Department of Electrical & Computer EngineeringLecture 7:Addition: FA direct implementation
β’ The implementation for ππ
ππ = π₯π₯β²π¦π¦β²π§π§ + π₯π₯β²π¦π¦π§π§π§ + π₯π₯π¦π¦β²π§π§π§ + π₯π₯π¦π¦π§π§
β’ The implementation for πΆπΆ
πΆπΆ = π₯π₯π¦π¦ + π₯π₯π§π§ + π¦π¦π§π§
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Department of Electrical & Computer EngineeringLecture 7:Binary adders/carry propagationβ’ Four-bit adder: Delay 2m = 2 Γ 4 = 8
β’ Carry Lookahead
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Department of Electrical & Computer EngineeringLecture 7:Binary adders/carry Lookaheadβ’ Note that πΊπΊππ generates a carry when both the inputs π΄π΄ππ and π΅π΅ππ
are 1 regardless of the value of πΆπΆππ. β’ πΊπΊππ is called a carry generator.β’ ππππ decides whether a carry will propagate from stage ππ to
stage ππ + 1. It is called a carry propagator.β’ Note that ππππ and πΊπΊππ are generated from π΄π΄ππ and π΅π΅ππ in one gate
delay. β’ Now, letβs consider the example of 4-bit adder.β’ πΆπΆ0 = the input carryβ’ πΆπΆ1 = πΊπΊ0 + ππ0πΆπΆ0β’ πΆπΆ2 = πΊπΊ1 + ππ1πΆπΆ1 = πΊπΊ1 + ππ1 πΊπΊ0 + ππ0πΆπΆ0 = πΊπΊ1 + ππ1πΊπΊ0 + ππ1ππ0πΆπΆ0β’ πΆπΆ3 = πΊπΊ2 + ππ2πΆπΆ2 = πΊπΊ2 + ππ2πΊπΊ1 + ππ2ππ1πΊπΊ0 + ππ2ππ1ππ0πΆπΆ0
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Department of Electrical & Computer EngineeringLecture 7:Binary adders/carry Lookahead
β’ carry lookahead generator:
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Department of Electrical & Computer EngineeringLecture 7:Binary adders/carry Lookahead
β’ carry lookahead generator:
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Department of Electrical & Computer Engineering
Lecture 7:Subtraction:
β’ Adder/Subtractor:
β’ When ππ = 0, we get π΄π΄+π΅π΅.β’ When ππ = 1, we get A-B.β’ V=1 flags an overflow.
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Department of Electrical & Computer Engineering
Lecture 7:Subtraction: Example
β’ Example: 8-bit adder.β’ Numbers are from -127 to +127 (from 11111111 to 01111111).β’ The result may fall out of range.β’ Example: Adding +60 and +70 = 130 > 127
+60 00111100 +70 01000110
+130 10000010 β -2
β’ Subtraction +70 from -60-60 11000100-70 10111010-130 1 01111110 β +1
sign bit
overflow
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Department of Electrical & Computer Engineering
Lecture 7:BCD Adder
β’ Adding two decimal digits and a carry, we get a number between 0 and 19.
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Department of Electrical & Computer Engineering
Lecture 7:BCD Adder
β’ πΆπΆ = 1 whenever πΎπΎ = 1 or ππ8 = 1.β’ πΆπΆ = 0 when ππ8 = 1 and both ππ4 and ππ2 are zero. β’ So,
πΆπΆ = πΎπΎ + ππ8 ππ2 + ππ4 = πΎπΎ + ππ8ππ4 + ππ8ππ2β’ When πΆπΆ = 1, we need to add 6 (0110) to ππ8ππ4ππ2ππ1 to get
ππ8ππ4ππ2ππ1.
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Department of Electrical & Computer Engineering
Lecture 7:Binary multiplication
β’ πΆπΆ = 1 whenever πΎπΎ = 1 or ππ8 = 1.
β’ 2-by-2 multiplier:
multiplying π΅π΅1π΅π΅0 by π΄π΄1and shifting the result
multiplying π΅π΅1π΅π΅0 by π΄π΄0
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Department of Electrical & Computer Engineering
Lecture 7:Binary multiplication
β’ Example: 4-bit by 3-bit multiplier
π΅π΅3 π΅π΅2 π΅π΅1 π΅π΅0
π΄π΄2 π΄π΄1 π΄π΄0
π΄π΄0π΅π΅3 π΄π΄0π΅π΅2 π΄π΄0π΅π΅1 π΄π΄0π΅π΅0
π΄π΄1π΅π΅3 π΄π΄1π΅π΅2 π΄π΄1π΅π΅1 π΄π΄1π΅π΅0
π΄π΄2π΅π΅3 π΄π΄2π΅π΅2 π΄π΄2π΅π΅1 π΄π΄2π΅π΅0
πΆπΆ6 πΆπΆ5 πΆπΆ4 πΆπΆ3 πΆπΆ2 πΆπΆ1 πΆπΆ0
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Department of Electrical & Computer Engineering
Lecture 7:Magnitude Comparator
β’ It compares two numbers π΄π΄ = π΄π΄3π΄π΄2π΄π΄1π΄π΄0 and π΅π΅ = π΅π΅3π΅π΅2π΅π΅1π΅π΅0 and decides whether π΄π΄ = π΅π΅,π΄π΄ > π΅π΅ or π΄π΄ < π΅π΅.
β’ π΄π΄ = π΅π΅ if and only if π΄π΄3 = π΅π΅3,π΄π΄2 = π΅π΅2,π΄π΄1 = π΅π΅1,π΄π΄0 = π΅π΅0.β’ π΄π΄3 = π΅π΅3 if ππ3 = π΄π΄3π΅π΅3 + π΄π΄3β² π΅π΅3β² .β’ Similarly ππππ = π΄π΄πππ΅π΅ππ + π΄π΄ππβ²π΅π΅ππβ² , ππ = 0, 1, 2, 3 shows π΄π΄ππ = π΅π΅ππ.β’ So: π΄π΄ = π΅π΅ = ππ3ππ2ππ1ππ0.β’ Case of: π΄π΄ > π΅π΅: π΄π΄ > π΅π΅β’ If π΄π΄3 is equal to 1 and π΅π΅3 = 0. So, if π΄π΄3π΅π΅3β² = 1, then π΄π΄ > π΅π΅. β’ If π΄π΄3 = π΅π΅3, i.e., if ππ3 = 1 and π΄π΄2 = 1 and π΅π΅2 = 0, i.e., if ππ3π΄π΄2π΅π΅2β² = 1.β’ if ππ3ππ2π΄π΄1π΅π΅1β² = 1 or ππ3ππ2ππ1π΄π΄0π΅π΅0β² = 1.
π΄π΄ > π΅π΅ = π΄π΄3π΅π΅3β² + ππ3π΄π΄2π΅π΅2β² + ππ3ππ2π΄π΄1π΅π΅1β² + ππ3ππ2ππ1π΄π΄0π΅π΅0β²
andπ΄π΄ < π΅π΅ = π΄π΄3β² π΅π΅3 + ππ3π΄π΄2β² π΅π΅2 + ππ3ππ2π΄π΄1β² π΅π΅1 + ππ3ππ2ππ1π΄π΄0β² π΅π΅0
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Department of Electrical & Computer Engineering
Lecture 7:Magnitude Comparator
β’ 4-bit Magnitude Comparator:
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Department of Electrical & Computer Engineering
Lecture 7:Knowledge Check
β’ Question 1: To add two 8-bit numbers, the number of Half-Adders needed is:
β’ a) 8, b) 15, c) 16, d) 17β’ Question 2: If the gate delay is 10 ns (nano seconds), what
would be the delay in adding two 8 bit numbers using carry look ahead?
β’ a) 40 ns, b) 160 ns, c) 80 ns, d) 20 ns
β’ Question 3:
