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1 Codification of Flip Chip Knowledge Antonio Prats March 2002

Codification of Flip Chip Knowledge

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Codification of Flip Chip Knowledge. Antonio Prats March 2002. Objective. Facilitate practical applications of research results Design optimization Specs Materials selection Product specific process development Trouble shooting. Two Parts. Yield Prediction Software - PowerPoint PPT Presentation

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Page 1: Codification of Flip Chip Knowledge

1

Codification of Flip Chip Knowledge

Antonio Prats

March 2002

Page 2: Codification of Flip Chip Knowledge

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ObjectiveFacilitate practical applications of research results

• Design optimization• Specs• Materials selection• Product specific process development• Trouble shooting

Page 3: Codification of Flip Chip Knowledge

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Two PartsYield Prediction Software

• “Placement Yield” – in-plane variations• “Assembly Yield” – out-of-plane variations

Codification Documents• “Underfill Codification” – Materials evaluation and

underfill process design• “Reflow Encapsulant Codification” – Materials

evaluation and reflow encapsulant process design

Page 4: Codification of Flip Chip Knowledge

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Placement Yield SoftwareGoal

• Conservative estimate of defect levels associated with in-plane (primarily substrate) tolerances

Defect• A solder bump not in contact with its pad

User Input• Substrate layout, pad shapes and sizes, variations in

size and location, mask thickness, bump dimensions, machine accuracy

Page 5: Codification of Flip Chip Knowledge

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Example Pad Design Screen

Page 6: Codification of Flip Chip Knowledge

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Example Thickness Consideration Screen

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Assembly Yield SoftwareGoal

• Conservative estimate of defect levels associated with warpage, bump height variations, and solder collapse

Defect• A solder bump not in contact with its pad/paste• Solder Bridging (New for 2001)

User Input• Bump locations and variations in bump height, pad

diameters and thicknesses, paste volume, component and board warpage

Page 8: Codification of Flip Chip Knowledge

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Assembly Yield Software Screen

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Underfill Codification Manual

• Discussion of issues important to the underfill process

• Establishment of a materials knowledge base to save time during process development

• Procedures for process development

• Troubleshooting (to be expanded in 2002)

Page 10: Codification of Flip Chip Knowledge

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Table of Contents1 INTRODUCTION2 DISPENSER EVALUATION

2.1 Specific Flip Chip Issues3 MATERIALS SELECTION4 DATA BASE

4.1 Thaw4.2 Flow & 'Gel' Times4.3 Life4.4 Flow Time Optimization4.5 Fillet Thickness Dependence4.6 Cure4.7 Automatic Fillet Formation4.8 Proximity Test4.9 Bakeout Requirements4.10 Diagnostic Tests (Reference

Performance)5 MATERIALS SPECIFIC

EQUIPMENT CHARACTERIZATION

6 MATERIALS HANDLING6.1 Substrates6.2 Chips6.3 Underfill Materials

7 PRODUCT SPECIFIC PROCESS7.1 Underfill Process7.2 Bake7.3 Standoff7.4 Substrate Temperature7.5 Preferred Fillet Thickness7.6 Volumes7.7 Dispensing7.8 Final Flow Optimization7.9 Footprint & Keep Out7.10 Curing7.11 Wetting & Voiding7.12 SMT Process Integration

8 TROUBLESHOOTING9 REFERENCES

Page 11: Codification of Flip Chip Knowledge

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Typical Correlation Between Nominal Dispensed Volume and Fillet Thickness

Johnson & Matthey 8802, 3 mil Gap

0

4

8

12

16

0 2 4 6 8 10 12

Nominal Dispense Value (mg)

Fille

t Thi

ckne

ss (m

il)

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Taper Flow Experimental Setup

ClampClamp

0 mil5 mil

Page 13: Codification of Flip Chip Knowledge

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Different Dispense Patterns

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Reflow Encapsulant Codification Manual

• Discussion of issues important to assembly with reflow encapsulants, with emphasis on differences from underfill process

• Establishment of a materials knowledge base to save time during process development

• Procedures for process development

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Table of ContentsINTRODUCTIONDISPENSER EVALUATION

• Board Handling• Ease of programming, calibration (offsets)• Vision System• Pump Type• Dispense Volume Control• Uniformity and Precision• Heating• Cleaning• Technical support• Potential Alternatives: Stencil Printing

MATERIAL EVALUATION• Life• Bakeout• Dispensing

• Needle Size and Type• Volume

• Dispense Voids• Due to Substrate Features• From High Shear Rate• Absorption of Voids

• Placement• Wetting• Placement Force and Hold Time• Placement Voiding

• Reflow Soldering Window• Post Curing• Statistics

PROCESS DEVELOPMENT• Dispensing

• Repeatability of Volume/Fillet Thickness• Dispense Pattern

• Bakeout• Placement• Reflow Soldering Window• Post Curing

Page 16: Codification of Flip Chip Knowledge

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Reflow Profiles for Testing Reflow Process Window

0

50

100

150

200

250

0 60 120 180 240 300Seconds

Tem

pera

ture

(°C

)

No-Flow #1 No-Flow #2No-Flow #3 No-Flow #4No-Flow #5 No-Flow #6No-Flow #7 No-Flow #8No-Flow #9 No-Flow #10

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Some Possible Dispense Patterns

Dot Full Square

Small Square X Small Squarewith Arms

AsteriskDotDot Full SquareFull Square

Small SquareSmall Square XX Small Squarewith Arms

Small Squarewith Arms

AsteriskAsterisk

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SummaryDefect Prediction Programs

• Design optimization• Specs

Codification Documents• Equipment and materials evaluation• Rapid product specific process design• Troubleshooting