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Class Test. Batch 2013-2016 MM-15Time: 60 min Attempt any three of the following. Using a 4-bit counter with parallel load and a 4 bit adder draw a block diagram that shows how to implement the following statements x: R1 R1+R2 x‘y : R1R1+1 - PowerPoint PPT Presentation
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Class Test
Batch 2013-2016MM-15 Time: 60 minAttempt any three of the following
1. Using a 4-bit counter with parallel load and a 4 bit adder draw a block diagram that shows how to implement the following statements x: R1 R1+R2x‘y: R1 R1+1where R1 is counter with parallel load and R2 is a 4 bit register.
2. Design full adder using decoder3. List the micro-operation that transfer bits 1-8 of register A to bits 9-16 of
register B and bits 1-8 of register B to bits 9-16 of register A. Draw a block diagram of the hardware required.
4. Design a bus system for four registers of 4 bits each. The bus is to be connected with multiplexers. Show the required connection for the following transfer statement
5. A computer has the following registers PC (12 bits ), MAR (16), MBR(12) ,I(1).OPR (3) ,E (1),AC (16) and six timing signals to-t5 and one flip flop F for cycle control. Fetch cycle is performed when F=0 and execute cycle when F=1. List the micro operation and control function for the computer – When F=0– For executing XOR, SWAP (AC and memory word). Add (M M+AC)