30
E C B BC107 Rc 4 k Re R1 R2 10 k Rs 60 0 RL 4.7 k C i Co Ce VCC = 10V CRO 0 VOLTAGE SHUNT FEEDBACK AMPLIFIER PIN CONFIGURATION: SYMBOL: CIRCUIT DIAGRAM: (i) Without Feedback (ii) With Feedback 1 FUNCTION GENERATOR V in = BC107

Ckt Diagrams LAST

Embed Size (px)

Citation preview

Page 1: Ckt Diagrams LAST

E

C

B

BC107

Rc4k

Re

R1

R210k

Rs

600 RL

4.7k

Ci

Co

Ce

VCC = 10V

CRO

0

BC107

Rc4k

Re

R1

R210k

Rs

600 RL

4.7k

Ci

Co

Ce

VCC = 10V

CRO

0

Rf

68k

Cf

VOLTAGE SHUNT FEEDBACK AMPLIFIERPIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:(i) Without Feedback

(ii) With Feedback

1

FUNCTION GENERATOR

V in =

FUNCTIONGENERATOR

V in =

BC107

Page 2: Ckt Diagrams LAST

E

C

B

BC107

Rc

Re

R1

10k

R2

RS

600RL

4.7k

Ci

Co

Ce

VCC=10V

0

CRO

BC107

Rc

Re

R110k

R2

RS

600RL4.7k

Ci

Co

VCC=10V

0

CRO

CURRENT SERIES FEEDBACK AMPLIFIERPIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:

(i)Without Feedback

(ii) With Feedback

2

BC107

FUNCTIONGENERATOR

V in =

FUNCTIONGENERATOR

V in =

Page 3: Ckt Diagrams LAST

X

Without Feedback

With Feedback

3dB

3dBf1’ f1 f2 f2’

E

C

B

MODEL GRAPH:

RC PHASE SHIFT OSCILLATOR

PIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:

0

B C 1 0 7

R e

R 1

C i

1 0 u F

V C C =1 2 V

0

CROR 2

R

1 0 k

C C C

R1 0 k

R1 0 k

R c

0

C e

4 7 u F

C o

1 0 u F

3

Gain (dB) Ao

0.707Ao

Ao’

0.707Ao’

Y

Frequency (Hz)

BC107

Page 4: Ckt Diagrams LAST

E

C

B

WIEN BRIDGE OSCILLATORPIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:

B C 1 0 7 B C 1 0 7

R c 14 . 6 k R c 2

4 . 6 k

R e 14 7 k

R e 22 . 2 k

R 11 0 0 k

R 24 1 k

R 31 0 0 k

R 44 1 k

R R3 0 0 k

R

C1 n

C1 n

C 0 1

1 0 u F

C o 2

1 0 u F

C e1 0 u F

V C C =1 2 V

0

CRO

MODEL GRAPH FOR RC PHASE SHIFT AND WEIN BRIDGE OSCILLATOR:

HARTLEY OSCILLATOR

PIN CONFIGURATION: SYMBOL:

BC548

E

C

B

4

BC107

Page 5: Ckt Diagrams LAST

E

C

B

CIRCUIT DIAGRAM:

0

B C 5 4 8

R e3 9 0

R b

2 7 0 k

C

0 . 0 2 u F

C i

4 7 u F

C e

0 . 1 u F C o1 n

R F C3 0 m H

1

2

L 1

1

2

L 2

1

2

V C C =1 0 V

0

CRO

COLPITTS OSCILLATOR

PIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:

B C 1 0 7

R e2 . 2 k

R 1

1 0 0 k

V C C =1 2 V

0

CRO

R c4 7 k

R 24 7 k

C e1 0 u F

C o

1 0 u FC i

0 . 1 u F

C 1

0 . 2 u F

C 2

0 . 0 2 u F

L1 2

0

5

BC107

Page 6: Ckt Diagrams LAST

E

C

B

SL100

R1

R2 Re

L

1

2

C1nF

Ci

220uF

Ce220uF

VCC=10V

CRO

0

Co

0.1uF

MODEL GRAPH:

TUNED CLASS C AMPLIFIERPIN CONFIGURATION: SYMBOL:

CIRCUIT DIAGRAM:

6

BC107

FUNCTIONGENERATOR

V in =

Page 7: Ckt Diagrams LAST

0

CROC

0.1uF

R

MODEL GRAPH:

INTEGRATOR & DIFFERENTIATOR PIN CONFIGURATION: SYMBOL:

A K A K

1N4007CIRCUIT DIAGRAM:

(i) Integrator Without Diode

(ii) Integrator With Diode

7

Function generator

F=1KHz

Function Generator

F=1KHz

Page 8: Ckt Diagrams LAST

R

C

0.1uF

0

CRO

R

C

0.1uF

0

CROD 1 N 4 0 0 7

(i) Differentiator Without Diode

(ii) Differentiator With Diode

INTEGRATORInput waveform

Output waveform without Diode

Output waveform with Diode

8

Function Generator

F=1KHz

Function GeneratorF=1KHz

Page 9: Ckt Diagrams LAST

0

CRO

D

1 N 4 0 0 7

R

2.5K

2V

DIFFERENTIATORInput waveform

Output waveform without Diode

Output waveform with Diode

CLIPPER

PIN CONFIGURATION: SYMBOL:

A K A K

1N4007CIRCUIT DIAGRAM:

(i)Biased positive Clipper

9

Function Generator

F=1KHz

Page 10: Ckt Diagrams LAST

0

CRO

D

1 N 4 0 0 7

R

2.5K

2V

(ii) Biased negative Clipper

MODEL GRAPH:

(i)Biased positive Clipper

(ii)Biased negative Clipper

CLAMPER

PIN CONFIGURATION: SYMBOL:

A K A K

1N4007

10

Function Generator

F=1KHz

Page 11: Ckt Diagrams LAST

CIRCUIT DIAGRAM:(i) Positive Clamper

R

1KHz

FG

0

CRO

C

10uF

10KD

1N4007

(ii) Negative Clamper

R

1KHz

FG

0

CRO

C

10uF

D 10K

1N4007

MODEL GRAPH:(i)Positive Clamper

(iii) Negative Clamper

11

Page 12: Ckt Diagrams LAST

BC548 BC548

0

Rc1Rc2R1 R2

C1

1nF

C2

1nF

VCC=10V

OUTPUT OUTPUT

Vc2Vc1

ASTABLE MULTIVIBRATOR

PIN CONFIGURATION: SYMBOL:

BC548

E

C

B

CIRCUIT DIAGRAM:

12

Page 13: Ckt Diagrams LAST

t (ms)

t (ms)

t (ms)

t (ms)

Vc1(V)

Vc2(V)

VB1 (V)

VB2 (V)

OUTPUT across C1

OUTPUT across C2

OUTPUT across B1

OUTPUT across B2

MODEL GRAPH:

MONOSTABLE MULTIVIBRATORPIN CONFIGURATION: SYMBOL:

PIN CONFIGURATION: SYMBOL:

A K A K

1N400713

Page 14: Ckt Diagrams LAST

t(ms)

t(ms)

Vin(V)

Vo(V)

Trigger INPUT

OUTPUT across C

CIRCUIT DIAGRAM:

S L 1 0 0 S L 1 0 0

R e

0

R c 1 R c 2

C

C sR B

R 2

R 1

0D 1 I N 4 0 0 7

C c C d

0 . 0 0 1 u F

V C C =1 2 V

R d

Trigger I/P

MODEL GRAPH:

14

Page 15: Ckt Diagrams LAST

BISTABLE MULTIVIBRATOR

PIN CONFIGURATION: SYMBOL:

A K A K

1N4007

CIRCUIT DIAGRAM:

15

Page 16: Ckt Diagrams LAST

MODEL GRAPH:

SIMULATION EXPERIMENTS

SIMULATION OF SIMPLE SWEEP CIRCUIT

16

Page 17: Ckt Diagrams LAST

SIMULATION OF BOOTSTRAP SWEET CIRCUIT

SIMULATION OF DIFFERENTIAL AMPLIFIERSYMBOL:

Q2N2222

E

B

C

CIRCUIT DIAGRAM:(i)Common Mode

17

Page 18: Ckt Diagrams LAST

(ii) Differential Mode

SIMULATION OF BUTTERWORTH SECOND ORDER LOW PASS FILTER

SYMBOL:

7 4 1

+3

-2

V +7

V -4

O U T6

O S 11

O S 25Non-Inverting

I/P

Inverting I/P

O/P

PIN DIAGRAM:

18

Page 19: Ckt Diagrams LAST

CIRCUIT DIAGRAM:

HIGH PASS FILTER:

C 8

0 . 1 u F

V

R f

V 11 2 v

R i

C 9

0 . 1 u F

R 3

R 4

0 00

0

U 1

u A 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

0

V 3

F R E Q = 5 0 H zV A M P L = 1 0 vV O F F = 0

V 2

1 2 v

R1=R2=10KΩ and C=10nF

19

Page 20: Ckt Diagrams LAST

SIMULATIONS OF ASTABLE AND MONOSTABLE MULTIVIBRATORS

CIRCUIT DIAGRAM:(i)Astable Multivibrator

B C 5 4 8 B C 5 4 8

0

R c 1R c 2R 1 R 2

C 1

1 n F

C 2

1 n F

V C C =1 0 V

O/P O/P

Vc2Vc1

(ii) Monostable Multivibrator

S L 1 0 0 S L 1 0 0

R e

0

R c 1 R c 2

C

C sR B

R 2

R 1

0D 1 I N 4 0 0 7

C c C d

0 . 0 0 1 u F

V C C =1 2 V

R d

Trigger I/P

20

Page 21: Ckt Diagrams LAST

(iii)Bistable Multivibrator

SIMULATION OF CMOS INVERTER, NAND AND NOR GATES

(i) INVERTER

M 1

M b re a k P

M 2

M b re a k N

V 13 . 3 V

0

00

V 2

TD = 0

TF = 1 n sP W = 1 0 0 u sP E R = 2 0 0 u s

V 1 = 0

TR = 1 n s

V 2 = 3 . 3 V

Vo

21

Page 22: Ckt Diagrams LAST

(ii) NAND

(iv) NOR

22

Page 23: Ckt Diagrams LAST

SIMULATION OF ANALOG MULTIPLIER CIRUIT DIAGRAM:

D/A and A/D CONVERTERS (R-2R ladder)

23

U1-uA741

U1 = AD633J/AD

Page 24: Ckt Diagrams LAST

24