Chapter3 Diode

8/9/2019 Chapter3 Diode

1/24

EE415 VLSI Design

The Devices:

Diode

[Adapted from Rabaey’s Digital Integrated Circuits , ©2002, J. Rabaey et al.]


2/24

EE415 VLSI Design

Goal of this chapter• Present int itive nderstanding of deviceoperation

• Introd ction of !asic device e" ations

• Introd ction of #odels for #an al anal$sis

• Introd ction of #odels for SPI%E si# lation

• &nal$sis of secondar$ deep's !'#icron e(ects

• ) t re trends


3/24

EE415 VLSI Design

* tlineMotivation and GoalsSemi ond! tor "asi s#iode Str! t!re$peration% Stati model

& #epletion apa itan e & 'arrier density profiles

#iff!sion apa itan e% #ynami response

& S(it )in* speed ne+t session

Spi e model


4/24

EE415 VLSI Design

Se#icond ctor +asics Ile trons in intrinsi -p!re Sili on

% ovalently bonded to atoms% / !**led1 bet(een nei*)bors% t)ermally a tivated density ∝ e T

% move aro!nd t)e latti e, if free% leave a positively )ar*ed 3)ole’ be)ind

http:,,---.#asstech.org,cleanenerg$,solar/info,i#ages,cr$stal.gif


5/24

EE415 VLSI Design

Se#icond ctor +asics II4(o types of intrinsi arriers

% le trons -n i and )oles -p i% 5n an intrinsi -no dopin* material, n i6p i% At 7008, n i6p i is lo( -90 90 m:7

% ;se dopin* to improve ond! tivity


6/24

EE415 VLSI Design

Se#icond ctor +asics III+trinsi arriers

% Also t(o types of dopants -donors or a eptors & #onors brin* ele tron -n:type and be ome −ive ions & A eptors brin* )oles -p:type and be ome +ive ions

% S!bstantially )i*)er densities - ≥90 9< m:7% Ma ority and minority arriers

& if n==p -n:type ele trons ma ority and )oles minority & Random re ombination and t)ermal *eneration


7/24

EE415 VLSI Design

The Diode

p

n

B A SiO 2Al

Cross section of pn- junction in an IC process

P-type regiondoped -ithacceptori#p rities0!oron

N-type regiondoped -ithdonor i#p rities0phosphor s2arsenic


8/24

EE415 VLSI Design

The Diode

A

B

n

p

A

B

Al

One-dimensionalrepresentation diode symbol

The pn region isass #edto !e thin 0step orabrupt

3 nction

Di(erent concentrations ofelectrons 0and holes of the p and n 't$pe regions ca se aconcentration gradient at the!o ndar$

Si#pli ed str ct re


9/24

EE415 VLSI Design

• %oncentration Gradient ca ses electrons to difuse fro# n to p 2 and holes to di( se fro# p to n

• This prod ces i##o!ile ions in the vicinit$ of the!o ndar$

• egion at the 3 nction -ith the charged ions is calledthe depletion region or space-charge region

• %harges create electric eld that attracts the #inorit$carriers2 ca sing the# to dri t

• Dri t co nteracts difusion ca sing e" ili!ri # 0 Idri t =-Idifusion )

Depletion egion

hole diffusionelectron diffusion

p n

hole driftelectron drift


10/24

EE415 VLSI Design

Depletion egionhole diffusion

electron diffusion

p n


ChargeDensity

Distancex+

-

lectricalx!ield

x

"otent ial#

ξ

ρ

$ 2-$ %

ψ 0

&a' Current flo()

&b' Charge density)

&c' lectric field)

&d' lectrostatic potential)

• 6ero !ias conditions

• p #ore heavil$doped than n (N A >

N )

• Electric eld givesrise to potentialdi(erence in the

3 nction2 7no-n asthe built-in potential


11/24

EE415 VLSI Design

+ ilt'in Potential

8here φ T is the ther!al "oltage

Φ Φ* 2

= T

A D

i

N N

nln

'**&2, K at mV qkT T ==Φn i is the intrinsic carrier concentration for

p re Si 0 1.5 9 1 1 c# '; at ; < 2 so for

( ) mV mV ,+-

%*./)%

%*%*ln2, 2%*

%,%/

* ==Φ

0%%*0%%* +%,

+%/ ==

cm N

cm N

B A


12/24

EE415 VLSI Design

)or-ard +iashole diffusion

electron diffusion

p n


= '

• &pplied potential lo-ers the potential barrier 2 Idi( sion > I drift

• ?o!ile carriers drift thro gh the dep. region into ne tral regions

• !eco#e e#cess !inority carriers and di( se to-ards ter#inals

• ead a!o t drift and di( sion c rrents at:

• http:,,ece'---.colorado.ed ,@!art,!oo7,!oo7,chapterA,chA/1 .ht#


13/24

EE415 VLSI Design

)or-ard +ias

pn0

np0

-W1 W20

p n ( W 2 )

n-regionp-region

Lp

diffusion

Typically avoided in Digital ICs

xWn

? e

t a l c o n t a c

t t o n ' r

e g

i o n

-Wp

p (x)n

n (x)p

#inorit$ carrier concentration


14/24

EE415 VLSI Design

everse +iashole diffusion

electron diffusion

p n


' =

• &pplied potential increases the potential barrier

• Di( sion c rrent is red ced

• Diode -or7s in the reverse !ias -ith a ver$ s#all driftc rrent


15/24

EE415 VLSI Design

everse +ias

x

n p*

-$ % $ 2*

n-region p-region

pn*

diffusion

The Dominant Operation Mode

-Wp

Wn

? e

t a l c o n t a c

t t o n ' r

e g

i o n

n p*


16/24

EE415 VLSI Design

?odels for ?an al&nal$sis

V D

I D 6 I S -eV D>φT & 9.

?

–

V D

?

–

?

– V Don

I D

-a. 5deal diode model -b. @irst:order diode model

• &cc rate

• Strongl$ non'linear

• Prevents fast D% !iascalc lations

• %ond cting diodereplaced !$ voltageso rce V Don B .CV

• Good for rst order

appro i#ation


17/24

EE415 VLSI Design

T$pical Diode Para#eters

V D I D 6 I S-e V D>φT & 9

?

–

• DnBA5 c# A,sec

• DpB1 c# A,sec

• 8 nB5 µ#

• 8 pB .C µ#

• 8 AB .15 µ#

• 8 1B . ; µ#

Geo#etr$2 doping and #aterialconstants l #ped in Is

2%1%*

'&%

*

2

*

m A I valuetypical

qA I

S

W W

n D

W W

p D DS p

pn

n

n p

µ −

−−

=

+=

Di( sion coe cient#inorit$ carrier concentration


18/24

EE415 VLSI Design

Diode % rrent

Ideal diodee" ation:

V V Don 1)*≈

V V Don 1)*≈


19/24

EE415 VLSI Design

Depletion %apacitance

#!e to depletion )ar*es% # )an*es spa e )ar*e% @orms a apa itor C j

& ')ar*e mod!lated by volta*e

5deality fa tor -m depends on

!n tion *radient


20/24

EE415 VLSI Design

E" ivalent %apacitances I

BineariCe diode apa itan es% C j is a non:linear f!n tion of V D

& D)en bias )an*es t)en C j also )an*es & Eard to !se in man!al analyses

% 5nstead !se eF!ivalent apa itan e & Gives t)e same total )ar*e for a *iven V D transition

% F!ivalent depletion apa itan e & M!st be (or ed o!t for a *iven 9→ 2 transition

[ ]'%'&&

'&'&

'&'&

%2

%%*

%2**

*%2

%2

mV V V V

K

C K V V

V QV QV QC

mmm

eq

eq

D

eq

−−−−−−=

=−−=∆∆=−− φ φ φ


21/24

EE415 VLSI Design

E" ivalent %apacitances II

% F!ivalent diff!sion apa itan e & M!st be (or ed o!t for !rrents at *iven 9→ 2 transition

' eF depends on pro ess onstants and H 9, 2I% +ample

& for AD60.< µm 2 C j0 62 f@>µm 2, φ0 60. K and m60.<t)en e! ≈0. 22 and ' e! ≈9.2K f@>µm 2 if s(it )ed bet(een 0 and :2.< So !nit apa itan e C j ≈ 0.L f@>µm 2 or C j ≈ 0.K< f@ for t)e total diode area

%2

%2

%2

%2 '&'&'&'&

V V

V C V C

V V

V I V I

V

QC d d T

D DT

D

eq

−

−=−

−=∆

∆= φ τ


22/24

EE415 VLSI Design

Secondar$ E(ects:+rea7do-n

&2


23/24

EE415 VLSI Design

Diode SPI%E ?odel

ID

3 S

CD

+

-

# D

ReF!ired for ir !it sim!lations% M!st apt!re important )ara teristi s b!t also remain effi ient% +tra parameter in t)e model n -emission oeffi ient, 9 ≤ n< 2

& @i+es non:ideal be)avior d!e to bro en ass!mptions

Additional series resistan e a o!nts for body? onta tOonlinear apa itan e in l!des bot) C D and C j

I D = I S (eV D / nφ T −1)


24/24

EE415 VLSI Design

SPI%E Para#eters$ften s!pplied by t)e fab to t)e desi*ner % 5f not m!st be meas!red and fit t)e parameters

Ass!mes defa!lt val!es, if not e+pli itly definedPay attention to t)e !nits and spellin*

Documents

Chapter3 Diode