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8.1 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Chapter 8: Memory Management
8.4 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Background
Program must be brought (from disk) into memory and placed within a process for it to be run
Main memory and registers are only storage CPU can access directly
Register access in one CPU clock (or less)
Main memory can take many cycles
Cache sits between main memory and CPU registers
8.5 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Base and Limit Registers
A pair of base and limit registers define the logical address space.
8.6 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8th Edition
Hardware Address Protection with Base and Limit Registers
8.7 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8th Edition
Address Binding Inconvenient to have first user process physical address always at 0000
How can it not be? Further, addresses represented in different ways at different stages of a program’s life
Source code addresses usually symbolic Compiled code addresses bind to relocatable addresses
i.e. “14 bytes from beginning of this module” Linker or loader will bind relocatable addresses to absolute addresses
i.e. 74014 Each binding maps one address space to another
8.6 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Binding of Instructions and Data to Memory
Address binding of instructions and data to memory addresses canhappen at three different stages
Compile time: If memory location known a priori, absolute codecan be generated; must recompile code if starting location changesLoad time: Must generate relocatable code if memory location is not known at compile timeExecution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers)
8.8 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Logical vs. Physical Address Space
The concept of a logical address space that is bound to a separate physical address space is central to proper memory management.
Logical address – generated by the CPU; also referred to as virtual addressPhysical address – address seen by the memory unit
Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme.
8.9 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Memory-Management Unit (MMU)
Hardware device that maps virtual to physical address
In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory.
The user program deals with logical addresses; it never sees the realphysical addresses.
8.10 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Dynamic Relocation Using a Relocation Register
ANIMATION:http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/relocation.htm
8.11 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Dynamic Loading
Routine is not loaded until it is called
Better memory-space utilization; unused routine is never loaded
Useful when large amounts of code are needed to handle infrequently occurring cases
No special support from the operating system is required implemented through program design
8.12 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Dynamic Linking
Operating system needed to check if routine is in processes’ memory address
Dynamic linking is particularly useful for libraries
System also known as shared libraries
Static linking – system libraries and program code combined by the loader into the binary program image
Dynamic Linking: linking postponed until execution time
8.13 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Swapping
A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution
Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to thesememory images
Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed
Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped
Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and Windows)
System maintains a ready queue of ready-to-run processes which have memory images on disk
8.14 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Schematic View of Swapping
8.15 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Contiguous Allocation
Main memory usually into two partitions:Resident operating system, usually held in low memory with interrupt vectorUser processes then held in high memory
Relocation registers used to protect user processes from each other, and from changing operating-system code and data
Base register contains value of smallest physical addressLimit register contains range of logical addresses – each logical address must be less than the limit register MMU maps logical address dynamically
8.16 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Hardware Support for Relocationand Limit Registers
8.17 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Contiguous Allocation (Cont.)
Multiple-partition allocationHole – block of available memory; holes of various size are scattered throughout memoryWhen a process arrives, it is allocated memory from a hole largeenough to accommodate itOperating system maintains information about:a) allocated partitions b) free partitions (hole)
OS
process 5
process 8
process 2
OS
process 5
process 2
OS
process 5
process 2
OS
process 5
process 9
process 2
process 9
process 10
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/multiplepartcma.htm
8.18 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Dynamic Storage-Allocation Problem
First-fit: Allocate the first hole that is big enough
Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size
Produces the smallest leftover hole
Worst-fit: Allocate the largest hole; must also search entire list Produces the largest leftover hole
How to satisfy a request of size n from a list of free holes
First-fit and best-fit better than worst-fit in terms of speed and storage utilization
8.19 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
For example,
suppose a process
requests 12KB of
memory and the
memory manager
currently has a list of
unallocated blocks of
6KB, 14KB, 19KB,
11KB, and 13KB
blocks.
Dynamic Storage-Allocation Problem
8.1 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Dynamic Storage-Allocation Problem
Example:
8.19 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Fragmentation
External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous
Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used
Reduce external fragmentation by compactionShuffle memory contents to place all free memory together in onelarge block
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/compaction.htm
8.21 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Fragmentation
8.44 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Segmentation
Memory-management scheme that supports user view of memory
A program is a collection of segmentsA segment is a logical unit such as:
main programprocedure functionmethodobjectlocal variables, global variablescommon blockstacksymbol tablearrays
8.45 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
User’s View of a Program
8.46 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Logical View of Segmentation
1
3
2
4
1
4
2
3
user space physical memory space
8.47 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Segmentation Architecture
Segment table – maps two-dimensional physical addresses; each table entry has:
base – contains the starting physical address where the segments reside in memorylimit – specifies the length of the segment
8.49 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Segmentation HardwareA logical address consists of two parts: a segment number, s, and an offset into that segment, d.
The segment number is used as an index to the segment table. The offset d of the logical address must be between 0 and the segment limit.
8.1 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Segmentation Hardware
Animation:
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/segmentation.htm
8.50 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Example of Segmentation
8.1 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Example of Segmentation
Example:
8.20 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging
Logical address space of a process can be noncontiguous; processis allocated physical memory whenever the latter is available
Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes)
Divide logical memory into blocks of same size called pages
Keep track of all free frames
To run a program of size n pages, need to find n free frames and load program
Set up a page table to translate logical to physical addresses
Internal fragmentation
8.21 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Address Translation Scheme
Address generated by CPU is divided into:Page number (p) – used as an index into a page table which contains base address of each page in physical memoryPage offset (d) – combined with base address to define the physical memory address that is sent to the memory unit
For given logical address space 2m and page size 2n
page number page offset
p d
m - n n
8.22 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging Hardware
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/paginghardware.htm
8.23 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging Model of Logical and Physical Memory
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/pagingmodel.htm
8.24 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging Example
32-byte memory and 4-byte pages
8.29 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8th Edition
Paging (Cont.) Calculating internal fragmentation
Page size = 2,048 bytes Process size = 72,766 bytes 35 pages + 1,086 bytes Internal fragmentation of 2,048 - 1,086 = 962 bytes
8.1 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging Example
Example:
8.31 Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8th Edition
Implementation of Page Table
Page table is kept in main memory
In this scheme every data/instruction access requires two memory accesses One for the page table and one for the data / instruction
The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs)
TLBs typically small (64 to 1,024 entries)
On a TLB miss, value is loaded into the TLB for faster access next time
8.28 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Paging Hardware With TLB
http://cs.uttyler.edu/Faculty/Rainwater/COSC3355/Animations/pagingtlb.htm
8.30 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Memory Protection
Memory protection implemented by associating protection bit witheach frame
Valid-invalid bit attached to each entry in the page table:“valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page“invalid” indicates that the page is not in the process’ logical address space
8.31 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Valid (v) or Invalid (i) Bit In A Page Table
8.32 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Shared Pages
Shared codeOne copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).Shared code must appear in same location in the logical address space of all processes.
Private code and dataEach process keeps a separate copy of the code and data.The pages for the private code and data can appear anywhere in the logical address space.
8.33 Silberschatz, Galvin and Gagne ©2009Operating System Concepts with Java – 8th Edition
Shared Pages Example