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CHAPTER 6

BRIDGELESS PFC CUK CONVERTER FED PMBLDC

MOTOR

6.1 GENERAL

The line current drawn by the conventional diode rectifier filter

capacitor is peaked pulse current. This results in utility line distortion. With

the ever increasing demand for power quality for utility, power factor

correction has become a basic requirement in switching power supply. High

quality converters are used to interface the AC line and DC load to make the

load appear resistive, so as to achieve the unity power factor even in the

presence of distorted line voltage. The most popular topology is the boost

topology, since it is simple from the point of view of both power and control.

However, there are limitations like a greater output voltage than the peak

input voltage, implementation difficulty in the case of high-frequency

insulation, lack of current insulation in the start-up and overload conditions,

and the requirement of complex control devices. Ripple currents are limited

only by the inductor size. Since the boost converter is operated in the CCM,

the inductor required is large. This will, in turn, increase crossover distortion.

The boost converter is in the DCM, and it also acts as an automatic current

wave shaper. This however, requires high conversion gain to reduce

distortion. As the ripple currents in the DCM are high, line harmonics have to

be filtered, and to overcome them, the Cuk converter is preferred.

The most popular PFC converter topology is boost topology, as it is

simple from the point of view of both power and control. Since they have

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limitations like a greater output voltage than the peak input voltage, difficulty

in the implementation of high-frequency insulation, lack of current insulation

during the start-up and overload conditions, to overcome them the Cuk

converter is preferred. For the PMBLDC drive, a Cuk DC-DC converter is

proposed as a PFC converter, since it has continuous input and output

currents, a wide output voltage range and a small output filter. Apart from

improving the power quality in the AC mains, the Cuk converter also controls

the voltage at the DC link for achieving the desired speed of the PMBLDC

motor.

In boost converters ripples can be reduced only by reducing the

inductor size. Since the boost converter operates in a continuous conduction

mode (CCM), the inductor required is larger in size, which in turn, increases

crossover distortion. In the Cuk converter, the input current ripples can be

reduced by inductor coupling. The Cuk converter can also step up or step

down voltage depending on the switching duty cycle. The main difference

between the two is that, because of the series inductors at both the input and

output, the Cuk converter has a much lower current ripple. By careful

adjustment of the inductor values, these ripples can also be nullified either in

the input or the output. These converters operate in the DCM, even with a

simple control. The unity power factor can be achieved without any duty-

cycle modulation. While the DCM is suited for low-power applications, the

CCM is preferred for medium and high- power applications.

An adjustable speed controlled VSI fed PMBLDC motor is

presented in this Chapter; the speed control is based on the digital simulation

of a Bridgeless Power Factor Correction (BLPFC) Cuk converter. A single-

phase AC-DC converter topology based on the Cuk converter is employed for

the PFC, which ensures near unity power factor over wide speed ranges. The

proposed speed control scheme is based on the concept of DC link voltage

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control being proportional to the desired speed of the PMBLDC motor, and

the speed being regulated by a PI controller. The PFC converter based

PMBLDC motor drive is designed, modeled and simulated using the

MATLAB- Simulink environment. The merits of the proposed power

converter include the unity power factor, less harmonic content, less

switching loss, simpler control stage, higher power density and unidirectional

power flow. This drive ensures high accuracy and robust operation from near

zero to high speed.

6.2 PRINCIPLE OF THE BRIDGELESS CUK CONVERTER

TOPOLOGY

The conventional PFC Cuk converter is shown in Figure 6.1. It

shows the current flowing through the two rectifier diodes, the power switch

S during the switch turn-on period, and flows through the other two rectifier

bridge diodes, and the output diode D0 during the switch turn-off period.

Thus, for each switching cycle three semiconductor devices conduct the

current. Though this arrangement is suitable for low power applications, high

conduction losses reduce the system efficiency, when used for high power

applications. This necessitates having a bridge rectifier with a higher current

handling capacity, but it will ultimately increase the size and cost of the

power supply.

Figure 6.1 Conventional Cuk Topology

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To maximize power supply efficiency, many studies have been

done leading to the development of efficient bridgeless PFC circuit

topologies. The bridgeless PFC circuit allows the current to flow through a

minimum number of switching devices compared to the conventional PFC

circuit, thus minimizing the conduction losses and improving efficiency.

Nevertheless, BLPFC is characteristic of a small number of power switches,

making room for low power loss. Additionally, in the conventional active

PFC, the power switches are in the on and off states in a whole mains period.

They have to endure high voltage and current stresses, resulting in huge

switching and conduction losses, limiting their efficiency. However, the

bridgeless PFC boost rectifier has a significantly larger common-mode noise

than the conventional PFC boost rectifier. The bridgeless topologies of the

Cuk converter shown in Figure 6.2 have been proposed, to overcome the

drawbacks of the bridgeless PFC boost rectifiers, but they require an isolated

gate-drive.

Figure 6.2 Bridgeless Cuk Converter topology

This topology offers several advantages in PFC applications, like

easy implementation of transformer isolation, inherent inrush current

limitations during start-up and overload condition, lower input current ripple,

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and less electromagnetic interference associated with the DCM topology. It

can be seen from a scrutiny of Figure 6.2, that there are one or two

semiconductors in the current path, reducing the conduction losses as well

thermal stresses on the switching devices. The supply line is always

connected to the output ground, through the slow-recovery diodes Dn and Dp.

Thus, the proposed bridgeless topology does not suffer from the high

common-mode EMI noise emission problems. The bridgeless Cuk converter

uses two power switches S1 and S2, two low-recovery diodes Dp and Dn, and

a fast diode Do. The control circuitry is a simplified one, since the two power

switches are driven using the same control signal. The presence of the third

inductor in the bridgeless topology is often regarded as a disadvantage in

terms of size and cost. However, the three inductors can be coupled on to the

same magnetic core to reduce the size and cost of the proposed topology.

Since each power switch in the bridgeless Cuk converter operates during the

half line period, the stress on the switches is reduced.

The main applications of the Cuk converter are in the regulated

power supplies, where a negative polarity output may be desired, with respect

to the common terminals of the input voltage, and where the average output is

either higher or lower than the DC input voltage. The Cuk converter has been

designed for a PMBLDC motor, considering an improved power factor, speed

control, and allowable ripple in DC link voltage. The proposed bridgeless

PFC Cuk converter has been designed for the closed loop control and power

factor improvement in a PMBLDC drive. The DC link voltage of the PFC

converter is as follows:

1o acDV V

D (6.1)

Vac is the diode bridge rectifier output for a given AC input voltage (Vs).

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Vac and Vs are related as

2 2 sac

VV (6.2)

A ripple filter has been designed for ripple free voltage at the DC

link of the Cuk converter. The inductor (L3 ) of the ripple filter restricts the

inductor peak to peak ripple current ( iL3) within specified limits, for a

switching frequency of (fs). The capacitance C0 is placed for the allowed

ripple in the DC link voltage (V0).

The ripple filter inductance and capacitance are given as

33

(1 )( )

dc

s

D VLf iL

(6.3)

30

02iLC

V (6.4)

The PFC Cuk converter is designed for a supply voltage of 230V,

L3 = .5mH, Co = 2200µF.

6.3 SIMULATION RESULTS

The technical specifications of the drive system are as follows:

C= 2200 µF.TON= 5.88 µsecs. TOFF= 5.88µsecs.T= 11.76 µsecs.

Stator Resistance is 2.875 ohms, Stator Inductance is 8.5mH, and the Motor

inertia is 0.8mJ.

Based on the designed circuit parameters, the MATLAB simulation

was done and the results are presented here; speed was set at 1800 rpm and

the load torque disturbances are applied at time t=1 sec. The speed

regulations obtained at this speed and the simulation results are shown.

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6.3.1 PMBLDC Motor fed from a Bridgeless PFC Cuk converter

The MATLAB simulation of the PFC bridgeless Cuk converter fed

PMBLDC motor has been carried out, and the simulation results are

presented. Figure 6.3 shows the Simulink model of a bridgeless Cuk

Converter. The Simulink model of a closed loop controlled PMBLDC drive

with a bridgeless PFC Cuk converter and a PI controller, is shown in

Figure 6.4. A bridgeless PFC Cuk converter was used at the input to improve

the power factor. The AC input voltage and the current waveforms of the

closed loop controlled PMBLDC drive, fed from a bridgeless PFC Cuk

converter are shown in Figure 6.5.

Figure 6.3 Bridgeless Cuk Converter Circuit

Figure 6.4 Closed Loop Speed Control of the PMBLDC Motor with the Bridgeless PFC Cuk Converter

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Figure 6.5 Input voltage and current waveforms

It can be seen from a scrutiny of the figure, that the phase

difference between the input voltage and current is reduced. Hence, the power

factor improves by the use of a bridgeless Cuk converter as the PFC converter

for a PMBLDC drive, and the power factor has been found to be higher than

that of a PFC Zeta converter fed PMBLDC motor.

The switching pulses for the bridgeless Cuk Converter are shown in

Figure 6.6. The step change, which is applied at t=1 sec of load torque, is

shown in Figure 6.7.

Figure 6.6 Switching pulses for the bridgeless Cuk Converter

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The ripples in the torque are due to the current ripples produced by

switching. It is not possible to generate ideal rectangular currents, due to the

time delay introduced in machine inductance. Hence, the shape of the current

becomes more or less trapezoidal and produces a large commutation-torque

ripple, which might be around 10% of the rated torque. Further, the induced

emfs are not exactly trapezoidal, because of significant slot harmonics. They,

in turn, will also generate harmonic torque ripples, as can be seen in

Figure 6.7. The rotor stands still at time zero. The speed then settles at a rated

800 rpm even before 0.4sec, as it could be seen from Figure 6.8.

Figure 6.7 Step Change in load torque applied at t=1 sec

Figure 6.8 Speed Response

The FFT analysis presented in Figure 6.9 shows, that the THD is

only 0.73 % when a bridgeless Cuk converter is used as the PFC converter in

a PMBLDC drive.

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Figure 6.9 FFT Analysis of the source current

A scrutiny of Figure 6.8 will show that the closed loop system

brings the motor to its normal speed and it remains constant even after

disturbances in the load torque.

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6.4 EXPERIMENTAL RESULTS

A bridgeless Cuk converter fed BLDC motor was fabricated and

tested. The hardware consists of a power circuit, a control circuit and a

PMBLDC motor. The experimental setup is shown in Figure 6.10. The Cuk

converter board is shown separately in Figure 6.11. The Inverter and BLDC

driver board are shown in Figure 6.12. The Input voltage and current

waveforms are shown in Figure 6.13. The Harmonic Spectrum of source

voltage is shown in Figure 6.14.

The technical specifications of the drive system are as follows Cin=

2200 microfarad. Input voltage is 48V, Bridgeless boost converter output is

58V .Diode IN4007, Microcontroller AT89C2051, MOSFET IRF840, Driver

IR2110, Voltage (0-500V) and Current 8A are used.

Figure 6.10 Experimental setup

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Figure 6.11 Bridgeless Cuk converter board

Figure 6.12 Inverter and BLDC drive board

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Figure 6.13 Input Voltage and input current waveforms

Figure 6.14 Harmonic Spectrum of source voltage

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6.5 CONCLUSION

The switching frequency harmonics are found to be greatly

reduced, by coupling the two inductors,enabling the Cuk converter to behave

as an automatic current waveshaper with no current control. The lag effect in

the input current at zero crossing is negligible as the inductance used is much

smaller in the case of the DCM. Isolation can be made by introducing high-

frequency transformer isolation. The transformer and the two inductors can

be integrated into one magnetic structure. By this arrangement, both the

output and input ripples can be transferred to the transformer, where the AC

ripple inherently exists as the magnetising current of the transformer.

A PFC Cuk converter based PMBLDC drive was simulated, using

the Matlab Simulink environment. Feedback signals from the PMBLDC

motor representing speed and position were utilized, to get the driving signals

for the inverter switches through a PI controller. It has been found that the

power factor has improved with the use of the Cuk converter. The efficiency

has increased due to the increase in the power factor. The PFC feature of the

Cuk converter has ensured the power factor close to unity. The Cuk

Converter fed PMBLDC motor is preferred to the other systems, because of

the improved power factor.