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Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n- channel MOSFET The gate is insulated from the substrate or body using an oxide layer device characteristics depend on L, W, the doping level, and the thickness of the oxide layer. Gate used to be made of Al but now mostly it is made of highly doped polysilicon. Very recently, we have transitioned back to metal gates to lower the gate resistance. Major difference with BJT – there is no dc gate current. Thus power dissipation is much less.

Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

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Page 1: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Chapter 5: Field Effect Transistor

5.1 NMOS Transistors

Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET

The gate is insulated from the substrate or body using an oxide layer device characteristics depend on L, W, the doping level, and the thickness of the oxide layer.

Gate used to be made of Al but now mostly it is made of highly doped polysilicon. Very recently, we have transitioned back to metal gates to lower the gate resistance.

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Major difference with BJT – there is no dc gate current. Thus power dissipation is much less.

Page 2: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Operation in the Cutoff Region

For VGS = 0 there are two back to back p-n junctions. One is at the drain body and the other is at the source body. The reverse biased p-n junction results in zero drain current.

This is called the cutoff region of operation.

This situation persists until VGS reaches a threshold voltage, Vt0.

Notice also that the body is shorted to the source. Thus the device is a three terminal device.

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Note that the BJT and MOSFET are both back-to-back p-n diodes, so that no current flows when there is no gate bias. However, the switching on part is different for each of them – one uses a contact to the gate to allow electrons to go to the base (BJT), while the other uses field effect to flip the carrier type in the base to produce conduction (MOSFET).

Page 3: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Operation in the Triode Region

For VGS > Vt0, the electric field resulting from the gate voltage repels holes from the region under the gate, but attracts

electrons, which can now flow easily between two n-type contacts (drain and source).

This phenomenon manifests itself as an n-type channel between the drain and the source (thus the name n-MOS).

Thus when positive VDS is applied current flows into the drain, through the channel, and out of the source.

For small values of VDS the drain current, iD is proportional to VDS. iD is also proportional to VGS – Vt0. This called the

Triode Region. 3

Page 4: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Operation in the Triode Region contd.

In the triode region, the NMOS device behaves as a resistor connected between the source and the drain. The

resistance decreases as VGS increases. Thus, FETs are sometimes used as voltage controlled resistors.

For instance, for an amplifier, in which the gain depends on a certain resistance value we can control the gain by using

a FET. The FET will provide variable resistance and hence can be used for automatic gain control (AGC).

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Page 5: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Operation in the Saturation Region

As VDS continues to increase the uniform channel starts to taper off in the direction of the drain. This is due to increase in

electric field in that region. The consequence is higher channel resistance and an almost constant drain current after the V DS

becomes larger than VGS - Vt0 . This region is called the saturation region of the NMOS.

In summary:

For VDS < VGS-Vt0 Triode region

For VDS ≥ VGS-Vt0 Saturation region

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Page 6: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Expression of drain current in the Triode Region

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Page 7: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Operation in the Saturation Region

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Fig. 5.6 Characteristic curves for an NMOS transistor

Since at the boundary VDS = VGS–Vt0, we have the drain current given as

)7.5(2DSD VKi

Note that the different characteristics are a function of voltage, not current, unlike BJTs

Page 8: Chapter 5: Field Effect Transistor 5.1 NMOS Transistors Figure 5.2 Circuit symbol for an enhancement mode n-channel MOSFET The gate is insulated from the

Example 5.1

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