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CHAPTER 2
PROPOSED I-
DETECTION ALGORITHMS FOR THREE
PHASE SHUNT ACTIVE POWER FILTER
2.1 INTRODUCTION
Nonlinear loads draw currents that are non-sinusoidal create
voltage drop in distribution conductors. Typical nonlinear loads include
rectifiers, variable speed drives, any other loads based on solid state
conversion. These nonlinear loads will absorb reactive power from the source
thereby distorting the source current waveform. The distorted source current
will affect the power quality. Harmonic distortion is the production of
harmonic frequencies by an electronic system when a signal is applied at the
input and it is measured in terms of Total Harmonic Distortion (THD) which
is a measure of power quality (Filipski et al 1994). Additional losses in the
electrical distribution systems are caused by the harmonic currents. The Shunt
Active Power filter (SAPF) is used as one of the remedies for the undesired
characteristic of nonlinear loads which cause the problems due to harmonics
(Riyadi et al 2007). The I-COS
proposed for the SAPF to reduce THD of the source current.
20
2.2 SCHEMATIC DIAGRAM OF SHUNT ACTIVE POWER
FILTER
The configuration of Shunt Active Power Filter fixed in the
distribution network at the point of common coupling through filter
inductance is shown in Figure 2.1. Dai et al (2001) and Cirrincione et al
(2009) had focused on the analysis of single phase SAPF. The nonlinear load
current will have fundamental component and harmonic current
components, which is represented as given in equation (2.1)
(2.1)
If the shunt active power filter provides the total reactive and
harmonic power, source current is(t) will be in phase with the utility voltage
and would be sinusoidal. At this time, the active power filter must provide the
compensation current, = Therefore, the active power filter
estimates the fundamental component of the load current and compensates the
harmonic current and reactive power.
Figure 2.1 Configuration of shunt active power filter with nonlinear load
21
The active power filter estimates the fundamental component of the
load current and compensates the harmonic current and reactive power.
2.3 IMPORTANCE OF MULTILEVEL INVERTER
The Multilevel Inverter (Rodriguez et al 2002) is used for high
power energy conversion. It does not need a coupling transformer to interface
it with high power system. The advantages of the Multilevel Inverter will
enable the circuit to operate with less output voltage harmonics and less
electromagnetic interference (Du et al 2004).
Multilevel Inverter with advanced control technique was introduced
by Brendan Peter McGrath & Donald Grahame Holmes (2002) for medium
and high power applications. Compared with the traditional two level voltage
source inverter, the Multilevel Inverter has the advantages of smaller output
voltage step, lower harmonic components, more electromagnetic
compatibility and lower switching losses. Multilevel inverters are the most
modern technology for medium to high voltage range which includes motor
drives, power distribution, power quality and power conditioning applications
(Vassillios et al 2008; Wenxi Yao et al 2008; Buso et al 1998; Wang & Chen
2004).
Ehagwat & Stefanovic (1983) and Tolbert et al (1998) had applied
Multilevel Inverter for the application of reduction of harmonics. The
Multilevel Inverter has a multiple of the usual six switches found in a three
phase inverter to synthesize a sinusoidal voltage from several levels of
voltages, typically obtained from the capacitor voltage sources. The main
motivation for such converters is that, the current is shared among these
multiple switches, allowing a high converter power rating than the individual
switch VA rating. As the number of level increases, the synthesized output
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waveform approaches a desired waveform with decreasing harmonic
distortion, approaching zero.
2.3.1 Classification of Multilevel Inverter
The Multilevel Inverters are classified according to the
configuration (Wang Liqiao et al 2004). The various types of Multilevel
Inverters are as follows:
Diode clamped inverter,
Flying capacitor
Cascaded H-bridge inverter.
Among the inverter topologies, the flying capacitor inverter is
difficult to be realized as each capacitor must be charged with different
voltages as the voltage level increases. Moreover, the Clamped inverter, also
known as a neutral clamped converter is difficult to be expanded to
multilevel, due to the natural problem of the DC link voltage unbalancing.
Table 2.1 shows the of power component requirements per phase
leg among three Multilevel Inverters where m is the number of levels over
one cycle. Ahmed et al (2007) and Ebrahim & Babaei (2008) discussed
cascaded multilevel Inverter which requires less number of components, that
makes cascaded multi level inverter more suitable than the others. As the
number of levels increase, the THD in the output voltage of inverter is
reduced accordingly but considering the complexity in control, packaging
problems of much high level inverters, a seven level inverter is chosen for the
present research.
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Table 2.1 Components for different configurations of multilevel inverter
Inverter Configuration
Diode-Clamped Multilevel Inverter
Flying Capacitors Multilevel Inverter
Cascaded Inverters Multilevel
Inverter
Switching devices 2(m-1) 2(m-1) 2(m-1)
Diodes 2(m-1) 2(m-1) 2(m-1)
Clamping diodes (m-1)(m-2) 0 0
DC bus capacitors (m-1) (m-1) (m-1)/2
Balancing capacitors 0 (m-1)(m-2)/2 0
The components required by the cascaded multilevel inverter for
particular level is less than other configurations. Hence the small size, low
cost and simple control circuit of cascade MLI are the attractive features.
2.3.1.1 Proposed Power Circuit of Seven Level Cascaded H Bridge
Multilevel Inverter for Shunt Active Power Filter
A Cascaded Multilevel Inverter consists of series of H-bridge
(single-phase full bridge) inverters, each with their own isolated DC bus. This
multilevel inverter generates output voltage almost sinusoidal waveform from
several separate DC sources. The individual source supply may be obtained
from solar cells, fuel cells, batteries and ultra-capacitors. This Multilevel
Inverter does not need any transformer or clamping diodes or flying
capacitors. Each level can generate three different voltage outputs +Vdc, 0 and
-Vdc by connecting the DC sources to the AC output side. The output voltage
of m-level inverter is the sum of all the individual inverter outputs. Each of
the H-
each H-bridge unit generates a quasi-square waveform by phase shifting its
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h switching
device always conducts for 180o regardless of the pulse width so that the
switching method results in equalizing the current stress in each active device.
This inverter is suitable for high voltage and high power inversion because of
its ability to synthesize waveforms with better harmonic spectrum and low
switching frequency (Vlviita & Ovaska 1998).
Fang Zheng Peng et al (1996) dealt with separate DC sources for
Multilevel Inverter for Static VAR Generation. The Cascaded H-bridge
inverter (Roozbeh Naderi & Abdolreza Rahmati 2008) has separate DC
sources. The modularized circuit layout and package are possible. The
problem of the DC link voltage unbalancing does not occur, thus easily
expanding to any level. Due to these advantages, the cascaded inverter bridge
has been widely applied to such applications as High Voltage DC
transmission, Static VAR Compensator, stabilizer, high power motor drive.
The following are the advantages of cascaded multilevel inverter:
Known to eliminate the excessively large number of bulky
transformers required by the multi-phase inverters, clamping
diodes required by the diode clamped Multilevel Inverters
and capacitors required by the flying capacitor Multilevel
Inverters.
Simple and modular configuration.
Flexibility in extending to higher number of levels without
undue increase in circuit complexity, simplified fault
finding, repair facilities and packaging.
Allows optimized cyclic use of power devices to ensure
symmetrical utilization, symmetrical thermal problems and
wear.
25
Overall improvement in inverter performance and high
quality output voltage (Hossein Iman-Eini et al 2008).
Figure 2.2 Power circuit of seven level cascaded H bridge inverter
Three single phase units of seven level inverter has been
constructed and grounded separately for ease of control. Figure 2.2 shows the
power circuit of a seven level cascaded inverter composed of three full bridge
inverters connected in series on each phase. These three units collectively
form a three phase three wire shunt active power filter (Simone Buso et al
1998 and Shuai Lu et al 2007).
2.4 PROPOSED CONFIGURATION OF SHUNT ACTIVE
POWER FILTER WITH MULTILEVEL INVERTER
Shunt Active Power Filter acts as a current source adding equal but
opposite harmonic and quadrature components of load current at the point of
common coupling. In effect, the system views nonlinear load together with
active power filter as an ideal resistor. Three phase SAPF system
26
(Rahmani et al 2006) is connected in the distribution network at the point of
common coupling through filter inductances and operates in closed loop.
Figure 2.3 illustrates the proposed configuration of shunt active power filter
with multilevel inverter. The nonlinear load is connected to the three phase
source.
Figure 2.3 Proposed configuration of SAPF with multilevel inverter
2.5 ANALYSIS OF UNCOMPENSATED THREE PHASE SYSTEM
The three phase supply system feeding nonlinear load is analysed
through simulation. The analysis is carried out with balanced as well as
unbalanced loads to evaluate the performance of the system without
compensation.
2.5.1 Simulation results of uncompensated three phase system with balanced load condition
The three phase balanced load is connected in the proposed three
phase system. The proposed system is simulated to analyse the performance
and quality of the power. The source voltage and source current before
compensation are shown in Figures 2.4 and 2.5 respectively.
27
Figure 2.4 Source voltage of three phase system
Figure 2.5 Source current of the three phase system before compensation with balanced load condition
The source voltage waveform is pure sinusoidal waveform, but the
current is distorted due to the switching action of the nonlinear load. The
harmonic profile of the source current before compensation and its power
factor are shown in Figures 2.6 and 2.7. The current drawn from the source is
a quasi-square waveform having total harmonic distortion of 28.97% and
power factor is measured as 0.7257 lagging. The THD measured is
significantly above the allowable limit which affects the performance of the
equipment connected to the supply system.
28
Figure 2.6 Harmonic profile of source current in uncompensated system with balanced load condition
Figure 2.7 Power factor of the three phase system before compensation with balanced load condition
2.5.2 Simulation results of uncompensated three phase system with
unbalanced load condition
In general the loads connected to three phase supply system are
unbalanced because of fluctuations in the connected load. Hence, it is
necessary to evaluate the performance of the system under unbalanced load
conditions before and after compensation.
29
The three phase system is simulated in MATLAB/SIMULINK with
unbalanced load conditions. The three phase diode rectifier with RL load
connected in one phase will act as the nonlinear load and resistive load is
connected to the other phases. Unbalances is created in three phase load by
altering the load impedance of any one or two phases. The current drawn by
the three phase nonlinear load is a quasi-square waveform as shown in Figure
2.8 and its harmonic spectrum is also shown in Figure 2.9. From the harmonic
spectrum, the total harmonic distortion is measured as 29.35%
Figure 2.8 Source current before compensation with unbalanced load condition
Figure 2.9 Harmonic profile of source current in uncompensated system with unbalanced load condition
30
Figure 2.10 Power factor before compensation with unbalanced load condition
The source current and voltage relationship before compensation
and the power factor is measured as 0.6932 lagging is illustrated in
Figure 2.10
2.6 NEW TIME DOMAIN APPROACHES FOR THE DESIGN
OF CASCADED H BRIDGE MULTILEVEL INVERTER
BASED SHUNT ACTIVE POWER FILTER
The performance of active power filter is dependent on two parts,
current control system and harmonic reference generation. The development
of compensation signals in terms of voltages or currents is the important part
of APF's control strategy which affects its ratings and transient as well as
steady state performance. Donghua Chen & Shaojun Xie (2004) introduced
the control strategies applied to SAPF which generates compensation signals
based on time domain or frequency domain. The frequency domain approach
uses the Fourier Transform and its analysis, which leads to a large amount of
calculations, making the control methods much more complicated. In the time
domain approach, traditional concepts of circuit analysis and algebraic
transformations associated with changes of reference frames are used,
simplifying the control task. One of the time domain control strategies is the
31
instantaneous reactive power theory (PQ theory) which was proposed by
Akagi et al (1984), Chang & Shee (2004) and Herrera & Salmeron (2007).
Gabrio Superti Furga & Grazia Todeschini (2008) have dealt PQ
theory based on the time domain and the theory is for steady state and
transient operation. The control of APF in the real time, the simplicity of its
calculations are the main advantages.
Soares et al (2000), Haque (2002), Tarokh et al (2003), Dai et al
(2004) and Herrera et al (2008),) and explained the Instantaneous reactive
power theory applied to active power filter compensation. Gong et al (2002),
Gray et al (2004), Geng Wang et al (2004), Han et al (2005) Nair &
Bhuvaneswari (2006) and Ghandchi et al (2008) had studied the generation of
novel reference compensating current for analysis of Shunt Active Power
Filter with frequency domain approach, However, the performance of the
SAPF was not satisfactory and the result showed that the process is time
consuming The voltage source converters are used as the active power filter,
which has a DC capacitor voltage control as an energy storage device.
A single pulse for each half cycle is applied to synthesize an AC
voltage, for most of the application which shows dynamic performance. PWM
techniques applied to a voltage source inverter consist of chopping the DC
bus voltage to produce AC voltage of an arbitrary waveform. With PWM
techniques, the AC output of the filter is controlled as a current or voltage
source device.
2.6.1 Proposed I-
Compensating current
In the desired mains current is the product of real component of
load current (IL-
32
with the mains voltage. The three phase supply is required to supply only the
active portion of the load current. The SAPF is expected to provide
compensation for the harmonic and reactive portion of the three phase load
current so that only balanced currents are drawn from mains, which are purely
sinusoidal and in phase with the supply voltage. The reference compensating
currents (Bhuvaneswari et al 2006a) are then derived as the difference
between the load currents and the desired source current. Assuming a
balanced source, the three-phase instantaneous voltages are specified in
equations (2.2), (2.3) and (2.4)
(2.2)
(2.3)
(2.4)
The balanced three-phase source supplies a nonlinear reactive load
with unbalanced load. The unbalanced, three-phase, reactive, harmonic-rich
load currents are expressed as given in equations (2.5) to (2.10).
(2.5)
(2.6)
(2.7)
(2.8)
(2.9)
(2.10)
33
where , are Phase angles of fundamental currents in each
phase;
, and are Phase angles of nth harmonic currents in each phase;
, are Three phase fundamental current amplitudes;
, are Three phase nth harmonic currents amplitudes
The magnitude of the real component of the fundamental load
current in each phase is specified as in equations (2.11), (2.12) and (2.13).
(2.11)
(2.12)
(2.13)
To ensure balanced, sinusoidal currents at a unity power factor to
be drawn from the source, the magnitude of the desired source current is
expressed as the average of the magnitudes of the real components of the
fundamental load currents in the three phases are given in equations (2.14)
and (2.15).
(2.14)
(2.15)
Let Ua, Ub, and Uc be the unit amplitude of the phase-to-ground
source voltages in the three phases, as given in equations (2.16), (2.17)
and (2.18).
(2.16)
34
(2.17)
(2.18)
The desired (reference) source currents in the three phases are
given as (2.19), (2.20) and (2.21).
(2.19)
(2. 20)
(2.21)
The reference compensation currents for the SAPF are thus
deduced as the difference between the actual load current and the desired
source current in each phase which is expressed in equations (2.22), (2.23)
and (2.24).
(2.22)
(2.23)
(2.24)
If the three-phase load currents are balanced, the reference
compensation currents will then essentially be the sum of the reactive
component of load current and the harmonic components in each phase which
are given in equations (2.25),(2.26) and (2.27).
(2.25)
(2.26)
(2.27)
35
Figure 2.11 shows the simulink model for incorporating the
I-
current in each phase.
Figure 2.11 Simulink model of proposed I-
2.6.2 Role of DC Link Capacitor Voltage Balancing
The DC link capacitor voltage balancing is used to maintain the
capacitor voltage at constant value to effectively operate SAPF. The active
filter topology is essentially identical to that of an active rectifier, similar
control strategies for the active rectifier are applicable. The DC capacitor
voltage is directly affected by the real power transferred across the active
filter. To keep the voltage constant, ideally no real power should be
transferred. However, due to losses in switching devices and other
components, a small amount of real power is looked-for Sato et al (1997) and
Samir Kouro et al (2008). Figure 2.12 illustrates the DC link capacitor voltage
control circuit for the SAPF. Whenever real power flows into the active filter
to compensate for the losses, the DC link voltage tends to fluctuate Chandra
et al (2000) and Chudamani et al (2009). The voltage fluctuations at the DC
link capacitor of the SAPFs are used to calculate the extra power loss in the
36
inverter and the interface transformer. The corresponding phase current
amplitude is calculated using a Proportional Integral (PI) controller. The loss
component is added to the magnitude of the reference compensation current
in each phase. This ensures that the losses in the SAPF are being taken care of
by the three phase source and the DC link voltage of the SAPF.
Figure 2.12 Block diagram of DC link capacitor voltage control circuit
2.6.3 Block Diagram of Filter Current Tracking Control
The filter current in each phase is continuously monitored to check
if it is tracking the reference compensation current. The filter currents are
continuously compared with the reference compensation currents and an error
signal is produced. This error signal is shaped to bring it within the linear
modulation range of the multilevel inverter. The error signal is fed into the
37
multicarrier PWM circuit as modulating signal. Figure 2.13 illustrates filter
current tracking control scheme which is also called current control circuit.
The pulse pattern generated from the PWM circuit is suitably distributed to
trigger the switching devices of the inverter. The output currents generated is
resemblance with the reference compensation current commands in all
respect.
Figure 2.13 Block diagram of filter current tracking control
2.6.4 Simulink model of I- the design of Shunt
Active Power Filter
The I- for shunt active power filter is simulated in
MATLAB/SIMULINK. The nonlinear load is a three phase bridge rectifier
feeding R-L load. The simulation is carried out for various load conditions for
providing harmonic compensation, load balancing and reactive power
compensation. It is clearly seen that despite the fact that the load is nonlinear
reactive, the three phase currents drawn from the source are fairly sinusoidal
after compensation. The simulink model of three phase system feeding
nonlinear load is shown in Figure 2.14.
38
Figure 2.14 Simulink model for seven level inverter for SAPF with balanced load condition
The SAPF generates the filter current using I-COS
simulation circuit consists of following five sections, namely
(i) Three phase balanced supply system
(ii) The nonlinear load, which is a diode rectifier feeding RL
load
39
(iii) I- m based circuitry for reference
compensation current extraction
(iv) PWM circuit for generating the gate pulses of inverter
(v) A seven level inverter which generates the current required
for compensation. The diode rectifier absorbs reactive power
and non-sinusoidal current from the source while the SAPF
is not in action.
The simulink model for I-
compensating current. The simulation parameters used for the simulation and
their values are tabulated in Table 2.2.
Table 2.2 Simulation parameters with balanced load condition
Parameters Values
Supply phase voltage per phase 220 V(rms)
System frequency 50 Hz
Value of filter inductor 0.5 mH
Load impedance
Carrier frequency for PWM generation 10 KHz
2.7 RESULTS AND DISCUSSION
2.7.1 Simulation Results of SAPF using I- Algorithm with Balanced Load Condition
With the intention of reducing the harmonics, the SAPF is connected at point of common coupling (PCC). The reference compensating current generated using I- is shown in Figure 2.15.
40
Figure 2.15 Reference compensating current using I-with balanced load condition
The resulting source current after compensation and its harmonic profile are shown in Figures 2.16 and 2.17. The close resemblance of the waveforms indicates proper working of the filter.
Figure 2.16 Compensated source current using I-balanced load condition
Under balanced load condition, the reference and filter currents are
similar in each phase except phase angle.
41
Figure 2.17 Harmonic profile of source current using I-with balanced load condition
The total harmonic distortion of the source current is measured as 4.18% of the proposed I-improves the power factor.
The simulation is carried out with different load impedance values.
the Table 2.3 shows the variation of THD and the power factor of source
current for various values of load impedances and hence source current.
Table 2.3 THD and power factor for various values of source current with balanced load condition
S.No
Load Values
; L in mH
Source Current (Amps)
THD (%) Power factor
Before Comp.
After Comp.
Before Comp.
After Comp.
1 5 1.5 25.32 4.01 0.7725 0.9627 2 22.5 9.06 27.33 4.05 0.7505 0.9467
3 25 9.853 27.94 4.09 0.7363 0.9527
4 27.5 11 28.97 4.14 0.7257 0.9514
5 30 11.55 29.03 4.18 0.7138 0.9395
6 32.5 13.48 30.02 4.22 0.7047 0.9268
7 35 17.39 30.98 4.31 0.7012 0.9113
8 37.5 20.22 31.54 4.41 0.6982 0.9105
9 40 21.48 32.03 4.45 0.6911 0.9032
42
From the Table 2.3, it is inferred that the I-
performs well for variable load also and generates reference compensating
current dynamically and maintains the THD and power factor irrespective of
the load impedance values. The Figures 2.18 and 2.19 explain the variation
of THD and power factor with respect to source current.
Figure 2.18 THD Vs Source current using I- balanced load condition
Figure 2.19 Power factor Vs Source current using I-with balanced load condition
0
5
10
15
20
25
30
35
0 5 10 15 20 25
THD
(%)
Source current (Amp)
Before compensation
After compensation
0
0.2
0.4
0.6
0.8
1
1.2
0 5 10 15 20 25
Pow
er fa
ctor
Source current (Amp)
Before compensation
After compensation
43
2.7.2 Simulation Results of SAPF using I- Algorithm with
Unbalanced Load Condition
In general the three phase supply system is subjected to the unbalanced load
condition. This is because of the unpredicted loading of connected load and
demand. It is required to analyze the performance of SAPF with I-
algorithm for unbalanced load condition. The system with I-
based SAPF is simulated.
Figure 2.20 shows the Reference compensation current for
phase a . The reference compensating currents and filter currents for the
other phases are having different magnitude and phase angles depending upon
the values of load impedances.
Figure 2.20 Reference compensating current using I-with unbalanced load condition
Source current after compensation and its corresponding harmonic
profile are shown in Figures 2.21 and 2.22 with total harmonic distortion of
4.87%.
44
Figure 2.21 Compensated source current using I-unbalanced load condition
Figure 2.22 Harmonic profile of source current using I-with unbalanced load condition
Figure 2.23 shows the source voltage and current waveforms after
compensation and power factor is measured as 0.8497 lagging.
45
Figure 2.23 Voltage and current waveforms after compensation using I-
Various values of unbalanced load is connected to the three phase
system and the results are obtained from the simulation. The results are
investigated and produced in Table 2.4.
Table 2.4 THD and Power factor for various values of source current with unbalanced load condition
S.No
Load Values
30mH 30mH
La in mH
Source Current (Amps)
THD (%) Power factor
Before Comp.
After Comp.
Before Comp.
After Comp.
1 5 1.5 24.73 4.09 0.7478 0.7201 2 22.5 9.06 25.33 4.23 0.7425 0.8602 3 25 9.853 26.04 4.37 0.7308 0.8579 4 27.5 11 27.65 4.58 0.7299 0.8502 5 30 11.55 28.97 4.87 0.7257 0.8497 6 32.5 13.48 29.12 4.91 0.7157 0.8487 7 35 17.39 29.35 5.01 0.7038 0.8465 8 37.5 20.22 30.54 5.12 0.6926 0.8375 9 40 21.48 31.03 4.23 0.6911 0.8302
46
The THD and power factor values are maintained constant with the required generation of compensating current by the control circuit based on I-algorithm. Figures 2.24 and 2.25 show the variation of THD and power factor with I- unbalanced load condition.
Figure 2.24 THD Vs Source current using I-unbalanced load condition
Figure 2.25 Power factor Vs source current using I- with unbalanced load condition 2.8 GENERATION OF REFERENCE COMPENSATING CURRENT USING SYNCHRONOUS DETECTION ALGORITHM In the Synchronous Detection (SD) Algorithm, the average real
power consumed by the load with respect to the three phases gives the desired
0
5
10
15
20
25
30
35
0 10 20 30
TH
D (%
)
Source current (Amp)
Before compensation
After compensation
00.10.20.30.40.50.60.70.80.9
1
0 5 10 15 20 25
Pow
er F
acto
r
Source current (Amp)
Before compensation
After compensation
47
mains currents, assuming them to be balanced and in-phase with the supply
voltage after compensation. The reference compensation signals are then
derived as the difference between the load currents and the desired mains
currents.
Lin et al (1992) had discussed about the Synchronous Detection
(SD) theory which can work effectively under balanced as well as unbalanced
source and load conditions because the compensating currents are calculated
considering the magnitudes of per phase voltage. The following assumptions
are made in calculating the three phase compensating currents using equal
current distribution method of synchronous detection algorithm.
(i) Voltage is not distorted
(ii) Loss in the neutral line is negligible. The equal current
synchronous detection algorithm shows a better profile of
source current after compensation.
The reference compensation currents are used as modulating wave
for the multi carrier pulse width modulation circuitry (Tolbert et al 1998). SD
algorithm is basically used for the determination of amplitude of the source
currents. In the SD algorithm (Viktor Valouch et al 1999), the three phase
main currents are assumed to be balanced after compensation.
The real power P(t) consumed by the load could be calculated from
the instantaneous voltages and load currents as given in equation (2.28)
( 2. 28)
where are the instantaneous values of supply voltages and
are the instantaneous values of load currents. The average value
48
is determined by applying to a low pass filter. The real power is then
split into three phases as given in equations (2.29), (2.30) and (2.31).
(2.29)
(2.30)
(2.31)
Thus for purely sinusoidal balanced supply voltages,
(2.32)
With the objective of achieving Unity Power Factor (UPF), the desired mains
currents are obtained as given in equations (2.33), (2.34) and (2.35).
(2.33)
(2.34)
(2. 35)
where, are the amplitudes of the supply voltages. The
compensation currents are calculated as given in equations (2.36), (2.37) and
(2.38).
(2.36)
(2.37)
(2.38)
The Simulink model for control circuit of synchronous detection
algorithm is shown in Figure 2.26. The control circuit generates the required
compensating current depending upon the requirement of the individual
phase. The developed circuit is incorporated in the main simulation circuit of
49
SD algorithm based SAPF compensating three phase system with the
nonlinear load.
Figure 2.26 Simulink model for control circuit of synchronous detection algorithm
2.8.1 Simulink model of Synchronous Detection Algorithm for the
design of Shunt Active Power Filter
The proposed Synchronous Detection algorithm is designed to
control SAPF with the generation of filter current and hence compensated
current. The simulation parameters used for the simulation of I-
algorithm based SAPF are used. Simulink model of Shunt Active Power Filter
with Synchronous Detection Algorithm is depicted in Figure 2.27.
50
Figure 2.27 Simulink model of shunt active power filter with synchronous detection algorithm
2.9 RESULTS AND DISCUSSION
2.9.1 Simulation Results of SAPF using Synchronous Detection
Algorithm with Balanced Load Condition
The results of the simulation are obtained by changing the load
impedance. SD algorithm is developed to estimate the required Reference
compensating current which is given in Figure 2.28. It is clearly seen that
despite the fact that load is nonlinear reactive, three phase currents drawn
from the source are fairly sinusoidal and high power factor after
compensation.
51
Figure 2.28 Reference compensating current using synchronous Detection algorithm with balanced load condition
The source current after compensation and its corresponding
harmonic spectrum are shown in Figures 2.29 and 2.30.
The system is simulated in MATLAB/SIMULINK to validate the
effectiveness of the proposed SD control algorithm for balanced load
conditions.
Figure 2.29 Compensated source current using synchronous detection algorithm with balanced load condition
52
Figure 2.30 Harmonic profile of source current using synchronous detection algorithm with balanced load condition
The system with SAPF incorporating SD algorithm is simulated
under variable load conditions. The THD values and power factor are
tabulated in Table 2.5.
Table 2.5 THD and Power factor for various values of source current with balanced load condition
S.No
Load Values
L in mH
Source Current (Amps)
THD (%) Power factor
Before Comp.
After Comp.
Before Comp.
After Comp.
1 5 1.5 25.32 3.82 0.7478 0.9583
2 22.5 9.06 27.33 3.91 0.7425 0.9578
3 25 9.853 27.94 3.97 0.7308 0.9534
4 27.5 11 28.97 4.01 0.7299 0.9517
5 30 11.55 29.03 4.08 0.7257 0.9504
6 32.5 13.48 30.02 4.13 0.7157 0.9489
7 35 17.39 30.98 4.25 0.7038 0.9345
8 37.5 20.22 31.54 4.28 0.6926 0.9205
9 40 21.48 32.03 4.31 0.6911 0.9175
53
The Synchronous Detection algorithm performs well and it
maintains the THD and power factor for inconsistent loads by producing
proper compensating current.
Figure 2.31 THD Vs Source current using synchronous detection algorithm with balanced load condition
The source current is varied intentionally by changing the
connected load to observe the change of THD and Power factor. Figures 2.31
and 2.32 illustrate the variation of THD and power factor.
Figure 2.32 Power factor Vs Source current using synchronous detection algorithm with balanced load condition
0
5
10
15
20
25
30
35
0 5 10 15 20 25
THD
(%)
Source current (Amp
BeforeCompensationAftercompensation
00.20.40.60.8
11.2
0 10 20 30
Pow
er F
acto
r
Source current (Amp)
BeforeCompensationAftercompensation
54
2.9.2 Simulation Results of SAPF using Synchronous Detection
Algorithm with Unbalanced Load Condition
The system is simulated in MATLAB/SIMULINK to validate the
effectiveness of the proposed SD control algorithm for unbalanced load
conditions. The simulation parameters used for the simulation and their values
are tabulated in Table 2.6.
Table 2.6 Simulation parameters with unbalanced load condition
Parameters Values Supply voltage per phase 220 V (rms)
Filter inductance 2 mH Load impedance Ra=Rb mH Reference value of DC link voltage 400V DC link capacitor(C) 2200 µF
Carrier frequency for PWM generation 10 kHz
Reference compensation current for phase a , is shown in
Figure 2.33. The reference compensation currents and filter currents for phase
b and c are produced with different magnitude and phase angle depending
upon the compensation requirement to maintain THD and power factor.
Figure 2.33 Reference compensating current using synchronous detection algorithm with unbalanced load condition
55
Figures 2.34 and 2.35 illustrate the source current and its harmonic
profile.
Figure 2.34 Compensated source current using synchronous detection algorithm with unbalanced load condition
The source currents are obtained for different values of loads. The
waveform shown in the Figure 2.34 is for a particular load parameter
Figure 2.35 Harmonic spectum of source current using synchronous detection algorithm with unbalanced load condition
The relationship of source voltage and source current is shown in
Figure 2.36. The power factor is found as 0.8464 lagging.
56
Figure 2.36 Source voltage and current waveforms using synchronous detection algorithm with unbalanced load condition
The loads connected to the system is changed to vary the current
drawn from the source. Table 2.7 gives details about the variation of THD and
power factor for different load impedance values under unbalanced load
condition.
Table 2.7 THD and power factor for various values of source current with unbalanced load condition
S.No
Load Values
La in mH
Source Current (Amps)
THD (%) Power factor
Before Comp.
After Comp.
Before Comp.
After Comp.
1 5 1.5 24.73 5.01 0.7478 0.7302
2 22.5 9.06 25.33 5.05 0.7425 0.8595
3 25 9.853 26.04 5.18 0.7308 0.8523
4 27.5 11 27.65 5.21 0.7299 0.8514
5 30 11.55 28.97 5.25 0.7257 0.8464
6 32.5 13.48 29.12 5.31 0.7157 0.8321
7 35 17.39 29.35 5.38 0.7038 0.8216
8 37.5 20.22 30.54 5.42 0.6926 0.8202
57
From the results, it is concluded that SD algorithm based control
circuit generates compensating current to maintain the THD and the power
factor. Figures 2.37 and 2.38 illustrate the variation of THD and power factor
with respect to source current. The variation of source current is achieved by
changing the load impedance values.
Figure 2.37 THD Vs Source current using synchronous detection algorithm with unbalanced load condition
Figure 2.38 Power factor Vs Source current using synchronous detection algorithm with unbalanced load condition
0
5
10
15
20
25
30
35
0 5 10 15 20 25
THD
(%)
Source current
Before compensation
After compensation
00.10.20.30.40.50.60.70.80.9
1
0 5 10 15 20 25
Pow
er F
acto
r
Source current (Amp)
Before compensation
After compensation
58
2.10 COMPARISON OF RESULTS
The system with balanced and unbalanced load is simulated by
connecting SAPF incorporating I-COS
harmonic profiles are presented and discussed. The power factor of the supply
system is also measured.
Figure 2.39 Performance (THD) comparison of SAPF using I-and SD algorithms with balanced load condition
Figures 2.39 and 2.40 illustrate the comparative analysis of SAPF
performance with I-
observed that Synchronous Detection algorithm based control circuit
compensates effectively and brings the THD and power factor of source
current below that of I- thm based SAPF.
00.5
11.5
22.5
33.5
44.5
5
0 5 10 15 20 25
THD
(%)
Source current (Amp)
I-COS Algorithm
SynchronousDetection Algorithm
59
Figure 2.40 Performance (Power factor) comparison of SAPF using I- condition
Figures 2.41 and 2.42 show the variation of THD and power factor
of the source current drawn by the nonlinear unbalanced loads. In the
unbalanced load conditions, the I-
generates compensating current and performs better than that of SD
algorithm based SAPF.
Figure 2.41 Performance (THD) comparison of SAPF using I- SD algorithms with unbalanced load condition
0
0.2
0.4
0.6
0.8
1
1.2
0 5 10 15 20 25
Pow
er F
acto
r
Source current (Amp)
I-COS Algorithm
SynchronousDetection Algorithm
0
1
2
3
4
5
6
0 5 10 15 20 25
THD
(%)
Source current (Amp)
I-COS algorithm
Synchronous Detectionalgorithm
60
Figure 2.42 Performance (Power factor) comparison of SAPF using I- condition
The comparative analysis of THD and power factor of three phase
supply system with SD and I-COS
L=35mH) is furnished in Table 2.8.
Table 2.8 Performance comparison of SAPF with I-algorithms
Parameters Before compensation After Compensation
SD Algorithm I-
Balanced Load
Unbalanced Load
Balanced Load
Unbalanced Load
Balanced Load
Unbalanced Load
THD (%) 28.97 29.35 4.08 5.25 4.18 4.87
Power factor (lagging)
0.7257 0.6932 0.9517 0.8464 0.9514 0.8497
From the analysis, it is inferred that the SAPF with SD algorithm
performs well in balanced load condition and I-COS
works better with unbalanced load condition and it also reduces the THD
00.10.20.30.40.50.60.7
0.80.9
1
0 5 10 15 20 25
Pow
er F
acto
r
Source current (Amp)
I-COS algorithm
SynchronousDetection algorithm
61
much below the IEEE standards. The power factor of the system is also very
much improved.
2.11 SUMMARY
The effectiveness of the proposed I-COS are
demonstrated with computer simulation in MATLAB/SIMULINK. The
simulation is performed for various load conditions for providing harmonic
compensation. The results of the simulation are obtained and analyzed for
different values of load impedances. The waveforms of source currents are
obtained and analyzed. The source currents are found to have THD well
below the recommended IEEE-519 standard of 5% after compensation. Thus,
the behavior of the shunt active power filter is analyzed for different load
conditions. It can be clearly seen that despite the fact that the load is nonlinear
reactive, the three phase currents drawn from the source are fairly sinusoidal
after compensation. A detailed performance comparison of SAPF is carried
out with I- It is concluded from
the analysis that the performance of shunt active power filter with I-COS
and SD algorithms has become much better than the conventional SAPF.
Among the two methods, I-
computational burden. Moreover, it gives good responses when the load is
nonlinear and unbalanced. The SD algorithm is identified to be superior when
the load is nonlinear as well as balanced. The proportional Integral and Fuzzy
Logic Controllers are designed and developed for SAPF. The results of the
simulation are investigated in the next chapter.
